From d582fa4ea62083a7598dded5b82dc2198b3daac7 Mon Sep 17 00:00:00 2001 From: Ian Rogers Date: Wed, 5 Nov 2014 23:46:43 -0800 Subject: Instruction set features for ARM64, MIPS and X86. Also, refactor how feature strings are handled so they are additive or subtractive. Make MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler rather than #ifdefs that wouldn't have worked in cross-compilation. Add SIMD features for x86/x86-64 proposed in: https://android-review.googlesource.com/#/c/112370/ Bug: 18056890 Change-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666 --- runtime/signal_catcher.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'runtime/signal_catcher.cc') diff --git a/runtime/signal_catcher.cc b/runtime/signal_catcher.cc index d4ec80372d..d448460dc3 100644 --- a/runtime/signal_catcher.cc +++ b/runtime/signal_catcher.cc @@ -27,10 +27,10 @@ #include +#include "arch/instruction_set.h" #include "base/unix_file/fd_file.h" #include "class_linker.h" #include "gc/heap.h" -#include "instruction_set.h" #include "os.h" #include "runtime.h" #include "scoped_thread_state_change.h" -- cgit v1.2.3