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path: root/compiler/optimizing/optimizing_unit_test.h
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* Create HGraph outside Builder, print timingsDavid Brazdil2015-02-041-3/+4
| | | | | | | | | This patch refactors the way HGraph objects are created, moving the instantiation out of the Builder class and creating the CodeGenerator earlier. The patch uses this to build a single interface for printing timings info and dumping the CFG. Change-Id: I2eb63eabf28e2d0f5cdc7affaa690c3a4b1bdd21
* Clean up pass driverMathieu Chartier2015-01-281-0/+1
| | | | | | | | | | | | Added pass manager to hold the state which used to be in global variables. Static variables caused issues with Runtime.exit since they are destroyed by the global destructors while threads are still executing. Bug: 17950037 Change-Id: Ie0e4546dc9e48909c8df996a5c135be682d50044
* Fix a bug in the register allocator.Nicolas Geoffray2015-01-161-2/+6
| | | | | | | | | | When allocating a register blocked by existing intervals, we need to split inactive intervals at the end of their lifetime hole, and not at the next intersection. Otherwise, the allocation for following intervals will not see that a register is being used by the split interval. Change-Id: I40cc79dde541c07392a7cf4c6f0b291dd1ce1819
* Bounds check elimination.Mingyao Yang2014-12-031-0/+5
| | | | Change-Id: Ia0d6a4226c1f9f1ff1dd35347a38db1dc4265319
* Add support for not-long on ARM64 in the optimizing compiler.Roland Levillain2014-11-061-9/+9
| | | | Change-Id: I3e98ff411ba358d92774def18a12daccdc4f558f
* Some improvement to reg alloc.Mingyao Yang2014-11-031-1/+1
| | | | Change-Id: If579a37791278500a7e5bc763f144c241f261920
* Add support for floats and doubles.Nicolas Geoffray2014-10-071-2/+4
| | | | | | | - Follows Quick conventions. - Currently only works with baseline register allocator. Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
* Initiate a dead code elimination pass in the optimizing compiler.Roland Levillain2014-09-171-0/+20
| | | | Change-Id: Ie9db5d8e2c2c30e34145a0f7d2386b8ec58cfc4e
* Add CFG and SSA form checkers in the optimizing compiler.Roland Levillain2014-09-171-0/+13
| | | | | | | | | | | | | | | | | Checks performed on control-flow graphs: - Ensure that the predecessors and successors of a basic block are consistent within a control-flow graph. - Ensure basic blocks end with a branch instruction. - Detect phi functions listed in non-phi instruction lists and vice versa. - Ensure a block's instructions (and phi functions) are associated with this very block. Checks performed on SSA form graphs: - Ensure an instruction dominates all its uses. - Ensure there are no critical edges. Change-Id: I1c12b4a61ecf608682152c897980ababa7eca847
* Revert "Revert "Implement suspend checks in new compiler.""Nicolas Geoffray2014-09-161-0/+13
| | | | | | This reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7. Change-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8
* Add a linear scan register allocator to the optimizing compiler.Nicolas Geoffray2014-05-261-0/+21
| | | | | | | | | | | | This is a "by-the-book" implementation. It currently only deals with allocating registers, with no hint optimizations. The changes remaining to make it functional are: - Allocate spill slots. - Resolution and placements of Move instructions. - Connect it to the code generator. Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
* More code generation for the optimizing compiler.Nicolas Geoffray2014-03-131-0/+3
| | | | | | | | | - Add HReturn instruction - Generate code for locals/if/return - Setup infrastructure for register allocation. Currently emulate a stack. Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
* Add register support to the optimizing compiler.Nicolas Geoffray2014-03-101-0/+29
Also make if take an input and build the use list for instructions. Change-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82
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