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authorAgi Csaki <agicsaki@google.com>2015-08-17 13:40:45 -0700
committerAgi Csaki <agicsaki@google.com>2015-08-17 14:03:06 -0700
commit3996c89a49238037e852203e74b026015608fb0a (patch)
treec26a52ad6dc46a95b3cc464334ae7ea26aaf2a98 /test/115-native-bridge
parent837b64974977f615dd1f0662857b97536acdb4dd (diff)
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Correct for 115-native-bridge hard-coded x86/x86_64 signal handling values
Added inline assembly to ensure that the instruction causing a segfault in x86/x86_64 for the 115-native-bridge test always has a size of 3 bytes, in response to a bug that caused the test to fail when this instruction had variable sizes. Bug: 22876261 Change-Id: I296e623f170fd1925919bedf913c569a6563e3dc
Diffstat (limited to 'test/115-native-bridge')
-rw-r--r--test/115-native-bridge/nativebridge.cc6
1 files changed, 4 insertions, 2 deletions
diff --git a/test/115-native-bridge/nativebridge.cc b/test/115-native-bridge/nativebridge.cc
index a6a6e08e26..04326b3028 100644
--- a/test/115-native-bridge/nativebridge.cc
+++ b/test/115-native-bridge/nativebridge.cc
@@ -203,9 +203,11 @@ static jint trampoline_Java_Main_testSignal(JNIEnv*, jclass) {
// Test segv
sigaction(SIGSEGV, &tmp, nullptr);
-#if defined(__arm__) || defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
- // On supported architectures we cause a real SEGV.
+#if defined(__arm__) || defined(__i386__) || defined(__aarch64__)
*go_away_compiler = 'a';
+#elif defined(__x86_64__)
+ // Cause a SEGV using an instruction known to be 3 bytes long
+ asm volatile("movl $0, %%eax;" "movb $1, (%%eax);" : : : "%eax");
#else
// On other architectures we simulate SEGV.
kill(getpid(), SIGSEGV);