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path: root/arch/arm/mach-omap2/clock34xx_data.c
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* omap3/4: Fix compile for multi-omap for clkops_noncore_dpll_opsTony Lindgren2010-02-151-3/+3
| | | | | | | | Rename clkops_noncore_dpll_ops for omap3 and omap4. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* OMAP2/3/4 clock: rename and clean the omap2_clk_init() functionsPaul Walmsley2010-01-291-18/+1
| | | | | | | | | | | | | | | Rename the omap2_clk_init() in the OMAP2, 3, and 4 clock code to be omap2xxx_clk_init(), omap3xxx_clk_init(), etc. Remove all traces of the (commented) old virt_prcm_set code from omap3xxx_clk_init() and omap4xxx_clk_init(), since this will be handled with the OPP code that is cooking in the PM branch. After this patch, there should be very little else in the clock code that blocks a multi-OMAP 2+3 kernel. (OMAP2420+OMAP2430 still has some outstanding issues that need to be resolved; this is pending on some additions to the hwmod data.) Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP clock: make the fixed divisor clock code available for all OMAPsPaul Walmsley2010-01-261-3/+3
| | | | | | | | | | One of the OMAP1 clocks can use the fixed divisor recalculation code introduced in the OMAP2 clock code, so rename the omap2_fixed_divisor_recalc() function to omap_fixed_divisor_recalc() and make it available to all OMAPs. A followup patch converts the OMAP1 clock. Signed-off-by: Paul Walmsley <paul@pwsan.com>
* AM35xx: Clock table updates for AM3505/17Ranjith Lohithakshan2010-01-261-173/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AM3505/17 though a OMAP3530 derivative have the following main differences - Removal of the following OMAP3 modules - IVA - ISP/CAM - Modem and D2D components (MAD2D, SAD2D) - USIM - SSI - Mailboxes - USB OTG - ICR - MSPRO - SmartReflex - SDRC replaced with EMIF4 Controller in the SDRC subsystem thus adding support for DDR2 memory devices - Addition of the following new modules - Ethernet MAC (CPGMAC) - CAN Controller (HECC) - New USB OTG Controller with integrated Phy - Video Processing Front End (VPFE) - Additional UART (UART4) - All security accelerators disabled on GP devices and not to be accessed or configured This patch defines CPU flags for AM3505/17 and update the clock table. Clock support for new modules will be added by subsequent patches. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> [paul@pwsan.com: updated for 2.6.34 clock layout] Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3 clock: reorganize CK_* platform flagsPaul Walmsley2010-01-261-2/+2
| | | | | | | | | | | | | | | | | | | Add CK_* flags for the two new Sitara chips, AM3505 and AM3517, and the OMAP34xx die shrink, OMAP36xx/OMAP37xx. Introduce a new CK_* flag, CK_3XXX, that marks all clocks that are common to OMAP3 family chips. CK_343X now refers to clocks that are available only on OMAP34{1,2,3,4}0 (WTBU) and OMAP35{03,15,25,30} (any version). At some point, the RATE_IN_* flags should be updated also. While here, add some documentation describing the chip families covered by these clock flags. This patch is partially based on patches from Ranjith Lohithakshan <ranjithl@ti.com> and Vishwanath Sripathy <vishwanath.bs@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
* OMAP3: clock: Remove unnecessarily .init initializers from OMAP3 clocksRussell King2010-01-191-4/+0
| | | | | | | | | | | | The first thing that omap2_init_clksel_parent() does is check for a non-zero .clksel field in the struct clk. Therefore, it is pointless calling this function on clocks where the clksel field is unset. Remove init calls to omap2_init_clksel_parent() on clocks without a clksel field. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3 clock: Add capability to change rate of dpll4_m5_ckTuukka Toivonen2010-01-081-0/+2
| | | | | | | | | Add necessary definitions to clock framework to allow changing dpll4_m5_ck rate. This is used by the camera code. Signed-off-by: Jouni Högander <jouni.hogander@nokia.com> Signed-off-by: Tuukka Toivonen <tuukka.o.toivonen@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3 clock: McBSP 2, 3, 4 functional clock parent is PER_96M_FCLK, not ↵Paul Walmsley2010-01-081-1/+1
| | | | | | | | | | | CORE_96M_FCLK The correct parent of the McBSP 2, 3, and 4 functional clocks is PER_96M_FCLK, not CORE_96M_FCLK. Fix this in the OMAP clock tree. Reported by Nicole Chalhoub <n-chalhoub@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Nicole Chalhoub <n-chalhoub@ti.com>
* OMAP3: clock: add clockdomains for UART1 & 2Kevin Hilman2010-01-081-0/+2
| | | | | | | | UART1 & 2 were missing clockdomains resulting in broken omap_hwmod init for these devices. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* OMAP3 clock: convert clock34xx.h to clock34xx_data.cPaul Walmsley2009-12-111-0/+3289
The OMAP3 clock code currently #includes a large .h file full of static data structures. Instead, define the data in a .c file. Russell King <linux@arm.linux.org.uk> proposed this new arrangement: http://marc.info/?l=linux-omap&m=125967425908895&w=2 Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk>
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