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* ARM: 6676/1: Correct the cpu_architecture() function for ARMv7Catalin Marinas2011-02-191-2/+2
| | | | | | | | If ID_MMFR0[3:0] >= 3, the architecture version is ARMv7. The code was currently only testing for ID_MMFR0[3:0] == 3. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6625/1: use memblock memory regions for "System RAM" I/O resourcesDima Zavin2011-01-141-10/+6
| | | | | | | | | | | | | | | Do not use memory bank info to request the "system ram" resources as they do not track holes created by memblock_remove inside machine's reserve callback. If the removed memory is passed as platform_device's ioresource, then drivers that call request_mem_region would fail due to a conflict with the incorrectly configured system ram resource. Instead, iterate through the regions of memblock.memory and add those as "System RAM" resources. Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6620/1: Change misleading warning when CONFIG_CMDLINE_FORCE is usedAlexander Holler2011-01-121-2/+4
| | | | | | | | | | | | | When CONFIG_CMDLINE_FORCE is used, the warning Ignoring unrecognised tag 0x54410009 was displayed. Change this to Ignoring tag cmdline (using the default kernel command line) Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: provide an early platform initialization hookRussell King2010-12-241-0/+3
| | | | | | | This allows platforms to hook into the initialization early to setup things like scheduler clocks, etc. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: simplify early machine init hooksRussell King2010-12-241-11/+4
| | | | | | | | | | Rather than storing each machine init hook separately, store a pointer to the machine description record and dereference this instead. This pointer is only available while the init sections are present, which is not a problem as we only use it from init code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 6532/1: Allow machine to specify it's own IRQ handlers at run-timeeric miao2010-12-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Normally different ARM platform has different way to decode the IRQ hardware status and demultiplex to the corresponding IRQ handler. This is highly optimized by macro irq_handler in entry-armv.S, and each machine defines their own macro to decode the IRQ number. However, this prevents multiple machine classes to be built into a single kernel. By allowing each machine to specify thier own handler, and making function pointer 'handle_arch_irq' to point to it at run time, this can be solved. And introduce CONFIG_MULTI_IRQ_HANDLER to allow both solutions to work. Comparing with the highly optimized macro of irq_handler, the new function must be written with care not to lose too much performance. And the IPI stuff on SMP is expected to move to the provided arch IRQ handler as well. The assembly code to invoke handle_arch_irq is optimized by Russell King. Signed-off-by: Eric Miao <eric.miao@canonical.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: move high-usage mostly read variables in setup.c to __read_mostlyRussell King2010-12-051-8/+8
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
*-. Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', ↵Russell King2010-10-181-5/+41
|\ \ | | | | | | | | | 'st-ux' and 'unwind' into devel
| | * ARM: vmlinux.lds: Refer to start of .data using _sdata rather than _dataRussell King2010-10-081-1/+1
| | | | | | | | | | | | | | | | | | Use _sdata as the start of the data section, rather than _data. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: Allow SMP kernels to boot on UP systemsRussell King2010-10-041-1/+3
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | UP systems do not implement all the instructions that SMP systems have, so in order to boot a SMP kernel on a UP system, we need to rewrite parts of the kernel. Do this using an 'alternatives' scheme, where the kernel code and data is modified prior to initialization to replace the SMP instructions, thereby rendering the problematical code ineffectual. We use the linker to generate a list of 32-bit word locations and their replacement values, and run through these replacements when we detect a UP system. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6431/1: fix isb regression on CPU < v7Linus Walleij2010-10-081-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The kernel does not compile for my ARM926EJ-S system U300 due to the isb instruction inserted in generic assember statement from commit 8925ec4c530094b878e7e28a1fd78e7122afd973, "ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasing" hey the isb is only available when assembling for v7 so let's use the generic isb() macro from setup.h instead. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasingWill Deacon2010-10-041-3/+36
|/ | | | | | | | | | | | | | | Currently, the Kernel assumes that if a CPU has a non-aliasing D-cache then the I-cache is also non-aliasing. This may not be true on ARM cores from v6 onwards, which may have aliasing I-caches but non-aliasing D-caches. This patch adds a cpu_has_aliasing_icache function, which is called from cacheid_init and adds CACHEID_VIPT_I_ALIASING to the cacheid when appropriate. A utility macro, icache_is_vipt_aliasing(), is also provided. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'devel-stable' into develRussell King2010-07-311-0/+11
|\ | | | | | | | | | | | | Conflicts: arch/arm/kernel/entry-armv.S arch/arm/kernel/setup.c arch/arm/mm/init.c
| * ARM: deprecate support for old way to pass kernel parametersUwe Kleine-König2010-07-071-0/+11
| | | | | | | | | | | | | | | | | | This was deprecated in 2001 and announced to live on for 5 years. For now provide a kernel parameter for those who still need it. Acked-by: Eric Miao <eric.miao@canonical.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
| |
| \
*-. \ Merge branches 'at91', 'ep93xx', 'kexec', 'iop', 'lmb', 'nomadik', 'nuc', ↵Russell King2010-07-311-2/+98
|\ \ \ | |_|/ |/| | | | | 'pl', 'spear' and 'versatile' into devel
| | * ARM: Convert platform reservations to use LMB rather than bootmemRussell King2010-07-271-1/+1
| | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: initial LMB trialRussell King2010-07-271-0/+3
| | | | | | | | | | | | | | | Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: Remove DISCONTIGMEM supportRussell King2010-07-161-2/+1
| |/ |/| | | | | | | | | | | Everything should now be using sparsemem rather than discontigmem, so remove the code supporting discontigmem from ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6122/1: kdump: add support for elfcorehdr parameterMika Westerberg2010-07-091-0/+25
| | | | | | | | | | | | | | | | This parameter is used by primary kernel to pass address of vmcore header to the dump capture kernel. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6116/1: kdump: reserve memory for crashkernelMika Westerberg2010-07-091-0/+51
| | | | | | | | | | | | | | | | | | Implemented ARM support for command line option "crashkernel=size@start" which allows user to reserve some memory for a dump capture kernel. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6Tony Lindgren2010-07-091-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TLS register is only available on ARM1136 r1p0 and later. Set HWCAP_TLS flags if hardware TLS is available and test for it if CONFIG_CPU_32v6K is not set for V6. Note that we set the TLS instruction in __kuser_get_tls dynamically as suggested by Jamie Lokier <jamie@shareable.org>. Also the __switch_to code is optimized out in most cases as suggested by Nicolas Pitre <nico@fluxnic.net>. Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6197/2: preliminary support for sparse IRQeric miao2010-07-091-0/+1
|/ | | | | | | | | So to allow NR_IRQS to be dynamic and platforms to specify the number of IRQs really needed. Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5939/1: ARM: Add option CMDLINE_FORCE to force usage of the in-kernel ↵Alexander Holler2010-05-241-0/+2
| | | | | | | | | | | | | | cmdline Add an option to force usage of the in-kernel cmdline even if the boot loader passes another command string to the kernel. Useful if someone cannot or don't want to change the command-line options of the boot loader but is able to change the kernel. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-03-011-48/+31
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits) ARM: Eliminate decompressor -Dstatic= PIC hack ARM: 5958/1: ARM: U300: fix inverted clk round rate ARM: 5956/1: misplaced parentheses ARM: 5955/1: ep93xx: move timer defines into core.c and document ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c ARM: 5953/1: ep93xx: fix broken build of clock.c ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig ARM: 5949/1: NUC900 add gpio virtual memory map ARM: 5948/1: Enable timer0 to time4 clock support for nuc910 ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk ARM: make_coherent(): fix problems with highpte, part 2 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself ARM: 5945/1: ep93xx: include correct irq.h in core.c ARM: 5933/1: amba-pl011: support hardware flow control ARM: 5930/1: Add PKMAP area description to memory.txt. ARM: 5929/1: Add checks to detect overlap of memory regions. ARM: 5928/1: Change type of VMALLOC_END to unsigned long. ARM: 5927/1: Make delimiters of DMA area globally visibly. ARM: 5926/1: Add "Virtual kernel memory..." printout. ARM: 5920/1: OMAP4: Enable L2 Cache ... Fix up trivial conflict in arch/arm/mach-mx25/clock.c
| * ARM: 5906/1: arm: change command_line to cmd_lineJeremy Kerr2010-02-151-4/+4
| | | | | | | | | | | | | | | | | | drivers/of/fdt expects a cmd_line symbol, while arm uses command_line. Change to the former, so that we can eventually share with the fdt code. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 5880/1: arm: use generic infrastructure for early paramsJeremy Kerr2010-02-151-46/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM setup code includes its own parser for early params, there's also one in the generic init code. This patch removes __early_init (and related code) from arch/arm/kernel/setup.c, and changes users to the generic early_init macro instead. The generic macro takes a char * argument, rather than char **, so we need to update the parser functions a little. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Move creation of /proc/cpu out of alignment.cRussell King2010-02-151-1/+14
| | | | | | | | | | | | | | Always creating this directory avoids other users having to jump through silly hoops when they want to share this directory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: 5938/1: ARM: L2: export outer_cache_fnsSantosh Shilimkar2010-02-181-0/+1
|/ | | | | | | | | | | The 'outer_cache' variable is needed by the outer_inv_range(), outer_clean_range() and outer_flush_range() functions, which are declared as inline in asm/cacheflush.h. Otherwise drivers built as a loadable module, which access these functions, will have an undefined symbol. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 5580/2: ARM TCM (Tightly-Coupled Memory) support v3Linus Walleij2009-09-151-0/+2
| | | | | | | | | | | | | This adds the TCM interface to Linux, when active, it will detect and report TCM memories and sizes early in boot if present, introduce generic TCM memory handling, provide a generic TCM memory pool and select TCM memory for the U300 platform. See the Documentation/arm/tcm.txt for documentation. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Thumb-2: Implementation of the unified start-up and exceptions codeCatalin Marinas2009-07-241-7/+21
| | | | | | | This patch implements the ARM/Thumb-2 unified kernel start-up and exception handling code. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into develRussell King2009-03-131-6/+7
|\ | | | | | | | | | | Conflicts: arch/arm/mach-at91/gpio.c
| * [ARM] 5417/1: Set the correct cacheid for ARMv6 CPUs with ARMv7 style MMUCatalin Marinas2009-03-031-6/+7
| | | | | | | | | | | | | | | | | | | | | | The cacheid_init() function assumes that if cpu_architecture() returns 7, the caches are VIPT_NONALIASING. The cpu_architecture() function returns the version of the supported MMU features (e.g. TEX remapping) but it doesn't make any assumptions about the cache type. The patch adds the checking of the Cache Type Register for the ARMv7 format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 5383/2: unwind: Add core support for ARM stack unwindingCatalin Marinas2009-02-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the main functionality for parsing the stack unwinding information generated by the ARM EABI toolchains. The unwinding information consists of an index with a pair of words per function and a table with unwinding instructions. For more information, see "Exception Handling ABI for the ARM Architecture" at: http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 5388/1: Add hwcap bits for VFPv3 and VFPv3D16Catalin Marinas2009-02-121-0/+2
|/ | | | | | | | | | The VFPv3D16 is a VFPv3 CPU configuration where only 16 double registers are present, as the VFPv2 configuration. This patch adds the corresponding hwcap bits so that applications or debuggers have more information about the supported features. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] use asm/sections.hRussell King2008-12-011-9/+9
| | | | | | | | Update to use the asm/sections.h header rather than declaring these symbols ourselves. Change __data_start to _data to conform with the naming found within asm/sections.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'highmem' into develRussell King2008-11-281-16/+21
|\ | | | | | | | | | | Conflicts: arch/arm/mach-clps7500/include/mach/memory.h
| * [ARM] rationalize memory configuration code some moreNicolas Pitre2008-11-281-16/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two instances of struct meminfo: one in kernel/setup.c marked __initdata, and another in mm/init.c with permanent storage. Let's keep only the later to directly populate the permanent version from arm_add_memory(). Also move common validation tests between the MMU and non-MMU cases into arm_add_memory() to remove some duplication. Protection against overflowing the membank array is also moved in there in order to cover the kernel cmdline parsing path as well. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Add HWCAP_NEON to the ARM hwcap.h fileCatalin Marinas2008-11-061-0/+1
| | | | | | | | | | | | | | Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Add "thumbee" to the hwcap_str arrayCatalin Marinas2008-11-061-0/+1
|/ | | | | | | | | This part was missed in the initial patch adding ThumbEE support. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* [ARM] 5274/1: simplify request_standard_resources()Nicolas Pitre2008-10-021-7/+2
| | | | | | | | | | There is no point converting memory bank addresses from physical to virtual just to convert them back to physical addresses. Furthermore this isn't "right" for highmem even if in this case the end result is the correct one. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] mm: move vmalloc= parsing to arch/arm/mm/mmu.cRussell King2008-09-301-13/+0
| | | | | | | | | There's no point scattering this around the tree, the parsing of the parameter might as well live beside the code which uses it. That also means we can make vmalloc_reserve a static variable. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Print details relevant to how we handle the cacheRussell King2008-09-251-0/+9
| | | | | | | | This replaces the original cache type decoding printks. We now indicate how we're treating the cache which we found, rather than what we found. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Introduce new bitmask based cache type macrosRussell King2008-09-251-0/+22
| | | | | | | | | | | | | | | Rather than trying to (inaccurately) decode the cache type from the registers each time we need to decide what type of cache we have, use a bitmask initialized early during boot. Since the setup is a one-off initialization, we can be a little more clever and take account of the CPU architecture as well. Note that we continue to achieve the compactness on optimised kernels by forcing tests to always-false or always-true as appropriate, thereby allowing the compiler to do build-time code elimination. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Remove cache type printksRussell King2008-09-251-141/+1
| | | | | | | | | | | | | | | | | | | | | | The cache type register found in ARMv5 and later CPUs changes format and meaning depending on the CPU architecture version. Currently, this code: a) doesn't work for everything - Xscale's are identified as 'unknown 5'. b) is not able to tell whether the caches are VIVT or VIPT from the cache type. c) prints rubbish on some ARMv6 and ARMv7+ CPUs. The two solutions to this are: 1. Add yet more code to decode and print the various different register formats. 2. Remove the code altogther. The code only exists to decode and print the cache parameters. Increasing the complexity of it just for the sake of a few prinks isn't worth it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] clean up a load of old declarationsRussell King2008-09-061-2/+1
| | | | | | ... some of which are now in linux/*.h headers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] move initrd code from kernel/setup.c to mm/init.cRussell King2008-09-061-37/+0
| | | | | | | This quietens some sparse warnings about phys_initrd_start and phys_initrd_size. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] sparse: fix several warningsRussell King2008-09-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | arch/arm/kernel/process.c:270:6: warning: symbol 'show_fpregs' was not declared. Should it be static? This function isn't used, so can be removed. arch/arm/kernel/setup.c:532:9: warning: symbol 'len' shadows an earlier one arch/arm/kernel/setup.c:524:6: originally declared here A function containing two 'len's. arch/arm/mm/fault-armv.c:188:13: warning: symbol 'check_writebuffer_bugs' was not declared. Should it be static? arch/arm/mm/mmap.c:122:5: warning: symbol 'valid_phys_addr_range' was not declared. Should it be static? arch/arm/mm/mmap.c:137:5: warning: symbol 'valid_mmap_phys_addr_range' was not declared. Should it be static? Missing includes. arch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer arch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces) Sillies. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] cachetype: move definitions to separate headerRussell King2008-09-011-0/+1
| | | | | | | | Rather than pollute asm/cacheflush.h with the cache type definitions, move them to asm/cachetype.h, and include this new header where necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] cputype: separate definitions, use themRussell King2008-09-011-22/+23
| | | | | | | | Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] prevent crashing when too much RAM installedLennert Buytenhek2008-08-091-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will truncate and/or ignore memory banks if their kernel direct mappings would (partially) overlap with the vmalloc area or the mappings between the vmalloc area and the address space top, to prevent crashing during early boot if there happens to be more RAM installed than we are expecting. Since the start of the vmalloc area is not at a fixed address (but the vmalloc end address is, via the per-platform VMALLOC_END define), a default area of 128M is reserved for vmalloc mappings, which can be shrunk or enlarged by passing an appropriate vmalloc= command line option as it is done on x86. On a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe000000, two 512M RAM banks and vmalloc=128M (the default), this patch gives: Truncating RAM at 20000000-3fffffff to -35ffffff (vmalloc region overlap). Memory: 512MB 352MB = 864MB total On a board with a 3:1 user:kernel split, VMALLOC_END at 0xfe800000, two 256M RAM banks and vmalloc=768M, this patch gives: Truncating RAM at 00000000-0fffffff to -0e7fffff (vmalloc region overlap). Ignoring RAM at 10000000-1fffffff (vmalloc region overlap). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Tested-by: Riku Voipio <riku.voipio@iki.fi>
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