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* ARM: dts: add GSBI8 defines to the MSM8660 familyLinus Walleij2017-06-051-0/+25
| | | | | | | | | | This defines the memory location and interrupt used by the GSBI8 I2C adapter on the MSM8660 SoCs. We add it as "disabled" by default so that boards using this I2C can enable it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add XOADC and IIO HWMON to MSM8660/APQ8060Linus Walleij2017-06-051-0/+59
| | | | | | | | | | | | | | | | | | | | | | This adds the PM8058 XOADC node to the PM8058 PMIC node, defines the 16 channels and further also define an IIO HWMON node for the channels that are used for housekeeping of voltages and die temperature for the PMIC chip die. Tested on the APQ8060 DragonBoard: cd /sys/class/hwmon/hwmon0 cat in2_input 4773 (DC mains ~5V) cat in4_input 625 (0.625V reference voltage) cat in5_input 1250 (1.25V reference voltage) cat temp1_input 35852 (die temperature) Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add SDC2 and SDC4 to the MSM8660 familyLinus Walleij2017-03-281-0/+30
| | | | | | | | | | To make the picture complete, add DTS entries also for the second and fourth MMC/SD blocks on the MSM8660. SDC2 is an 8-bit interface and SDC4 is a 4-bit interface. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: rename MSM8660/APQ8060 pmicintc to pm8058Linus Walleij2017-01-131-6/+6
| | | | | | | | | | | | The name "pmicintc" is ambiguous: there is a second power management IC named PM8901 on these systems, and it is also an interrupt controller. To make things clear, just name the node alias "pm8058", this in unambigous and has all information we need. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSILinus Walleij2016-11-181-0/+17
| | | | | | | | | This adds the external bus interface EBI2 to the MSM8660 device tree, albeit with status = "disabled" so that devices actually using EBI2 can turn it on if needed. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: MSM8660 remove flags from SPMI/MPP IRQsLinus Walleij2016-08-231-18/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm SPMI GPIO and MPP lines are problematic: the are fetched from the main MFD driver with platform_get_irq() which means that at this point they will all be assigned the flags set up for the interrupts in the device tree. That is problematic since these are flagged as rising edge and an this point the interrupt descriptor is assigned a rising edge, while the only thing the GPIO/MPP drivers really do is issue irq_get_irqchip_state() on the line to read it out and to provide a .to_irq() helper for *other* IRQ consumers. If another device tree node tries to flag the same IRQ for use as something else than rising edge, the kernel irqdomain core will protest like this: type mismatch, failed to map hwirq-NN for <FOO>! Which is what happens when the device tree defines two contradictory flags for the same interrupt line. To work around this and alleviate the problem, assign 0 as flag for the interrupts taken by the PM GPIO and MPP drivers. This will lead to the flag being unset, and a second consumer requesting rising, falling, both or level interrupts will be respected. This is what the qcom-pm*.dtsi files already do. Switched to using the symbolic name IRQ_TYPE_NONE so that we get this more readable. This misconfiguration was caused by a copy/pasting the APQ8064 set-up, the latter has been fixed in a separate patch. Tested with one of the SPMI GPIOs: after this I can successfully request one of these GPIOs as falling edge from the device tree. Fixes: 0840ea9e4457 ("ARM: dts: add GPIO and MPP to MSM8660 PMIC") Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: John Stultz <john.stultz@linaro.org> Cc: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: move the fixed MMC regulator to SURF boardLinus Walleij2016-06-271-12/+0
| | | | | | | | | | | There is currently a fixed regulator in the .dtsi file for the MSM8660 chipset, used by the SURF board. We want to define real regulators for a board using this chipset, so push the fixed regulator down to the SURF board which is the only user. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: fix the MSM8660 RTC base addressLinus Walleij2016-06-271-2/+2
| | | | | | | | | | | The RTC was defined on 0x11d but on the MSM8660/APQ8060 it is actually on 0x1e8. We were saved by the fact that the driver does not use the reg parameter: instead it uses the compatible string to figure out where the RTC is. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add I2C block in GSBI12Linus Walleij2016-06-271-1/+12
| | | | | | | | | | | The I2C block on the GSBI12 is used on the APQ8060 Dragonboard for sensors. Make it available in the chipset file. Take this opportunity to fix the IRQ flag "0" to "NONE" using the IRQ DT include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add L2CC and RPM with regulators for MSM8660Linus Walleij2016-06-271-0/+89
| | | | | | | | | | This adds the L2CC IPC resource and RPM devices plus the nodes for the PM8901 and PM8058 regulators to the MSM8660 device tree. This was tested on the APQ8060 Dragonboard. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add SDCC5 to Qualcomm MSM8660Linus Walleij2016-06-271-0/+16
| | | | | | | | | | | The SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: add GPIO and MPP to MSM8660 PMICLinus Walleij2016-06-271-0/+38
| | | | | | | | | | This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus"Masahiro Yamada2016-03-121-1/+1
| | | | | | | | | | | | | | | | The compatible string "simple-bus" is well defined in ePAPR, while I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or Documentation/devicetree/. DT is also used by other projects than Linux kernel. It is not a good idea to rely on such an unofficial binding. This commit - replaces "arm,amba-bus" with "simple-bus" - drops "arm,amba-bus" where it is used along with "simple-bus" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm: dts: qcom: Add more board clocksStephen Boyd2016-02-231-0/+20
| | | | | | | | | | These clocks are fixed rate board sources that should be in DT. Add them. Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
* ARM: dts: qcom: Label serial nodes for aliasing and stdout-pathStephen Boyd2015-09-091-1/+1
| | | | | | | Add a label to the serial nodes that are being used for the console. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* ARM: dts: qcom: Replace gpio node with pinctrl nodeBjorn Andersson2015-07-231-5/+6
| | | | | | | | | Replace the standalone gpio driver with pinctrl-msm as we now have msm8660 support there. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
* ARM: dts: qcom: Add msm8660 PMU nodeStephen Boyd2015-04-271-0/+5
| | | | | | | Enable perf events on msm8660 devices by adding the pmu node. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* arm: dts: qcom: Add TCSR support for MSM8660Andy Gross2015-04-031-0/+8
| | | | | | | | | This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: DT: msm8660: Add sdcc nodesStephen Boyd2014-09-221-0/+51
| | | | | | | | | | Add the sdcc nodes to support the SD card controller using pl180 mmci driver. We also add a temporary fixed regulator until the regulator driver is mainlined. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: dts: msm: Add 8058 PMIC to ssbi busStephen Boyd2014-09-111-0/+42
| | | | | | | | Add the PMIC and the sub-devices that are currently supported in the kernel to the DT. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: dts: qcom: Update msm8660 device treesKumar Gala2014-05-291-47/+68
| | | | | | | | | | * Move SoC peripherals into an SoC container node * Move serial enabling into board file (qcom-msm8660-surf.dts) * Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container * Add GSBI node and configuration of GSBI controller Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: dts: qcom: Add nodes necessary for SMP bootRohit Vaswani2014-02-201-0/+24
| | | | | | | | | | | Add the necessary nodes to support SMP on MSM8660, MSM8960, and MSM8974/APQ8074. While we're here also add in the error interrupts for the Krait cache error detection. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> [sboyd: Split into separate patch, add error interrupts] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
* ARM: dts: msm: split out msm8660 and msm8960 soc into dts includeKumar Gala2014-02-031-0/+63
Pull the SoC device tree bits into their own files so other boards based on these SoCs can include them and reduce duplication across a number of boards. Signed-off-by: Kumar Gala <galak@codeaurora.org>
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