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| author | Dave Airlie <airlied@redhat.com> | 2013-05-03 10:09:11 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-05-03 10:09:11 +1000 |
| commit | 6110948846e9440a60e491a9be67a8a13c646b7e (patch) | |
| tree | 4fc4f362b6f52aaf748a96830a42a3a7cdcab129 /drivers/gpu/drm/radeon/radeon_fence.c | |
| parent | f49e7259a4ea3a9ac42fc1c70c86d5e50e800731 (diff) | |
| parent | 441e76ca83ac604eaf0f046def96d8e3a27eea28 (diff) | |
| download | kernel_replicant_linux-6110948846e9440a60e491a9be67a8a13c646b7e.tar.gz kernel_replicant_linux-6110948846e9440a60e491a9be67a8a13c646b7e.tar.bz2 kernel_replicant_linux-6110948846e9440a60e491a9be67a8a13c646b7e.zip | |
Merge branch 'drm-next-3.10-2' of git://people.freedesktop.org/~agd5f/linux into drm-next
Just some fixes that have accumulated over the last couple of
weeks and some new PCI ids.
* 'drm-next-3.10-2' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon: fix handling of v6 power tables
drm/radeon: clarify family checks in pm table parsing
drm/radeon: consolidate UVD clock programming
drm/radeon: fix UPLL_REF_DIV_MASK definition
radeon: add bo tracking debugfs
drm/radeon: add new richland pci ids
drm/radeon: add some new SI PCI ids
drm/radeon: fix scratch reg handling for UVD fence
drm/radeon: allocate SA bo in the requested domain
drm/radeon: fix possible segfault when parsing pm tables
drm/radeon: fix endian bugs in atom_allocate_fb_scratch()
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_fence.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 1a699cefaac7..5b937dfe6f65 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -767,8 +767,8 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) { + rdev->fence_drv[ring].scratch_reg = 0; if (ring != R600_RING_TYPE_UVD_INDEX) { - rdev->fence_drv[ring].scratch_reg = 0; index = R600_WB_EVENT_OFFSET + ring * 4; rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + |