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author | Olof Johansson <olof@lixom.net> | 2013-02-04 22:24:20 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-02-04 22:24:20 -0800 |
commit | 4227961650884a06757f80877d5dce0bddc723d4 (patch) | |
tree | 122c7929b81c685c85764b1d7ae227f8a7362d60 /arch/arm/mach-imx/cpu-imx5.c | |
parent | ef4acb75a019783fc5132a5066232ef80209d7ec (diff) | |
parent | e5f9dec8ff5ff3f6254412abed1f68d758f6616b (diff) | |
download | kernel_replicant_linux-4227961650884a06757f80877d5dce0bddc723d4.tar.gz kernel_replicant_linux-4227961650884a06757f80877d5dce0bddc723d4.tar.bz2 kernel_replicant_linux-4227961650884a06757f80877d5dce0bddc723d4.zip |
Merge tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx6q cpuidle support for 3.9
- It's based on imx-cleanup-3.9 to avoid conflicts.
* tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: support WAIT mode using cpuidle
ARM: imx: move imx6q_cpuidle_driver into a separate file
ARM: imx: mask gpc interrupts initially
ARM: imx: return zero in case next event gets a large increment
ARM: imx: Remove mx508 support
ARM: imx: Remove mach-mx51_3ds board
ARM: imx: use debug_ll_io_init() for imx6q
ARM: imx: remove unused imx6q_clock_map_io()
ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Still, two delete/change conflicts caused by imx/cleanup:
arch/arm/mach-imx/mach-mx50_rdp.c
arch/arm/mach-imx/mach-mx51_3ds.c
Diffstat (limited to 'arch/arm/mach-imx/cpu-imx5.c')
-rw-r--r-- | arch/arm/mach-imx/cpu-imx5.c | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index d88760014ff9..d7ce72252a4e 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -22,7 +22,6 @@ static int mx5_cpu_rev = -1; #define IIM_SREV 0x24 -#define MX50_HW_ADADIG_DIGPROG 0xB0 static int get_mx51_srev(void) { @@ -108,41 +107,3 @@ int mx53_revision(void) return mx5_cpu_rev; } EXPORT_SYMBOL(mx53_revision); - -static int get_mx50_srev(void) -{ - void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K); - u32 rev; - - if (!anatop) { - mx5_cpu_rev = -EINVAL; - return 0; - } - - rev = readl(anatop + MX50_HW_ADADIG_DIGPROG); - rev &= 0xff; - - iounmap(anatop); - if (rev == 0x0) - return IMX_CHIP_REVISION_1_0; - else if (rev == 0x1) - return IMX_CHIP_REVISION_1_1; - return 0; -} - -/* - * Returns: - * the silicon revision of the cpu - * -EINVAL - not a mx50 - */ -int mx50_revision(void) -{ - if (!cpu_is_mx50()) - return -EINVAL; - - if (mx5_cpu_rev == -1) - mx5_cpu_rev = get_mx50_srev(); - - return mx5_cpu_rev; -} -EXPORT_SYMBOL(mx50_revision); |