[mips*] Fix build with binutils configured with --enable-mips-fix-loongson3-llsc=yes.

3 files changed, 95 insertions, 0 deletions

diff --git a/debian/changelog b/debian/changelog
index 0f5fb1511d90..c6b304445c48 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -67,6 +67,8 @@ linux (5.10.5-1) UNRELEASED; urgency=medium
 
   [ Aurelien Jarno ]
   * usbip: depend on usb.ids instead of usbutils.
+  * [mips*] Fix build with binutils configured with
+    --enable-mips-fix-loongson3-llsc=yes.
 
   [ Salvatore Bonaccorso ]
   * Bluetooth: Fix attempting to set RPA timeout when unsupported
diff --git a/debian/patches/bugfix/mips/mips-support-binutils-configured-with-enable-mips-fi.patch b/debian/patches/bugfix/mips/mips-support-binutils-configured-with-enable-mips-fi.patch
new file mode 100644
index 000000000000..f19330e67176
--- /dev/null
+++ b/debian/patches/bugfix/mips/mips-support-binutils-configured-with-enable-mips-fi.patch
@@ -0,0 +1,92 @@
+From: Aurelien Jarno <aurelien@aurel32.net>
+Date: Sat, 9 Jan 2021 20:06:27 +0100
+Subject: MIPS: Support binutils configured with
+ --enable-mips-fix-loongson3-llsc=yes
+Forwarded: https://lore.kernel.org/linux-mips/20210109193048.478339-1-aurelien@aurel32.net/T/#u
+
+From version 2.35, binutils can be configured with
+--enable-mips-fix-loongson3-llsc=yes, which means it defaults to
+-mfix-loongson3-llsc. This breaks labels which might then point at the
+wrong instruction.
+
+The workaround to explicitly pass -mno-fix-loongson3-llsc has been
+added in Linux version 5.1, but is only enabled when building a Loongson
+64 kernel. As vendors might use a common toolchain for building Loongson
+and non-Loongson kernels, just move that workaround to
+arch/mips/Makefile. At the same time update the comments to reflect the
+current status.
+
+Cc: stable@vger.kernel.org # 5.1+
+Cc: YunQiang Su <syq@debian.org>
+Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
+---
+ arch/mips/Makefile            | 19 +++++++++++++++++++
+ arch/mips/loongson64/Platform | 22 ----------------------
+ 2 files changed, 19 insertions(+), 22 deletions(-)
+
+diff --git a/arch/mips/Makefile b/arch/mips/Makefile
+index cd4343edeb11..5ffdd67093bc 100644
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -136,6 +136,25 @@ cflags-$(CONFIG_SB1XXX_CORELIS)	+= $(call cc-option,-mno-sched-prolog) \
+ #
+ cflags-y += -fno-stack-check
+ 
++# binutils from v2.35 when built with --enable-mips-fix-loongson3-llsc=yes,
++# supports an -mfix-loongson3-llsc flag which emits a sync prior to each ll
++# instruction to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h
++# for a description).
++#
++# We disable this in order to prevent the assembler meddling with the
++# instruction that labels refer to, ie. if we label an ll instruction:
++#
++# 1: ll v0, 0(a0)
++#
++# ...then with the assembler fix applied the label may actually point at a sync
++# instruction inserted by the assembler, and if we were using the label in an
++# exception table the table would no longer contain the address of the ll
++# instruction.
++#
++# Avoid this by explicitly disabling that assembler behaviour.
++#
++cflags-y += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
++
+ #
+ # CPU-dependent compiler/assembler options for optimization.
+ #
+diff --git a/arch/mips/loongson64/Platform b/arch/mips/loongson64/Platform
+index ec42c5085905..e2354e128d9a 100644
+--- a/arch/mips/loongson64/Platform
++++ b/arch/mips/loongson64/Platform
+@@ -5,28 +5,6 @@
+ 
+ cflags-$(CONFIG_CPU_LOONGSON64)	+= -Wa,--trap
+ 
+-#
+-# Some versions of binutils, not currently mainline as of 2019/02/04, support
+-# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
+-# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
+-# description).
+-#
+-# We disable this in order to prevent the assembler meddling with the
+-# instruction that labels refer to, ie. if we label an ll instruction:
+-#
+-# 1: ll v0, 0(a0)
+-#
+-# ...then with the assembler fix applied the label may actually point at a sync
+-# instruction inserted by the assembler, and if we were using the label in an
+-# exception table the table would no longer contain the address of the ll
+-# instruction.
+-#
+-# Avoid this by explicitly disabling that assembler behaviour. If upstream
+-# binutils does not merge support for the flag then we can revisit & remove
+-# this later - for now it ensures vendor toolchains don't cause problems.
+-#
+-cflags-$(CONFIG_CPU_LOONGSON64)	+= $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
+-
+ #
+ # binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a
+ # as MIPS64 R2; older versions as just R1.  This leaves the possibility open
+-- 
+2.29.2
+
diff --git a/debian/patches/series b/debian/patches/series
index f4e189398806..48ab8ae457fa 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -75,6 +75,7 @@ bugfix/arm/arm-mm-export-__sync_icache_dcache-for-xen-privcmd.patch
 bugfix/powerpc/powerpc-boot-fix-missing-crc32poly.h-when-building-with-kernel_xz.patch
 bugfix/arm64/arm64-acpi-Add-fixup-for-HPE-m400-quirks.patch
 bugfix/x86/x86-32-disable-3dnow-in-generic-config.patch
+bugfix/mips/mips-support-binutils-configured-with-enable-mips-fi.patch
 
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 features/arm64/arm64-dts-rockchip-Add-basic-support-for-Kobol-s-Hel.patch