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authorBill Yi <byi@google.com>2018-11-28 18:33:29 -0800
committerBill Yi <byi@google.com>2018-11-28 18:33:29 -0800
commit25ce2ab6bf2b41dd300236b01c47206f12006b75 (patch)
tree327ea83738ffb3f9bfb7d9e0bccb5b1f777aa565 /cc/sabi.go
parenta427e814f07d071b4a3c31976a7701b4f80546b5 (diff)
parenta5471138c51014e1cfa84a50bf3c7da26e5a06cb (diff)
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Merge pi-qpr1-release PQ1A.181105.017.A1 to pi-platform-release
Change-Id: Id26c628ad766809fd69076b6840d684d6fcfb6d4
Diffstat (limited to 'cc/sabi.go')
-rw-r--r--cc/sabi.go9
1 files changed, 7 insertions, 2 deletions
diff --git a/cc/sabi.go b/cc/sabi.go
index f5a7c774..42b2f352 100644
--- a/cc/sabi.go
+++ b/cc/sabi.go
@@ -74,8 +74,13 @@ func (sabimod *sabi) flags(ctx ModuleContext, flags Flags) Flags {
// RSClang does not support recent mcpu option likes exynos-m2.
// So we need overriding mcpu option when we want to use it.
- if ctx.Arch().CpuVariant == "exynos-m2" {
- flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu=cortex-a53")
+ mappedArch := map[string]string{
+ "exynos-m2": "cortex-a53",
+ "cortex-a55": "cortex-a53",
+ "cortex-a75": "cortex-a57",
+ }
+ if arch, ok := mappedArch[ctx.Arch().CpuVariant]; ok {
+ flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu="+arch)
}
return flags