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author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-09-15 11:02:58 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2010-03-02 10:10:50 -0800 |
commit | b50964027bef249a0cc3d511de05c2464e0a1e22 (patch) | |
tree | 922ef89b71b606f50087e7a41d7efd799f473c0c /intel/intel_bufmgr.c | |
parent | 9a37455b35d746d694760cfe8850a8bf856d73c9 (diff) | |
download | libdrm-sun4i-b50964027bef249a0cc3d511de05c2464e0a1e22.tar.gz libdrm-sun4i-b50964027bef249a0cc3d511de05c2464e0a1e22.tar.bz2 libdrm-sun4i-b50964027bef249a0cc3d511de05c2464e0a1e22.zip |
libdrm/intel: execbuf2 support
This patch to libdrm adds support for the new execbuf2 ioctl. If
detected, it will be used instead of the old ioctl. By using the new
drm_intel_bufmgr_gem_enable_fenced_relocs(), you can indicate that any
time a fence register is actually required for a relocation target you
will call drm_intel_bo_emit_reloc_fence instead of
drm_intel_bo_emit_reloc, which will reduce fence register pressure.
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'intel/intel_bufmgr.c')
-rw-r--r-- | intel/intel_bufmgr.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c index 61817739..ce21a332 100644 --- a/intel/intel_bufmgr.c +++ b/intel/intel_bufmgr.c @@ -173,6 +173,18 @@ drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, read_domains, write_domain); } +/* For fence registers, not GL fences */ +int +drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, + drm_intel_bo *target_bo, uint32_t target_offset, + uint32_t read_domains, uint32_t write_domain) +{ + return bo->bufmgr->bo_emit_reloc_fence(bo, offset, + target_bo, target_offset, + read_domains, write_domain); +} + + int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment) { if (bo->bufmgr->bo_pin) |