From fc787ecd91127b2c8458afd94e5148e2ae51a1f5 Mon Sep 17 00:00:00 2001 From: Ian Rogers Date: Thu, 9 Oct 2014 21:56:44 -0700 Subject: Enable -Wimplicit-fallthrough. Falling through switch cases on a clang build must now annotate the fallthrough with the FALLTHROUGH_INTENDED macro. Bug: 17731372 Change-Id: I836451cd5f96b01d1ababdbf9eef677fe8fa8324 --- compiler/dex/local_value_numbering.cc | 11 +++++------ compiler/dex/mir_graph.cc | 8 ++++---- compiler/dex/quick/arm/assemble_arm.cc | 2 +- compiler/dex/quick/arm/int_arm.cc | 8 ++++++-- compiler/dex/quick/arm/utility_arm.cc | 2 +- compiler/dex/quick/arm64/assemble_arm64.cc | 10 +++++----- compiler/dex/quick/arm64/utility_arm64.cc | 2 +- compiler/dex/quick/gen_common.cc | 2 +- compiler/dex/quick/gen_invoke.cc | 9 ++++++--- compiler/dex/quick/mips/assemble_mips.cc | 2 ++ compiler/dex/quick/mir_to_lir.cc | 5 ++--- compiler/dex/quick/x86/int_x86.cc | 28 ++++++++++++++-------------- compiler/dex/quick/x86/utility_x86.cc | 8 +++++--- 13 files changed, 53 insertions(+), 44 deletions(-) (limited to 'compiler/dex') diff --git a/compiler/dex/local_value_numbering.cc b/compiler/dex/local_value_numbering.cc index e411164f3..eb9891606 100644 --- a/compiler/dex/local_value_numbering.cc +++ b/compiler/dex/local_value_numbering.cc @@ -1460,7 +1460,7 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { uint16_t reg = GetOperandValue(mir->ssa_rep->uses[0]); HandleNullCheck(mir, reg); } - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::INVOKE_STATIC: case Instruction::INVOKE_STATIC_RANGE: // Make ref args aliasing. @@ -1583,7 +1583,7 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { uint16_t reg = GetOperandValue(mir->ssa_rep->uses[0]); HandleNullCheck(mir, reg); } - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::NEG_INT: case Instruction::NOT_INT: case Instruction::NEG_FLOAT: @@ -1610,7 +1610,6 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { } break; - case Instruction::DOUBLE_TO_LONG: case Instruction::LONG_TO_DOUBLE: case Instruction::NEG_LONG: @@ -1782,7 +1781,7 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { case Instruction::APUT_OBJECT: HandlePutObject(mir); - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::APUT: case Instruction::APUT_WIDE: case Instruction::APUT_BYTE: @@ -1804,7 +1803,7 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { case Instruction::IPUT_OBJECT: HandlePutObject(mir); - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::IPUT: case Instruction::IPUT_WIDE: case Instruction::IPUT_BOOLEAN: @@ -1826,7 +1825,7 @@ uint16_t LocalValueNumbering::GetValueNumber(MIR* mir) { case Instruction::SPUT_OBJECT: HandlePutObject(mir); - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::SPUT: case Instruction::SPUT_WIDE: case Instruction::SPUT_BOOLEAN: diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc index 7dfdc760b..f0c985862 100644 --- a/compiler/dex/mir_graph.cc +++ b/compiler/dex/mir_graph.cc @@ -391,7 +391,7 @@ bool MIRGraph::IsBadMonitorExitCatch(NarrowDexOffset monitor_exit_offset, switch (check_insn->Opcode()) { case Instruction::MOVE_WIDE: wide = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::MOVE_OBJECT: case Instruction::MOVE: dest = check_insn->VRegA_12x(); @@ -399,7 +399,7 @@ bool MIRGraph::IsBadMonitorExitCatch(NarrowDexOffset monitor_exit_offset, case Instruction::MOVE_WIDE_FROM16: wide = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::MOVE_OBJECT_FROM16: case Instruction::MOVE_FROM16: dest = check_insn->VRegA_22x(); @@ -407,7 +407,7 @@ bool MIRGraph::IsBadMonitorExitCatch(NarrowDexOffset monitor_exit_offset, case Instruction::MOVE_WIDE_16: wide = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case Instruction::MOVE_OBJECT_16: case Instruction::MOVE_16: dest = check_insn->VRegA_32x(); @@ -417,7 +417,7 @@ bool MIRGraph::IsBadMonitorExitCatch(NarrowDexOffset monitor_exit_offset, case Instruction::GOTO_16: case Instruction::GOTO_32: check_insn = check_insn->RelativeAt(check_insn->GetTargetOffset()); - // Intentional fall-through. + FALLTHROUGH_INTENDED; default: return check_insn->Opcode() == Instruction::MONITOR_EXIT && check_insn->VRegA_11x() == monitor_reg; diff --git a/compiler/dex/quick/arm/assemble_arm.cc b/compiler/dex/quick/arm/assemble_arm.cc index cf3494896..4e20d7660 100644 --- a/compiler/dex/quick/arm/assemble_arm.cc +++ b/compiler/dex/quick/arm/assemble_arm.cc @@ -1265,7 +1265,7 @@ void ArmMir2Lir::AssembleLIR() { if (lir->operands[1] != rs_r15pc.GetReg()) { break; } - // NOTE: intentional fallthrough. + FALLTHROUGH_INTENDED; case kFixupLoad: { /* * PC-relative loads are mostly used to load immediates diff --git a/compiler/dex/quick/arm/int_arm.cc b/compiler/dex/quick/arm/int_arm.cc index 8f1261d30..018dc1c0c 100644 --- a/compiler/dex/quick/arm/int_arm.cc +++ b/compiler/dex/quick/arm/int_arm.cc @@ -49,12 +49,13 @@ LIR* ArmMir2Lir::OpIT(ConditionCode ccode, const char* guide) { int cond_bit = code & 1; int alt_bit = cond_bit ^ 1; - // Note: case fallthroughs intentional switch (strlen(guide)) { case 3: mask1 = (guide[2] == 'T') ? cond_bit : alt_bit; + FALLTHROUGH_INTENDED; case 2: mask2 = (guide[1] == 'T') ? cond_bit : alt_bit; + FALLTHROUGH_INTENDED; case 1: mask3 = (guide[0] == 'T') ? cond_bit : alt_bit; break; @@ -62,6 +63,7 @@ LIR* ArmMir2Lir::OpIT(ConditionCode ccode, const char* guide) { break; default: LOG(FATAL) << "OAT: bad case in OpIT"; + UNREACHABLE(); } mask = (mask3 << 3) | (mask2 << 2) | (mask1 << 1) | (1 << (3 - strlen(guide))); @@ -77,12 +79,13 @@ void ArmMir2Lir::UpdateIT(LIR* it, const char* new_guide) { int cond_bit = code & 1; int alt_bit = cond_bit ^ 1; - // Note: case fallthroughs intentional switch (strlen(new_guide)) { case 3: mask1 = (new_guide[2] == 'T') ? cond_bit : alt_bit; + FALLTHROUGH_INTENDED; case 2: mask2 = (new_guide[1] == 'T') ? cond_bit : alt_bit; + FALLTHROUGH_INTENDED; case 1: mask3 = (new_guide[0] == 'T') ? cond_bit : alt_bit; break; @@ -90,6 +93,7 @@ void ArmMir2Lir::UpdateIT(LIR* it, const char* new_guide) { break; default: LOG(FATAL) << "OAT: bad case in UpdateIT"; + UNREACHABLE(); } mask = (mask3 << 3) | (mask2 << 2) | (mask1 << 1) | (1 << (3 - strlen(new_guide))); diff --git a/compiler/dex/quick/arm/utility_arm.cc b/compiler/dex/quick/arm/utility_arm.cc index bba1a8c65..e833c9a62 100644 --- a/compiler/dex/quick/arm/utility_arm.cc +++ b/compiler/dex/quick/arm/utility_arm.cc @@ -494,7 +494,7 @@ LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, in (value <= 1020) && ((value & 0x3) == 0)) { return NewLIR3(kThumbAddPcRel, r_dest.GetReg(), r_src1.GetReg(), value >> 2); } - // Note: intentional fallthrough + FALLTHROUGH_INTENDED; case kOpSub: if (all_low_regs && ((abs_value & 0x7) == abs_value)) { if (op == kOpAdd) diff --git a/compiler/dex/quick/arm64/assemble_arm64.cc b/compiler/dex/quick/arm64/assemble_arm64.cc index 7c663a941..e2ff09029 100644 --- a/compiler/dex/quick/arm64/assemble_arm64.cc +++ b/compiler/dex/quick/arm64/assemble_arm64.cc @@ -705,16 +705,16 @@ uint8_t* Arm64Mir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) { switch (kind) { case kFmtRegX: want_64_bit = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case kFmtRegW: want_var_size = false; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case kFmtRegR: want_zero = true; break; case kFmtRegXOrSp: want_64_bit = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case kFmtRegWOrSp: want_var_size = false; break; @@ -722,10 +722,10 @@ uint8_t* Arm64Mir2Lir::EncodeLIRs(uint8_t* write_pos, LIR* lir) { break; case kFmtRegD: want_64_bit = true; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case kFmtRegS: want_var_size = false; - // Intentional fall-through. + FALLTHROUGH_INTENDED; case kFmtRegF: want_float = true; break; diff --git a/compiler/dex/quick/arm64/utility_arm64.cc b/compiler/dex/quick/arm64/utility_arm64.cc index 38670ff8b..088369403 100644 --- a/compiler/dex/quick/arm64/utility_arm64.cc +++ b/compiler/dex/quick/arm64/utility_arm64.cc @@ -833,7 +833,7 @@ LIR* Arm64Mir2Lir::OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1 value); case kOpAdd: neg = !neg; - // Note: intentional fallthrough + FALLTHROUGH_INTENDED; case kOpSub: // Add and sub below read/write sp rather than xzr. if (abs_value < 0x1000) { diff --git a/compiler/dex/quick/gen_common.cc b/compiler/dex/quick/gen_common.cc index 3a3821f80..12ca065de 100644 --- a/compiler/dex/quick/gen_common.cc +++ b/compiler/dex/quick/gen_common.cc @@ -1785,7 +1785,7 @@ void Mir2Lir::GenArithOpIntLit(Instruction::Code opcode, RegLocation rl_dest, Re case Instruction::SUB_INT: case Instruction::SUB_INT_2ADDR: lit = -lit; - // Intended fallthrough + FALLTHROUGH_INTENDED; case Instruction::ADD_INT: case Instruction::ADD_INT_2ADDR: case Instruction::ADD_INT_LIT8: diff --git a/compiler/dex/quick/gen_invoke.cc b/compiler/dex/quick/gen_invoke.cc index 408c73d1b..2bef7c53c 100755 --- a/compiler/dex/quick/gen_invoke.cc +++ b/compiler/dex/quick/gen_invoke.cc @@ -552,7 +552,8 @@ static int NextSDCallInsn(CompilationUnit* cu, CallInfo* info, } else { break; } - // Intentional fallthrough for x86 + DCHECK(cu->instruction_set == kX86 || cu->instruction_set == kX86_64); + FALLTHROUGH_INTENDED; default: return -1; } @@ -596,7 +597,8 @@ static int NextVCallInsn(CompilationUnit* cu, CallInfo* info, if (CommonCallCodeLoadCodePointerIntoInvokeTgt(info, nullptr, cu, cg)) { break; // kInvokeTgt := kArg0->entrypoint } - // Intentional fallthrough for X86 + DCHECK(cu->instruction_set == kX86 || cu->instruction_set == kX86_64); + FALLTHROUGH_INTENDED; default: return -1; } @@ -641,7 +643,8 @@ static int NextInterfaceCallInsn(CompilationUnit* cu, CallInfo* info, int state, if (CommonCallCodeLoadCodePointerIntoInvokeTgt(info, nullptr, cu, cg)) { break; // kInvokeTgt := kArg0->entrypoint } - // Intentional fallthrough for X86 + DCHECK(cu->instruction_set == kX86 || cu->instruction_set == kX86_64); + FALLTHROUGH_INTENDED; default: return -1; } diff --git a/compiler/dex/quick/mips/assemble_mips.cc b/compiler/dex/quick/mips/assemble_mips.cc index c7e9190ed..01d1a1e0d 100644 --- a/compiler/dex/quick/mips/assemble_mips.cc +++ b/compiler/dex/quick/mips/assemble_mips.cc @@ -465,6 +465,7 @@ void MipsMir2Lir::ConvertShortToLongBranch(LIR* lir) { switch (opcode) { case kMipsBal: LOG(FATAL) << "long branch and link unsupported"; + UNREACHABLE(); case kMipsB: unconditional = true; break; @@ -478,6 +479,7 @@ void MipsMir2Lir::ConvertShortToLongBranch(LIR* lir) { case kMipsBnez: opcode = kMipsBeqz; break; default: LOG(FATAL) << "Unexpected branch kind " << opcode; + UNREACHABLE(); } LIR* hop_target = NULL; if (!unconditional) { diff --git a/compiler/dex/quick/mir_to_lir.cc b/compiler/dex/quick/mir_to_lir.cc index 0ac1299c5..439998127 100644 --- a/compiler/dex/quick/mir_to_lir.cc +++ b/compiler/dex/quick/mir_to_lir.cc @@ -482,7 +482,7 @@ void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list case Instruction::RETURN_OBJECT: DCHECK(rl_src[0].ref); - // Intentional fallthrough. + FALLTHROUGH_INTENDED; case Instruction::RETURN: if (!kLeafOptimization || !mir_graph_->MethodIsLeaf()) { GenSuspendTest(opt_flags); @@ -1031,8 +1031,7 @@ void Mir2Lir::CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list GenArithImmOpLong(opcode, rl_dest, rl_src[0], rl_src[1]); break; } - // Note: intentional fallthrough. - + FALLTHROUGH_INTENDED; case Instruction::MUL_LONG: case Instruction::DIV_LONG: case Instruction::REM_LONG: diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc index 517717698..07034cb8d 100755 --- a/compiler/dex/quick/x86/int_x86.cc +++ b/compiler/dex/quick/x86/int_x86.cc @@ -2930,25 +2930,25 @@ void X86Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, break; case Instruction::ADD_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::ADD_INT: op = kOpAdd; break; case Instruction::SUB_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::SUB_INT: op = kOpSub; break; case Instruction::MUL_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::MUL_INT: op = kOpMul; break; case Instruction::DIV_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::DIV_INT: op = kOpDiv; is_div_rem = true; @@ -2956,46 +2956,46 @@ void X86Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, /* NOTE: returns in kArg1 */ case Instruction::REM_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::REM_INT: op = kOpRem; is_div_rem = true; break; case Instruction::AND_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::AND_INT: op = kOpAnd; break; case Instruction::OR_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::OR_INT: op = kOpOr; break; case Instruction::XOR_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::XOR_INT: op = kOpXor; break; case Instruction::SHL_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::SHL_INT: shift_op = true; op = kOpLsl; break; case Instruction::SHR_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::SHR_INT: shift_op = true; op = kOpAsr; break; case Instruction::USHR_INT_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::USHR_INT: shift_op = true; op = kOpLsr; @@ -3245,19 +3245,19 @@ void X86Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, switch (opcode) { case Instruction::SHL_LONG_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::SHL_LONG: op = kOpLsl; break; case Instruction::SHR_LONG_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::SHR_LONG: op = kOpAsr; break; case Instruction::USHR_LONG_2ADDR: is_two_addr = true; - // Fallthrough + FALLTHROUGH_INTENDED; case Instruction::USHR_LONG: op = kOpLsr; break; diff --git a/compiler/dex/quick/x86/utility_x86.cc b/compiler/dex/quick/x86/utility_x86.cc index 6898b5078..8d5dabc5f 100644 --- a/compiler/dex/quick/x86/utility_x86.cc +++ b/compiler/dex/quick/x86/utility_x86.cc @@ -657,7 +657,8 @@ LIR* X86Mir2Lir::LoadBaseIndexedDisp(RegStorage r_base, RegStorage r_index, int CHECK_EQ(is_array, false); CHECK_EQ(r_dest.IsFloat(), false); break; - } // else fall-through to k32 case + } + FALLTHROUGH_INTENDED; // else fall-through to k32 case case k32: case kSingle: case kReference: // TODO: update for reference decompression on 64-bit targets. @@ -791,7 +792,7 @@ LIR* X86Mir2Lir::StoreBaseIndexedDisp(RegStorage r_base, RegStorage r_index, int switch (size) { case k64: consider_non_temporal = true; - // Fall through! + FALLTHROUGH_INTENDED; case kDouble: if (r_src.IsFloat()) { opcode = is_array ? kX86MovsdAR : kX86MovsdMR; @@ -810,7 +811,8 @@ LIR* X86Mir2Lir::StoreBaseIndexedDisp(RegStorage r_base, RegStorage r_index, int CHECK_EQ(r_src.IsFloat(), false); consider_non_temporal = true; break; - } // else fall-through to k32 case + } + FALLTHROUGH_INTENDED; // else fall-through to k32 case case k32: case kSingle: case kReference: -- cgit v1.2.3