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authorVladimir Marko <vmarko@google.com>2015-04-23 18:11:04 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2015-04-23 18:11:04 +0000
commit633a37ece49c5afcf3fa9a89692f07d19c56229b (patch)
treef90545c44e4533b55136ccd90fe197bc9f92bb18
parent360475aba293267398a17184b5330fd857f9b296 (diff)
parent084f7d43f4dc38bfc71446b1a3b07af085d778bf (diff)
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Merge "Quick: Fix out of temp regs in ArmMir2Lir::GenMulLong()."
-rw-r--r--compiler/dex/quick/arm/int_arm.cc12
1 files changed, 7 insertions, 5 deletions
diff --git a/compiler/dex/quick/arm/int_arm.cc b/compiler/dex/quick/arm/int_arm.cc
index 8d20f1b37..7598e5097 100644
--- a/compiler/dex/quick/arm/int_arm.cc
+++ b/compiler/dex/quick/arm/int_arm.cc
@@ -1326,11 +1326,6 @@ void ArmMir2Lir::GenMulLong(Instruction::Code opcode, RegLocation rl_dest,
}
}
- // Now, restore lr to its non-temp status.
- FreeTemp(tmp1);
- Clobber(rs_rARM_LR);
- UnmarkTemp(rs_rARM_LR);
-
if (reg_status != 0) {
// We had manually allocated registers for rl_result.
// Now construct a RegLocation.
@@ -1338,7 +1333,14 @@ void ArmMir2Lir::GenMulLong(Instruction::Code opcode, RegLocation rl_dest,
rl_result.reg = RegStorage::MakeRegPair(res_lo, res_hi);
}
+ // Free tmp1 but keep LR as temp for StoreValueWide() if needed.
+ FreeTemp(tmp1);
+
StoreValueWide(rl_dest, rl_result);
+
+ // Now, restore lr to its non-temp status.
+ Clobber(rs_rARM_LR);
+ UnmarkTemp(rs_rARM_LR);
}
void ArmMir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,