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author | mahongpe <hongpeng.ma@intel.com> | 2013-12-26 03:10:25 +0800 |
---|---|---|
committer | Patrick Tjin <pattjin@google.com> | 2014-07-21 22:06:32 -0700 |
commit | 1e66bff1c3e23efcc9b01a9e68ab92323222fc72 (patch) | |
tree | 0f8358d8cbf26deb74833d04feaf353434c3f4e4 /src | |
parent | 768afdd6990a634451b96fc0ada6855885e16d00 (diff) | |
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update width and height of VP8 MB to be 16 bit aligned for error concealment.
BZ:160924
For 1080p VP8 video playback, width and height of VP8 MB should be aligned to 16-bit,
which is required for error concealment.
Change-Id: I4f4d81aa93d6d26cfbbc1bbafcb52d196f4873fd
Signed-off-by: mahongpe <hongpeng.ma@intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/tng_VP8.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/tng_VP8.c b/src/tng_VP8.c index 427740e..3aa808e 100644 --- a/src/tng_VP8.c +++ b/src/tng_VP8.c @@ -1526,8 +1526,8 @@ static VAStatus tng_VP8_EndPicture( &target_surface->buf, &ec_target->psb_surface->buf, NULL, - ctx->pic_params->frame_width/16, - ctx->pic_params->frame_height/16, + (ctx->pic_params->frame_width+15)/16, + (ctx->pic_params->frame_height+15)/16, rotation_flags, 2,//ctx->field_type, ext_stride_a, |