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authorRamkumar Radhakrishnan <ramkumar@codeaurora.org>2014-05-15 15:46:35 -0700
committerSteve Kondik <shade@chemlab.org>2014-06-30 09:37:15 -0700
commit5fb19b1c10c55f0f72a01641487274feba09c9bc (patch)
tree68fd5df96a6e65b0cec2397f5c05f304e97f012f
parent3305392380ac7c10933c397598ec6623e6a0da80 (diff)
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sf: Validate display device id and disable dirtyrect composition
1. Add validation check for display device id to prevent out of bound array access. 2. Disable Dirty rect composition feature for GPU by default Change-Id: I4976468bb156fff197c8c38fe680e10512b4feb5
-rw-r--r--services/surfaceflinger/DisplayHardware/HWComposer.cpp12
-rw-r--r--services/surfaceflinger/SurfaceFlinger.cpp2
2 files changed, 12 insertions, 2 deletions
diff --git a/services/surfaceflinger/DisplayHardware/HWComposer.cpp b/services/surfaceflinger/DisplayHardware/HWComposer.cpp
index 99fc152b3..6b810c862 100644
--- a/services/surfaceflinger/DisplayHardware/HWComposer.cpp
+++ b/services/surfaceflinger/DisplayHardware/HWComposer.cpp
@@ -1533,6 +1533,8 @@ HWComposer::DisplayData::~DisplayData() {
#ifdef QCOM_BSP
//======================== GPU TiledRect/DR changes =====================
bool HWComposer::areVisibleRegionsOverlapping(int32_t id ) {
+ if (!mHwc || uint32_t(id)>31 || !mAllocatedDisplayIDs.hasBit(id))
+ return false;
const Vector< sp<Layer> >& currentLayers =
mFlinger->getLayerSortedByZForHwcDisplay(id);
size_t count = currentLayers.size();
@@ -1550,6 +1552,8 @@ bool HWComposer::areVisibleRegionsOverlapping(int32_t id ) {
}
bool HWComposer::needsScaling(int32_t id) {
+ if (!mHwc || uint32_t(id)>31 || !mAllocatedDisplayIDs.hasBit(id))
+ return false;
DisplayData& disp(mDisplayData[id]);
for (size_t i=0; i<disp.list->numHwLayers-1; i++) {
int dst_w, dst_h, src_w, src_h;
@@ -1575,6 +1579,8 @@ bool HWComposer::needsScaling(int32_t id) {
}
void HWComposer::computeUnionDirtyRect(int32_t id, Rect& unionDirtyRect) {
+ if (!mHwc || uint32_t(id)>31 || !mAllocatedDisplayIDs.hasBit(id))
+ return;
const Vector< sp<Layer> >& currentLayers =
mFlinger->getLayerSortedByZForHwcDisplay(id);
size_t count = currentLayers.size();
@@ -1607,6 +1613,8 @@ void HWComposer::computeUnionDirtyRect(int32_t id, Rect& unionDirtyRect) {
}
bool HWComposer::isGeometryChanged(int32_t id) {
+ if (!mHwc || uint32_t(id)>31 || !mAllocatedDisplayIDs.hasBit(id))
+ return false;
DisplayData& disp(mDisplayData[id]);
return ( disp.list->flags & HWC_GEOMETRY_CHANGED );
}
@@ -1615,8 +1623,10 @@ bool HWComposer::isGeometryChanged(int32_t id) {
* 2. if overlapping visible regions present.
* 3. Compute a Union Dirty Rect to operate on. */
bool HWComposer::canUseTiledDR(int32_t id, Rect& unionDr ){
- bool status = true;
+ if (!mHwc || uint32_t(id)>31 || !mAllocatedDisplayIDs.hasBit(id))
+ return false;
+ bool status = true;
if (isGeometryChanged(id)) {
ALOGD_IF(GPUTILERECT_DEBUG, "GPUTileRect : geometrychanged, disable");
status = false;
diff --git a/services/surfaceflinger/SurfaceFlinger.cpp b/services/surfaceflinger/SurfaceFlinger.cpp
index 5bb164026..2d3d5d3cf 100644
--- a/services/surfaceflinger/SurfaceFlinger.cpp
+++ b/services/surfaceflinger/SurfaceFlinger.cpp
@@ -183,7 +183,7 @@ SurfaceFlinger::SurfaceFlinger()
}
}
#ifdef QCOM_BSP
- property_get("debug.sf.gpu_comp_tiling", value, "1");
+ property_get("debug.sf.gpu_comp_tiling", value, "0");
mGpuTileRenderEnable = atoi(value) ? true : false;
if(mGpuTileRenderEnable)
ALOGV("DirtyRect optimization enabled for FULL GPU Composition");