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|
#undef ARCH_ARM
#define ARCH_ARM 1
#define ARCH_MIPS 0
#define ARCH_X86 0
#define ARCH_X86_32 0
#define HAVE_ARMV5TE 1
#define HAVE_ARMV6 1
#define HAVE_ARMV6T2 1
#define HAVE_NEON 1
#define HAVE_VFP 1
#define HAVE_VFPV3 1
#define HAVE_AMD3DNOW 0
#define HAVE_AMD3DNOWEXT 0
#define HAVE_AVX 0
#define HAVE_AVX2 0
#define HAVE_FMA4 0
#define HAVE_MMX 0
#define HAVE_MMXEXT 0
#define HAVE_SSE 0
#define HAVE_SSE2 0
#define HAVE_SSE3 0
#define HAVE_SSE4 0
#define HAVE_SSE42 0
#define HAVE_SSSE3 0
#define HAVE_MIPS32R2 0
#define HAVE_ARMV5TE_EXTERNAL 1
#define HAVE_ARMV6_EXTERNAL 1
#define HAVE_ARMV6T2_EXTERNAL 1
#define HAVE_NEON_EXTERNAL 0
#define HAVE_VFP_EXTERNAL 1
#define HAVE_VFPV3_EXTERNAL 1
#define HAVE_AMD3DNOW_EXTERNAL 0
#define HAVE_AMD3DNOWEXT_EXTERNAL 0
#define HAVE_AVX_EXTERNAL 0
#define HAVE_AVX2_EXTERNAL 0
#define HAVE_FMA4_EXTERNAL 0
#define HAVE_MMX_EXTERNAL 0
#define HAVE_MMXEXT_EXTERNAL 0
#define HAVE_SSE_EXTERNAL 0
#define HAVE_SSE2_EXTERNAL 0
#define HAVE_SSE3_EXTERNAL 0
#define HAVE_SSE4_EXTERNAL 0
#define HAVE_SSE42_EXTERNAL 0
#define HAVE_SSSE3_EXTERNAL 0
#define HAVE_ARMV5TE_INLINE 1
#define HAVE_ARMV6_INLINE 1
#define HAVE_ARMV6T2_INLINE 1
#define HAVE_NEON_INLINE 0
#define HAVE_VFP_INLINE 1
#define HAVE_VFPV3_INLINE 1
#define HAVE_AMD3DNOW_INLINE 0
#define HAVE_AMD3DNOWEXT_INLINE 0
#define HAVE_AVX_INLINE 0
#define HAVE_AVX2_INLINE 0
#define HAVE_FMA4_INLINE 0
#define HAVE_MMX_INLINE 0
#define HAVE_MMXEXT_INLINE 0
#define HAVE_SSE_INLINE 0
#define HAVE_SSE2_INLINE 0
#define HAVE_SSE3_INLINE 0
#define HAVE_SSE4_INLINE 0
#define HAVE_SSE42_INLINE 0
#define HAVE_SSSE3_INLINE 0
#define HAVE_YASM 0
#define HAVE_FAST_UNALIGNED 1
#define HAVE_ALIGNED_STACK 0
#define HAVE_ASM_MOD_Q 1
#define HAVE_ASM_MOD_Y 0
#define HAVE_CPUNOP 0
#define HAVE_EBP_AVAILABLE 0
#define HAVE_FAST_CMOV 0
#define HAVE_LOCAL_ALIGNED_16 0
#define HAVE_LOCAL_ALIGNED_8 0
#define HAVE_MM_EMPTY 0
#define HAVE_XMM_CLOBBERS 0
#define CONFIG_FAST_UNALIGNED 1
#define CONFIG_THUMB 1
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