From 2ad60cfc28e14ee8f0bb038720836a4696c478ad Mon Sep 17 00:00:00 2001 From: The Android Open Source Project Date: Tue, 21 Oct 2008 07:00:00 -0700 Subject: Initial Contribution --- docs/dalvik-bytecode.html | 1485 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1485 insertions(+) create mode 100644 docs/dalvik-bytecode.html (limited to 'docs/dalvik-bytecode.html') diff --git a/docs/dalvik-bytecode.html b/docs/dalvik-bytecode.html new file mode 100644 index 000000000..fc3cf0b9b --- /dev/null +++ b/docs/dalvik-bytecode.html @@ -0,0 +1,1485 @@ + + + + + +Bytecode for the Dalvik VM + + + + + +

Bytecode for the Dalvik VM

+

Copyright © 2007 The Android Open Source Project + +

General Design

+ + + +

Summary of Instruction Set

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Op & FormatMnemonic / SyntaxArgumentsDescription
00 10xnop Waste cycles.
01 12xmove vA, vBA: destination register (4 bits)
+ B: source register (4 bits)		Move the contents of one non-object register to another.
02 22xmove/from16 vAA, vBBBBA: destination register (8 bits)
+ B: source register (16 bits)		Move the contents of one non-object register to another.
03 32xmove/16 vAAAA, vBBBBA: destination register (16 bits)
+ B: source register (16 bits)		Move the contents of one non-object register to another.
04 12xmove-wide vA, vBA: destination register pair (4 bits)
+ B: source register pair (4 bits)		Move the contents of one register-pair to another. +

Note: + It is legal to move from vN to either + vN-1 or vN+1, so implementations + must arrange for both halves of a register pair to be read before + anything is written.

+
05 22xmove-wide/from16 vAA, vBBBBA: destination register pair (8 bits)
+ B: source register pair (16 bits)		Move the contents of one register-pair to another. +

Note: + Implementation considerations are the same as move-wide, + above.

+
06 32xmove-wide/16 vAAAA, vBBBBA: destination register pair (16 bits)
+ B: source register pair (16 bits)		Move the contents of one register-pair to another. +

Note: + Implementation considerations are the same as move-wide, + above.

+
07 12xmove-object vA, vBA: destination register (4 bits)
+ B: source register (4 bits)		Move the contents of one object-bearing register to another.
08 22xmove-object/from16 vAA, vBBBBA: destination register (8 bits)
+ B: source register (16 bits)		Move the contents of one object-bearing register to another.
09 32xmove-object/16 vAAAA, vBBBBA: destination register (16 bits)
+ B: source register (16 bits)		Move the contents of one object-bearing register to another.
0a 11xmove-result vAAA: destination register (8 bits)Move the single-word non-object result of the most recent + invoke-kind into the indicated register. + This must be done as the instruction immediately after an + invoke-kind whose (single-word, non-object) result + is not to be ignored; anywhere else is invalid.
0b 11xmove-result-wide vAAA: destination register pair (8 bits)Move the double-word result of the most recent + invoke-kind into the indicated register pair. + This must be done as the instruction immediately after an + invoke-kind whose (double-word) result + is not to be ignored; anywhere else is invalid.
0c 11xmove-result-object vAAA: destination register (8 bits)Move the object result of the most recent invoke-kind + into the indicated register. This must be done as the instruction + immediately after an invoke-kind or + filled-new-array + whose (object) result is not to be ignored; anywhere else is invalid.
0d 11xmove-exception vAAA: destination register (8 bits)Save a just-caught exception into the given register. This should + be the first instruction of any exception handler whose caught + exception is not to be ignored, and this instruction may only + ever occur as the first instruction of an exception handler; anywhere + else is invalid.
0e 10xreturn-void Return from a void method.
0f 11xreturn vAAA: return value register (8 bits)Return from a single-width (32-bit) non-object value-returning + method. +
10 11xreturn-wide vAAA: return value register-pair (8 bits)Return from a double-width (64-bit) value-returning method.
11 11xreturn-object vAAA: return value register (8 bits)Return from an object-returning method.
12 11nconst/4 vA, #+BA: destination register (4 bits)
+ B: signed int (4 bits)		Move the given literal value (sign-extended to 32 bits) into + the specified register.
13 21sconst/16 vAA, #+BBBBA: destination register (8 bits)
+ B: signed int (16 bits)		Move the given literal value (sign-extended to 32 bits) into + the specified register.
14 31iconst vAA, #+BBBBBBBBA: destination register (8 bits)
+ B: arbitrary 32-bit constant		Move the given literal value into the specified register.
15 21hconst/high16 vAA, #+BBBB0000A: destination register (8 bits)
+ B: signed int (16 bits)		Move the given literal value (right-zero-extended to 32 bits) into + the specified register.
16 21sconst-wide/16 vAA, #+BBBBA: destination register (8 bits)
+ B: signed int (16 bits)		Move the given literal value (sign-extended to 64 bits) into + the specified register-pair.
17 31iconst-wide/32 vAA, #+BBBBBBBBA: destination register (8 bits)
+ B: signed int (32 bits)		Move the given literal value (sign-extended to 64 bits) into + the specified register-pair.
18 51lconst-wide vAA, #+BBBBBBBBBBBBBBBBA: destination register (8 bits)
+ B: arbitrary double-width (64-bit) constant		Move the given literal value into + the specified register-pair.
19 21hconst-wide/high16 vAA, #+BBBB000000000000A: destination register (8 bits)
+ B: signed int (16 bits)		Move the given literal value (right-zero-extended to 64 bits) into + the specified register-pair.
1a 21cconst-string vAA, string@BBBBA: destination register (8 bits)
+ B: string index		Move a reference to the string specified by the given index into the + specified register.
1b 31cconst-string/jumbo vAA, string@BBBBBBBBA: destination register (8 bits)
+ B: string index		Move a reference to the string specified by the given index into the + specified register.
1c 21cconst-class vAA, type@BBBBA: destination register (8 bits)
+ B: type index		Move a reference to the class specified by the given index into the + specified register. In the case where the indicated type is primitive, + this will store a reference to the primitive type's degenerate + class.
1d 11xmonitor-enter vAAA: reference-bearing register (8 bits)Acquire the monitor for the indicated object.
1e 11xmonitor-exit vAAA: reference-bearing register (8 bits)Release the monitor for the indicated object. +

Note: + If this instruction needs to throw an exception, it must do + so as if the pc has already advanced past the instruction. + It may be useful to think of this as the instruction successfully + executing (in a sense), and the exception getting thrown after + the instruction but before the next one gets a chance to + run. This definition makes it possible for a method to use + a monitor cleanup catch-all (e.g., finally) block as + the monitor cleanup for that block itself, as a way to handle the + arbitrary exceptions that might get thrown due to the historical + implementation of Thread.stop(), while still managing + to have proper monitor hygiene.

+
1f 21ccheck-cast vAA, type@BBBBA: reference-bearing register (8 bits)
+ B: type index (16 bits)		Throw if the reference in the given register cannot be cast to the + indicated type. The type must be a reference type (not a primitive + type).
20 22cinstance-of vA, vB, type@CCCCA: destination register (4 bits)
+ B: reference-bearing register (4 bits)
+ C: type index (16 bits)		Store in the given destination register 1 + if the indicated reference is an instance of the given type, + or 0 if not. The type must be a + reference type (not a primitive type).
21 12xarray-length vA, vBA: destination register (4 bits)
+ B: array reference-bearing register (4 bits)		Store in the given destination register the length of the indicated + array, in entries
22 21cnew-instance vAA, type@BBBBA: destination register (8 bits)
+ B: type index		Construct a new instance of the indicated type, storing a + reference to it in the destination. The type must refer to a + non-array class.
23 22cnew-array vA, vB, type@CCCCA: destination register (8 bits)
+ B: size register
+ C: type index		Construct a new array of the indicated type and size. The type + must be an array type.
24 35cfilled-new-array {vD, vE, vF, vG, vA}, type@CCCCB: array size and argument word count (4 bits)
+ C: type index (16 bits)
+ D..G, A: argument registers (4 bits each)		Construct an array of the given type and size, filling it with the + supplied contents. The type must be an array type. The array's + contents must be single-word (that is, + no arrays of long or double). The constructed + instance is stored as a "result" in the same way that the method invocation + instructions store their results, so the constructed instance must + be moved to a register with a subsequent + move-result-object instruction (if it is to be used).
25 3rcfilled-new-array/range {vCCCC .. vNNNN}, type@BBBBA: array size and argument word count (8 bits)
+ B: type index (16 bits)
+ C: first argument register (16 bits)
+ N = A + C - 1		Construct an array of the given type and size, filling it with + the supplied contents. Clarifications and restrictions are the same + as filled-new-array, described above.
26 31tfill-array-data vAA, +BBBBBBBB (with supplemental data as specified + below in "fill-array-data Format")A: array reference (8 bits)
+ B: signed "branch" offset to table data (32 bits)		Fill the given array with the indicated data. The reference must be + to an array of primitives, and the data table must match it in type and + size. +

Note: + The address of the table is guaranteed to be even + (that is, 4-byte aligned). If the code size of the method is otherwise + odd, then an extra code unit is inserted between the main code and the + table whose value is the same as a nop.

+
27 11xthrow vAAA: exception-bearing register (8 bits)
Throw the indicated exception.
28 10tgoto +AAA: signed branch offset (8 bits)Unconditionally jump to the indicated instruction. +

Note: + The branch offset may not be 0. (A spin + loop may be legally constructed either with goto/32 or + by including a nop as a target before the branch.)

+
29 20tgoto/16 +AAAAA: signed branch offset (16 bits)
Unconditionally jump to the indicated instruction. +

Note: + The branch offset may not be 0. (A spin + loop may be legally constructed either with goto/32 or + by including a nop as a target before the branch.)

+
2a 30tgoto/32 +AAAAAAAAA: signed branch offset (32 bits)
Unconditionally jump to the indicated instruction.
2b 31tpacked-switch vAA, +BBBBBBBB (with supplemental data as + specified below in "packed-switch Format")A: register to test
+ B: signed "branch" offset to table data (32 bits)		Jump to a new instruction based on the value in the + given register, using a table of offsets corresponding to each value + in a particular integral range, or fall through to the next + instruction if there is no match. +

Note: + The address of the + table is guaranteed to be even (that is, 4-byte aligned). If the + code size of the method is otherwise odd, then an extra code unit + is inserted between the main code and the table whose value is + the same as a nop.

+
2c 31tsparse-switch vAA, +BBBBBBBB (with supplemental data as + specified below in "sparse-switch Format")A: register to test
+ B: signed "branch" offset to table data (32 bits)		Jump to a new instruction based on the value in the given + register, using an ordered table of value-offset pairs, or fall + through to the next instruction if there is no match. +

Note: + Alignment and padding considerations are identical to + packed-switch, above.

+
2d..31 23xcmpkind vAA, vBB, vCC
+ 2d: cmpl-float (lt bias)
+ 2e: cmpg-float (gt bias)
+ 2f: cmpl-double (lt bias)
+ 30: cmpg-double (gt bias)
+ 31: cmp-long + 		A: destination register (8 bits)
+ B: first source register or pair
+ C: second source register or pair		Perform the indicated floating point or long comparison, + storing 0 if the two arguments are equal, 1 + if the second argument is larger, or -1 if the first + argument is larger. The "bias" listed for the floating point operations + indicates how NaN comparisons are treated: "Gt bias" + instructions return 1 for NaN comparisons, + and "lt bias" instructions return + -1. +

For example, to check to see if floating point + a < b, then it is advisable to use + cmpg-float; a result of -1 indicates that + the test was true, and the other values indicate it was false either + due to a valid comparison or because one or the other values was + NaN.

+
32..37 22tif-test vA, vB, +CCCC
+ 32: if-eq
+ 33: if-ne
+ 34: if-lt
+ 35: if-ge
+ 36: if-gt
+ 37: if-le
+ 		A: first register to test (4 bits)
+ B: second register to test (4 bits)
+ C: signed branch offset (16 bits)		Branch to the given destination if the given two registers' values + compare as specified. +

Note: + The branch offset may not be 0. (A spin + loop may be legally constructed either by branching around a + backward goto or by including a nop as + a target before the branch.)

+
38..3d 21tif-testz vAA, +BBBB
+ 38: if-eqz
+ 39: if-nez
+ 3a: if-ltz
+ 3b: if-gez
+ 3c: if-gtz
+ 3d: if-lez
+ 		A: register to test (8 bits)
+ B: signed branch offset (16 bits)		Branch to the given destination if the given register's value compares + with 0 as specified. +

Note: + The branch offset may not be 0. (A spin + loop may be legally constructed either by branching around a + backward goto or by including a nop as + a target before the branch.)

+
3e..43 10x(unused) (unused)
44..51 23xarrayop vAA, vBB, vCC
+ 44: aget
+ 45: aget-wide
+ 46: aget-object
+ 47: aget-boolean
+ 48: aget-byte
+ 49: aget-char
+ 4a: aget-short
+ 4b: aput
+ 4c: aput-wide
+ 4d: aput-object
+ 4e: aput-boolean
+ 4f: aput-byte
+ 50: aput-char
+ 51: aput-short + 		A: value register or pair; may be source or dest + (8 bits)
+ B: array register (8 bits)
+ C: index register (8 bits)		Perform the identified array operation at the identified index of + the given array, loading or storing into the value register.
52..5f 22ciinstanceop vA, vB, field@CCCC
+ 52: iget
+ 53: iget-wide
+ 54: iget-object
+ 55: iget-boolean
+ 56: iget-byte
+ 57: iget-char
+ 58: iget-short
+ 59: iput
+ 5a: iput-wide
+ 5b: iput-object
+ 5c: iput-boolean
+ 5d: iput-byte
+ 5e: iput-char
+ 5f: iput-short + 		A: value register or pair; may be source or dest + (4 bits)
+ B: object register (4 bits)
+ C: instance field reference index (16 bits)		Perform the identified object instance field operation with + the identified field, loading or storing into the value register. +

Note: These opcodes are reasonable candidates for static linking, + altering the field argument to be a more direct offset.

+
60..6d 21csstaticop vAA, field@BBBB
+ 60: sget
+ 61: sget-wide
+ 62: sget-object
+ 63: sget-boolean
+ 64: sget-byte
+ 65: sget-char
+ 66: sget-short
+ 67: sput
+ 68: sput-wide
+ 69: sput-object
+ 6a: sput-boolean
+ 6b: sput-byte
+ 6c: sput-char
+ 6d: sput-short + 		A: value register or pair; may be source or dest + (8 bits)
+ B: static field reference index (16 bits)		Perform the identified object static field operation with the identified + static field, loading or storing into the value register. +

Note: These opcodes are reasonable candidates for static linking, + altering the field argument to be a more direct offset.

+
6e..72 35cinvoke-kind {vD, vE, vF, vG, vA}, meth@CCCC
+ 6e: invoke-virtual
+ 6f: invoke-super
+ 70: invoke-direct
+ 71: invoke-static
+ 72: invoke-interface + 		B: argument word count (4 bits)
+ C: method index (16 bits)
+ D..G, A: argument registers (4 bits each)		Call the indicated method. The result (if any) may be stored + with an appropriate move-result* variant as the immediately + subsequent instruction. +

invoke-virtual is used to invoke a normal virtual + method (a method that is not static or final, + and is not a constructor).

+

invoke-super is used to invoke the closest superclass's + virtual method (as opposed to the one with the same method_id + in the calling class).

+

invoke-direct is used to invoke a non-static + direct method (that is, an instance method that is by its nature + non-overridable, namely either a private instance method + or a constructor).

+

invoke-static is used to invoke a static + method (which is always considered a direct method).

+

invoke-interface is used to invoke an + interface method, that is, on an object whose concrete + class isn't known, using a method_id that refers to + an interface.

+

Note: These opcodes are reasonable candidates for static linking, + altering the method argument to be a more direct offset + (or pair thereof).

+
73 10x(unused) (unused)
74..78 3rcinvoke-kind/range {vCCCC .. vNNNN}, meth@BBBB
+ 74: invoke-virtual/range
+ 75: invoke-super/range
+ 76: invoke-direct/range
+ 77: invoke-static/range
+ 78: invoke-interface/range + 		A: argument word count (8 bits)
+ B: method index (16 bits)
+ C: first argument register (16 bits)
+ N = A + C - 1		Call the indicated method. See first invoke-kind + description above for details, caveats, and suggestions. +
79..7a 10x(unused) (unused)
7b..8f 12xunop vA, vB
+ 7b: neg-int
+ 7c: not-int
+ 7d: neg-long
+ 7e: not-long
+ 7f: neg-float
+ 80: neg-double
+ 81: int-to-long
+ 82: int-to-float
+ 83: int-to-double
+ 84: long-to-int
+ 85: long-to-float
+ 86: long-to-double
+ 87: float-to-int
+ 88: float-to-long
+ 89: float-to-double
+ 8a: double-to-int
+ 8b: double-to-long
+ 8c: double-to-float
+ 8d: int-to-byte
+ 8e: int-to-char
+ 8f: int-to-short + 		A: destination register or pair (4 bits)
+ B: source register or pair (4 bits)		Perform the identified unary operation on the source register, + storing the result in the destination register.
90..af 23xbinop vAA, vBB, vCC
+ 90: add-int
+ 91: sub-int
+ 92: mul-int
+ 93: div-int
+ 94: rem-int
+ 95: and-int
+ 96: or-int
+ 97: xor-int
+ 98: shl-int
+ 99: shr-int
+ 9a: ushr-int
+ 9b: add-long
+ 9c: sub-long
+ 9d: mul-long
+ 9e: div-long
+ 9f: rem-long
+ a0: and-long
+ a1: or-long
+ a2: xor-long
+ a3: shl-long
+ a4: shr-long
+ a5: ushr-long
+ a6: add-float
+ a7: sub-float
+ a8: mul-float
+ a9: div-float
+ aa: rem-float
+ ab: add-double
+ ac: sub-double
+ ad: mul-double
+ ae: div-double
+ af: rem-double + 		A: destination register or pair (8 bits)
+ B: first source register or pair (8 bits)
+ C: second source register or pair (8 bits)		Perform the identified binary operation on the two source registers, + storing the result in the first source register.
b0..cf 12xbinop/2addr vA, vB
+ b0: add-int/2addr
+ b1: sub-int/2addr
+ b2: mul-int/2addr
+ b3: div-int/2addr
+ b4: rem-int/2addr
+ b5: and-int/2addr
+ b6: or-int/2addr
+ b7: xor-int/2addr
+ b8: shl-int/2addr
+ b9: shr-int/2addr
+ ba: ushr-int/2addr
+ bb: add-long/2addr
+ bc: sub-long/2addr
+ bd: mul-long/2addr
+ be: div-long/2addr
+ bf: rem-long/2addr
+ c0: and-long/2addr
+ c1: or-long/2addr
+ c2: xor-long/2addr
+ c3: shl-long/2addr
+ c4: shr-long/2addr
+ c5: ushr-long/2addr
+ c6: add-float/2addr
+ c7: sub-float/2addr
+ c8: mul-float/2addr
+ c9: div-float/2addr
+ ca: rem-float/2addr
+ cb: add-double/2addr
+ cc: sub-double/2addr
+ cd: mul-double/2addr
+ ce: div-double/2addr
+ cf: rem-double/2addr + 		A: destination and first source register or pair + (4 bits)
+ B: second source register or pair (4 bits)		Perform the identified binary operation on the two source registers, + storing the result in the first source register.
d0..d7 22sbinop/lit16 vA, vB, #+CCCC
+ d0: add-int/lit16
+ d1: rsub-int (reverse subtract)
+ d2: mul-int/lit16
+ d3: div-int/lit16
+ d4: rem-int/lit16
+ d5: and-int/lit16
+ d6: or-int/lit16
+ d7: xor-int/lit16 + 		A: destination register (4 bits)
+ B: source register (4 bits)
+ C: signed int constant (16 bits)		Perform the indicated binary op on the indicated register (first + argument) and literal value (second argument), storing the result in + the destination register. +

Note: + rsub-int does not have a suffix since this version is the + main opcode of its family. Also, see below for details on its semantics. +

+
d8..e2 22bbinop/lit8 vAA, vBB, #+CC
+ d8: add-int/lit8
+ d9: rsub-int/lit8
+ da: mul-int/lit8
+ db: div-int/lit8
+ dc: rem-int/lit8
+ dd: and-int/lit8
+ de: or-int/lit8
+ df: xor-int/lit8
+ e0: shl-int/lit8
+ e1: shr-int/lit8
+ e2: ushr-int/lit8 + 		A: destination register (8 bits)
+ B: source register (8 bits)
+ C: signed int constant (8 bits)		Perform the indicated binary op on the indicated register (first + argument) and literal value (second argument), storing the result + in the destination register. +

Note: See below for details on the semantics of + rsub-int.

+
e3..ff 10x(unused) (unused)
+ +

packed-switch Format

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
NameFormatDescription
identushort = 0x0100identifying pseudo-opcode
sizeushortnumber of entries in the table
first_keyintfirst (and lowest) switch case value
targetsint[]list of size relative branch targets. The targets are + relative to the address of the switch opcode, not of this table. +
+ +

Note: The total number of code units for an instance of this +table is (size * 2) + 4.

+ +

sparse-switch Format

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
NameFormatDescription
identushort = 0x0200identifying pseudo-opcode
sizeushortnumber of entries in the table
keysint[]list of size key values, sorted low-to-high
targetsint[]list of size relative branch targets, each corresponding + to the key value at the same index. The targets are + relative to the address of the switch opcode, not of this table. +
+ +

Note: The total number of code units for an instance of this +table is (size * 4) + 2.

+ +

fill-array-data Format

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
NameFormatDescription
identushort = 0x0300identifying pseudo-opcode
element_widthushortnumber of bytes in each element
sizeuintnumber of elements in the table
dataubyte[]data values
+ +

Note: The total number of code units for an instance of this +table is (size * element_width + 1) / 2 + 4.

+ + +

Mathematical Operation Details

+ +

Note: Floating point operations must follow IEEE 754 rules, using +round-to-nearest and gradual underflow, except where stated otherwise.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
OpcodeC SemanticsNotes
neg-intint32 a;
+ int32 result = -a; + 		Unary twos-complement.
not-intint32 a;
+ int32 result = ~a; + 		Unary ones-complement.
neg-longint64 a;
+ int64 result = -a; + 		Unary twos-complement.
not-longint64 a;
+ int64 result = ~a; + 		Unary ones-complement.
neg-floatfloat a;
+ float result = -a; + 		Floating point negation.
neg-doubledouble a;
+ double result = -a; + 		Floating point negation.
int-to-longint32 a;
+ int64 result = (int64) a; + 		Sign extension of int32 into int64.
int-to-floatint32 a;
+ float result = (float) a; + 		Conversion of int32 to float, using + round-to-nearest. This loses precision for some values. +
int-to-doubleint32 a;
+ double result = (double) a; + 		Conversion of int32 to double.
long-to-intint64 a;
+ int32 result = (int32) a; + 		Truncation of int64 into int32.
long-to-floatint64 a;
+ float result = (float) a; + 		Conversion of int64 to float, using + round-to-nearest. This loses precision for some values. +
long-to-doubleint64 a;
+ double result = (double) a; + 		Conversion of int64 to double, using + round-to-nearest. This loses precision for some values. +
float-to-intfloat a;
+ int32 result = (int32) a; + 		Conversion of float to int32, using + round-toward-zero. NaN and -0.0 (negative zero) + convert to the integer 0. Infinities and values with + too large a magnitude to be represented get converted to either + 0x7fffffff or -0x80000000 depending on sign. +
float-to-longfloat a;
+ int64 result = (int64) a; + 		Conversion of float to int32, using + round-toward-zero. The same special case rules as for + float-to-int apply here, except that out-of-range values + get converted to either 0x7fffffffffffffff or + -0x8000000000000000 depending on sign. +
float-to-doublefloat a;
+ double result = (double) a; + 		Conversion of float to double, preserving + the value exactly. +
double-to-intdouble a;
+ int32 result = (int32) a; + 		Conversion of double to int32, using + round-toward-zero. The same special case rules as for + float-to-int apply here. +
double-to-longdouble a;
+ int64 result = (int64) a; + 		Conversion of double to int64, using + round-toward-zero. The same special case rules as for + float-to-long apply here. +
double-to-floatdouble a;
+ float result = (float) a; + 		Conversion of double to float, using + round-to-nearest. This loses precision for some values. +
int-to-byteint32 a;
+ int32 result = (a << 24) >> 24; + 		Truncation of int32 to int8, sign + extending the result. +
int-to-charint32 a;
+ int32 result = a & 0xffff; + 		Truncation of int32 to uint16, without + sign extension. +
int-to-shortint32 a;
+ int32 result = (a << 16) >> 16; + 		Truncation of int32 to int16, sign + extending the result. +
add-intint32 a, b;
+ int32 result = a + b; + 		Twos-complement addition.
sub-intint32 a, b;
+ int32 result = a - b; + 		Twos-complement subtraction.
rsub-intint32 a, b;
+ int32 result = b - a; + 		Twos-complement reverse subtraction.
mul-intint32 a, b;
+ int32 result = a * b; + 		Twos-complement multiplication.
div-intint32 a, b;
+ int32 result = a / b; + 		Twos-complement division, rounded towards zero (that is, truncated to + integer). This throws ArithmeticException if + b == 0. +
rem-intint32 a, b;
+ int32 result = a % b; + 		Twos-complement remainder after division. The sign of the result + is the same as that of a, and it is more precisely + defined as result == a - (a / b) * b. This throws + ArithmeticException if b == 0. +
and-intint32 a, b;
+ int32 result = a & b; + 		Bitwise AND.
or-intint32 a, b;
+ int32 result = a | b; + 		Bitwise OR.
xor-intint32 a, b;
+ int32 result = a ^ b; + 		Bitwise XOR.
shl-intint32 a, b;
+ int32 result = a << (b & 0x1f); + 		Bitwise shift left (with masked argument).
shr-intint32 a, b;
+ int32 result = a >> (b & 0x1f); + 		Bitwise signed shift right (with masked argument).
ushr-intuint32 a, b;
+ int32 result = a >> (b & 0x1f); + 		Bitwise unsigned shift right (with masked argument).
add-longint64 a, b;
+ int64 result = a + b; + 		Twos-complement addition.
sub-longint64 a, b;
+ int64 result = a - b; + 		Twos-complement subtraction.
mul-longint64 a, b;
+ int64 result = a * b; + 		Twos-complement multiplication.
div-longint64 a, b;
+ int64 result = a / b; + 		Twos-complement division, rounded towards zero (that is, truncated to + integer). This throws ArithmeticException if + b == 0. +
rem-longint64 a, b;
+ int64 result = a % b; + 		Twos-complement remainder after division. The sign of the result + is the same as that of a, and it is more precisely + defined as result == a - (a / b) * b. This throws + ArithmeticException if b == 0. +
and-longint64 a, b;
+ int64 result = a & b; + 		Bitwise AND.
or-longint64 a, b;
+ int64 result = a | b; + 		Bitwise OR.
xor-longint64 a, b;
+ int64 result = a ^ b; + 		Bitwise XOR.
shl-longint64 a, b;
+ int64 result = a << (b & 0x3f); + 		Bitwise shift left (with masked argument).
shr-longint64 a, b;
+ int64 result = a >> (b & 0x3f); + 		Bitwise signed shift right (with masked argument).
ushr-longuint64 a, b;
+ int64 result = a >> (b & 0x3f); + 		Bitwise unsigned shift right (with masked argument).
add-floatfloat a, b;
+ float result = a + b; + 		Floating point addition.
sub-floatfloat a, b;
+ float result = a - b; + 		Floating point subtraction.
mul-floatfloat a, b;
+ float result = a * b; + 		Floating point multiplication.
div-floatfloat a, b;
+ float result = a / b; + 		Floating point division.
rem-floatfloat a, b;
+ float result = a % b; + 		Floating point remainder after division. This function is different + than IEEE 754 remainder and is defined as + result == a - roundTowardZero(a / b) * b. +
add-doubledouble a, b;
+ double result = a + b; + 		Floating point addition.
sub-doubledouble a, b;
+ double result = a - b; + 		Floating point subtraction.
mul-doubledouble a, b;
+ double result = a * b; + 		Floating point multiplication.
div-doubledouble a, b;
+ double result = a / b; + 		Floating point division.
rem-doubledouble a, b;
+ double result = a % b; + 		Floating point remainder after division. This function is different + than IEEE 754 remainder and is defined as + result == a - roundTowardZero(a / b) * b. +
+ + + -- cgit v1.2.3