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authorYou Kim <you.kim72@gmail.com>2012-11-22 23:51:38 +0900
committerYou Kim <you.kim72@gmail.com>2012-12-17 01:35:20 +0900
commita4cc6962da7e71f071f37579d8c011eb4405c36c (patch)
tree3a893fe580927d7f36024da9c4bffcc18e3f6d03 /vm/mterp
parenteeae8a8926f647133dc858661b5b167595cf7f30 (diff)
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Optimize opcodes to avoid bubble in pipeline.
Possible bubbles between fetch(ldr) and extract(and) Excute subsequent instruction(s) inbetween the bubble by reordering instruction. Change-Id: I76d89ed6bc4ca44673231375cc529fdbfd5a8030
Diffstat (limited to 'vm/mterp')
-rw-r--r--vm/mterp/armv5te/OP_APUT_OBJECT.S2
-rw-r--r--vm/mterp/armv5te/OP_CONST_CLASS.S4
-rw-r--r--vm/mterp/armv5te/OP_CONST_STRING.S4
-rw-r--r--vm/mterp/armv5te/OP_CONST_STRING_JUMBO.S4
-rw-r--r--vm/mterp/armv5te/OP_IPUT.S2
-rw-r--r--vm/mterp/armv5te/OP_IPUT_OBJECT.S2
-rw-r--r--vm/mterp/armv5te/OP_MOVE_RESULT_WIDE.S2
-rw-r--r--vm/mterp/armv5te/OP_MOVE_WIDE.S2
-rw-r--r--vm/mterp/armv5te/OP_MOVE_WIDE_16.S2
-rw-r--r--vm/mterp/armv5te/OP_NEW_INSTANCE.S4
-rw-r--r--vm/mterp/armv6t2/OP_IGET.S2
-rw-r--r--vm/mterp/armv6t2/OP_IGET_QUICK.S2
-rw-r--r--vm/mterp/armv6t2/OP_IPUT.S2
-rw-r--r--vm/mterp/out/InterpAsm-armv5te-vfp.S40
-rw-r--r--vm/mterp/out/InterpAsm-armv5te.S40
-rw-r--r--vm/mterp/out/InterpAsm-armv7-a-neon.S42
-rw-r--r--vm/mterp/out/InterpAsm-armv7-a.S42
17 files changed, 99 insertions, 99 deletions
diff --git a/vm/mterp/armv5te/OP_APUT_OBJECT.S b/vm/mterp/armv5te/OP_APUT_OBJECT.S
index 918fcd018..95aec3a65 100644
--- a/vm/mterp/armv5te/OP_APUT_OBJECT.S
+++ b/vm/mterp/armv5te/OP_APUT_OBJECT.S
@@ -43,8 +43,8 @@
GOTO_OPCODE(ip) @ jump to next instruction
.L${opcode}_skip_check:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r9, [r10, #offArrayObject_contents] @ vBB[vCC]<- vAA
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
.L${opcode}_throw:
@ The types don't match. We need to throw an ArrayStoreException.
diff --git a/vm/mterp/armv5te/OP_CONST_CLASS.S b/vm/mterp/armv5te/OP_CONST_CLASS.S
index 9256bf97e..018e1e0cb 100644
--- a/vm/mterp/armv5te/OP_CONST_CLASS.S
+++ b/vm/mterp/armv5te/OP_CONST_CLASS.S
@@ -11,8 +11,8 @@
cmp r0, #0 @ not yet resolved?
beq .L${opcode}_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
%break
@@ -30,6 +30,6 @@
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_CONST_STRING.S b/vm/mterp/armv5te/OP_CONST_STRING.S
index bad36e46f..0d889ddbf 100644
--- a/vm/mterp/armv5te/OP_CONST_STRING.S
+++ b/vm/mterp/armv5te/OP_CONST_STRING.S
@@ -11,8 +11,8 @@
cmp r0, #0 @ not yet resolved?
beq .L${opcode}_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
%break
@@ -29,6 +29,6 @@
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_CONST_STRING_JUMBO.S b/vm/mterp/armv5te/OP_CONST_STRING_JUMBO.S
index 05897f756..6ca6bd1a6 100644
--- a/vm/mterp/armv5te/OP_CONST_STRING_JUMBO.S
+++ b/vm/mterp/armv5te/OP_CONST_STRING_JUMBO.S
@@ -13,8 +13,8 @@
cmp r0, #0
beq .L${opcode}_resolve
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
%break
@@ -31,6 +31,6 @@
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_IPUT.S b/vm/mterp/armv5te/OP_IPUT.S
index 72c05c0ad..e0aa269c9 100644
--- a/vm/mterp/armv5te/OP_IPUT.S
+++ b/vm/mterp/armv5te/OP_IPUT.S
@@ -41,8 +41,8 @@
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
$prebarrier @ releasing store
$store r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
$postbarrier
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_IPUT_OBJECT.S b/vm/mterp/armv5te/OP_IPUT_OBJECT.S
index a514f0462..879597110 100644
--- a/vm/mterp/armv5te/OP_IPUT_OBJECT.S
+++ b/vm/mterp/armv5te/OP_IPUT_OBJECT.S
@@ -42,10 +42,10 @@
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
$prebarrier @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
$postbarrier
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_MOVE_RESULT_WIDE.S b/vm/mterp/armv5te/OP_MOVE_RESULT_WIDE.S
index 4eb019869..ea80de8ed 100644
--- a/vm/mterp/armv5te/OP_MOVE_RESULT_WIDE.S
+++ b/vm/mterp/armv5te/OP_MOVE_RESULT_WIDE.S
@@ -5,6 +5,6 @@
add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
ldmia r3, {r0-r1} @ r0/r1<- retval.j
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_MOVE_WIDE.S b/vm/mterp/armv5te/OP_MOVE_WIDE.S
index 05151e107..0811c95f5 100644
--- a/vm/mterp/armv5te/OP_MOVE_WIDE.S
+++ b/vm/mterp/armv5te/OP_MOVE_WIDE.S
@@ -8,6 +8,6 @@
add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
ldmia r3, {r0-r1} @ r0/r1<- fp[B]
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[A]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_MOVE_WIDE_16.S b/vm/mterp/armv5te/OP_MOVE_WIDE_16.S
index 172ef0302..2b3e99f5d 100644
--- a/vm/mterp/armv5te/OP_MOVE_WIDE_16.S
+++ b/vm/mterp/armv5te/OP_MOVE_WIDE_16.S
@@ -7,6 +7,6 @@
add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_NEW_INSTANCE.S b/vm/mterp/armv5te/OP_NEW_INSTANCE.S
index e280c4ccd..a03d111dc 100644
--- a/vm/mterp/armv5te/OP_NEW_INSTANCE.S
+++ b/vm/mterp/armv5te/OP_NEW_INSTANCE.S
@@ -48,8 +48,8 @@
#endif
.L${opcode}_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#if defined(WITH_JIT)
@@ -68,8 +68,8 @@
mov r1, rPC
bl dvmJitEndTraceSelect @ (self, pc)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r9, r10) @ vAA<- new object
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#endif
diff --git a/vm/mterp/armv6t2/OP_IGET.S b/vm/mterp/armv6t2/OP_IGET.S
index 14ddf4436..1cf41fc6f 100644
--- a/vm/mterp/armv6t2/OP_IGET.S
+++ b/vm/mterp/armv6t2/OP_IGET.S
@@ -40,6 +40,6 @@
$load r0, [r9, r3] @ r0<- obj.field (8/16/32 bits)
ubfx r2, rINST, #8, #4 @ r2<- A
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv6t2/OP_IGET_QUICK.S b/vm/mterp/armv6t2/OP_IGET_QUICK.S
index 0ce2ebcc9..1e913c3ac 100644
--- a/vm/mterp/armv6t2/OP_IGET_QUICK.S
+++ b/vm/mterp/armv6t2/OP_IGET_QUICK.S
@@ -10,6 +10,6 @@
beq common_errNullObject @ object was null
ldr r0, [r3, r1] @ r0<- obj.field (always 32 bits)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv6t2/OP_IPUT.S b/vm/mterp/armv6t2/OP_IPUT.S
index 4bc8e1b73..0b219c022 100644
--- a/vm/mterp/armv6t2/OP_IPUT.S
+++ b/vm/mterp/armv6t2/OP_IPUT.S
@@ -40,6 +40,6 @@
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
$store r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv5te-vfp.S b/vm/mterp/out/InterpAsm-armv5te-vfp.S
index a7eeb50a9..c50a81398 100644
--- a/vm/mterp/out/InterpAsm-armv5te-vfp.S
+++ b/vm/mterp/out/InterpAsm-armv5te-vfp.S
@@ -430,8 +430,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
ldmia r3, {r0-r1} @ r0/r1<- fp[B]
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[A]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -462,8 +462,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -538,8 +538,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
ldmia r3, {r0-r1} @ r0/r1<- retval.j
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -756,8 +756,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_STRING_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -775,8 +775,8 @@ dalvik_inst:
cmp r0, #0
beq .LOP_CONST_STRING_JUMBO_resolve
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -792,8 +792,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_CLASS_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -7734,8 +7734,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_STRING_JUMBO */
@@ -7753,8 +7753,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_CLASS */
@@ -7773,8 +7773,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CHECK_CAST */
@@ -7892,8 +7892,8 @@ dvmAsmSisterStart:
#endif
.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#if defined(WITH_JIT)
@@ -7912,8 +7912,8 @@ dvmAsmSisterStart:
mov r1, rPC
bl dvmJitEndTraceSelect @ (self, pc)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r9, r10) @ vAA<- new object
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#endif
@@ -8238,8 +8238,8 @@ dvmAsmSisterStart:
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_skip_check:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r9, [r10, #offArrayObject_contents] @ vBB[vCC]<- vAA
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_throw:
@ The types don't match. We need to throw an ArrayStoreException.
@@ -8416,10 +8416,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_WIDE */
@@ -8464,10 +8464,10 @@ dvmAsmSisterStart:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
@@ -8488,10 +8488,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_BYTE */
@@ -8510,10 +8510,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_CHAR */
@@ -8532,10 +8532,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_SHORT */
@@ -8554,10 +8554,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET */
@@ -9314,10 +9314,10 @@ d2l_doconv:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET_VOLATILE */
@@ -9671,10 +9671,10 @@ d2l_doconv:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv5te.S b/vm/mterp/out/InterpAsm-armv5te.S
index c0f27b36c..528bf783f 100644
--- a/vm/mterp/out/InterpAsm-armv5te.S
+++ b/vm/mterp/out/InterpAsm-armv5te.S
@@ -430,8 +430,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
ldmia r3, {r0-r1} @ r0/r1<- fp[B]
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[A]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -462,8 +462,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -538,8 +538,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
ldmia r3, {r0-r1} @ r0/r1<- retval.j
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -756,8 +756,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_STRING_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -775,8 +775,8 @@ dalvik_inst:
cmp r0, #0
beq .LOP_CONST_STRING_JUMBO_resolve
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -792,8 +792,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_CLASS_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -8056,8 +8056,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_STRING_JUMBO */
@@ -8075,8 +8075,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_CLASS */
@@ -8095,8 +8095,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CHECK_CAST */
@@ -8214,8 +8214,8 @@ dvmAsmSisterStart:
#endif
.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#if defined(WITH_JIT)
@@ -8234,8 +8234,8 @@ dvmAsmSisterStart:
mov r1, rPC
bl dvmJitEndTraceSelect @ (self, pc)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r9, r10) @ vAA<- new object
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#endif
@@ -8696,8 +8696,8 @@ OP_CMPG_FLOAT_nan:
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_skip_check:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r9, [r10, #offArrayObject_contents] @ vBB[vCC]<- vAA
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_throw:
@ The types don't match. We need to throw an ArrayStoreException.
@@ -8874,10 +8874,10 @@ OP_CMPG_FLOAT_nan:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_WIDE */
@@ -8922,10 +8922,10 @@ OP_CMPG_FLOAT_nan:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
@@ -8946,10 +8946,10 @@ OP_CMPG_FLOAT_nan:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_BYTE */
@@ -8968,10 +8968,10 @@ OP_CMPG_FLOAT_nan:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_CHAR */
@@ -8990,10 +8990,10 @@ OP_CMPG_FLOAT_nan:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_SHORT */
@@ -9012,10 +9012,10 @@ OP_CMPG_FLOAT_nan:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET */
@@ -9772,10 +9772,10 @@ d2l_doconv:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET_VOLATILE */
@@ -10129,10 +10129,10 @@ d2l_doconv:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv7-a-neon.S b/vm/mterp/out/InterpAsm-armv7-a-neon.S
index afa47db4a..1e72b5366 100644
--- a/vm/mterp/out/InterpAsm-armv7-a-neon.S
+++ b/vm/mterp/out/InterpAsm-armv7-a-neon.S
@@ -474,8 +474,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -550,8 +550,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
ldmia r3, {r0-r1} @ r0/r1<- retval.j
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -767,8 +767,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_STRING_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -786,8 +786,8 @@ dalvik_inst:
cmp r0, #0
beq .LOP_CONST_STRING_JUMBO_resolve
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -803,8 +803,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_CLASS_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -7357,8 +7357,8 @@ dalvik_inst:
beq common_errNullObject @ object was null
ldr r0, [r3, r1] @ r0<- obj.field (always 32 bits)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -7688,8 +7688,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_STRING_JUMBO */
@@ -7707,8 +7707,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_CLASS */
@@ -7727,8 +7727,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CHECK_CAST */
@@ -7846,8 +7846,8 @@ dvmAsmSisterStart:
#endif
.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#if defined(WITH_JIT)
@@ -7866,8 +7866,8 @@ dvmAsmSisterStart:
mov r1, rPC
bl dvmJitEndTraceSelect @ (self, pc)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r9, r10) @ vAA<- new object
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#endif
@@ -8192,8 +8192,8 @@ dvmAsmSisterStart:
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_skip_check:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r9, [r10, #offArrayObject_contents] @ vBB[vCC]<- vAA
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_throw:
@ The types don't match. We need to throw an ArrayStoreException.
@@ -8218,8 +8218,8 @@ dvmAsmSisterStart:
ldr r0, [r9, r3] @ r0<- obj.field (8/16/32 bits)
ubfx r2, rINST, #8, #4 @ r2<- A
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IGET_WIDE */
@@ -8361,8 +8361,8 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_WIDE */
@@ -8401,10 +8401,10 @@ dvmAsmSisterStart:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
@@ -8425,10 +8425,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_BYTE */
@@ -8447,10 +8447,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_CHAR */
@@ -8469,10 +8469,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_SHORT */
@@ -8491,10 +8491,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET */
@@ -9251,10 +9251,10 @@ d2l_doconv:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET_VOLATILE */
@@ -9608,10 +9608,10 @@ d2l_doconv:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv7-a.S b/vm/mterp/out/InterpAsm-armv7-a.S
index 9ce376e02..54e376b52 100644
--- a/vm/mterp/out/InterpAsm-armv7-a.S
+++ b/vm/mterp/out/InterpAsm-armv7-a.S
@@ -474,8 +474,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AAAA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -550,8 +550,8 @@ dalvik_inst:
add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
ldmia r3, {r0-r1} @ r0/r1<- retval.j
FETCH_ADVANCE_INST(1) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
stmia r2, {r0-r1} @ fp[AA]<- r0/r1
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -767,8 +767,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_STRING_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -786,8 +786,8 @@ dalvik_inst:
cmp r0, #0
beq .LOP_CONST_STRING_JUMBO_resolve
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -803,8 +803,8 @@ dalvik_inst:
cmp r0, #0 @ not yet resolved?
beq .LOP_CONST_CLASS_resolve
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -7357,8 +7357,8 @@ dalvik_inst:
beq common_errNullObject @ object was null
ldr r0, [r3, r1] @ r0<- obj.field (always 32 bits)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
@@ -7688,8 +7688,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_STRING_JUMBO */
@@ -7707,8 +7707,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CONST_CLASS */
@@ -7727,8 +7727,8 @@ dvmAsmSisterStart:
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yup, handle the exception
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r9) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_CHECK_CAST */
@@ -7846,8 +7846,8 @@ dvmAsmSisterStart:
#endif
.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#if defined(WITH_JIT)
@@ -7866,8 +7866,8 @@ dvmAsmSisterStart:
mov r1, rPC
bl dvmJitEndTraceSelect @ (self, pc)
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r9, r10) @ vAA<- new object
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
#endif
@@ -8192,8 +8192,8 @@ dvmAsmSisterStart:
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_skip_check:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r9, [r10, #offArrayObject_contents] @ vBB[vCC]<- vAA
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
.LOP_APUT_OBJECT_throw:
@ The types don't match. We need to throw an ArrayStoreException.
@@ -8218,8 +8218,8 @@ dvmAsmSisterStart:
ldr r0, [r9, r3] @ r0<- obj.field (8/16/32 bits)
ubfx r2, rINST, #8, #4 @ r2<- A
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r2) @ fp[A]<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IGET_WIDE */
@@ -8361,8 +8361,8 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_WIDE */
@@ -8401,10 +8401,10 @@ dvmAsmSisterStart:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction
@@ -8425,10 +8425,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_BYTE */
@@ -8447,10 +8447,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_CHAR */
@@ -8469,10 +8469,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_IPUT_SHORT */
@@ -8491,10 +8491,10 @@ dvmAsmSisterStart:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
@ no-op @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
@ no-op
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET */
@@ -9251,10 +9251,10 @@ d2l_doconv:
GET_VREG(r0, r1) @ r0<- fp[A]
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (8/16/32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
/* continuation for OP_SGET_VOLATILE */
@@ -9608,10 +9608,10 @@ d2l_doconv:
ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
beq common_errNullObject @ object was null
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
SMP_DMB_ST @ releasing store
str r0, [r9, r3] @ obj.field (32 bits)<- r0
SMP_DMB
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp r0, #0 @ stored a null reference?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card if not
GOTO_OPCODE(ip) @ jump to next instruction