From cc23481b66fd1f2b459d82da4852073e32f033aa Mon Sep 17 00:00:00 2001 From: Vladimir Marko Date: Tue, 7 Apr 2015 09:36:09 +0100 Subject: Promote pointer to dex cache arrays on arm. Do the use-count analysis on temps (ArtMethod* and the new PC-relative temp) in Mir2Lir, rather than MIRGraph. MIRGraph isn't really supposed to know how the ArtMethod* is used by the backend. Change-Id: Iaf56a46ae203eca86281b02b54f39a80fe5cc2dd --- compiler/dex/quick/arm/codegen_arm.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'compiler/dex/quick/arm/codegen_arm.h') diff --git a/compiler/dex/quick/arm/codegen_arm.h b/compiler/dex/quick/arm/codegen_arm.h index 619c11fb94..83b27df939 100644 --- a/compiler/dex/quick/arm/codegen_arm.h +++ b/compiler/dex/quick/arm/codegen_arm.h @@ -260,6 +260,9 @@ class ArmMir2Lir FINAL : public Mir2Lir { */ LIR* GenCallInsn(const MirMethodLoweringInfo& method_info) OVERRIDE; + void CountRefs(RefCounts* core_counts, RefCounts* fp_counts, size_t num_regs) OVERRIDE; + void DoPromotion() OVERRIDE; + /* * @brief Handle ARM specific literals. */ @@ -306,6 +309,10 @@ class ArmMir2Lir FINAL : public Mir2Lir { // Instructions needing patching with PC relative code addresses. ArenaVector dex_cache_access_insns_; + // Register with a reference to the dex cache arrays at dex_cache_arrays_min_offset_, + // if promoted. + RegStorage dex_cache_arrays_base_reg_; + /** * @brief Given float register pair, returns Solo64 float register. * @param reg #RegStorage containing a float register pair (e.g. @c s2 and @c s3). @@ -341,6 +348,8 @@ class ArmMir2Lir FINAL : public Mir2Lir { uint32_t unused_idx ATTRIBUTE_UNUSED, uintptr_t direct_code, uintptr_t direct_method, InvokeType type); + + void OpPcRelDexCacheArrayAddr(const DexFile* dex_file, int offset, RegStorage r_dest); }; } // namespace art -- cgit v1.2.3