From 9ee801f5308aa3c62ae3bedae2658612762ffb91 Mon Sep 17 00:00:00 2001 From: Dmitry Petrochenko Date: Mon, 12 May 2014 11:31:37 +0700 Subject: Add x86_64 code generation support Utilizes r0..r7 in register allocator, implements spill/unsill core regs as well as operations with stack pointer. Change-Id: I973d5a1acb9aa735f6832df3d440185d9e896c67 Signed-off-by: Dmitry Petrochenko --- compiler/compilers.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'compiler/compilers.cc') diff --git a/compiler/compilers.cc b/compiler/compilers.cc index 79a85db79a..76838d701b 100644 --- a/compiler/compilers.cc +++ b/compiler/compilers.cc @@ -111,7 +111,7 @@ Backend* QuickCompiler::GetCodeGenerator(CompilationUnit* cu, void* compilation_ mir_to_lir = X86CodeGenerator(cu, cu->mir_graph.get(), &cu->arena); break; case kX86_64: - mir_to_lir = X86CodeGenerator(cu, cu->mir_graph.get(), &cu->arena); + mir_to_lir = X86_64CodeGenerator(cu, cu->mir_graph.get(), &cu->arena); break; default: LOG(FATAL) << "Unexpected instruction set: " << cu->instruction_set; -- cgit v1.2.3