This is unfinished, unused and incomplete. This could be brought back in
the future if there's a desire to build a more complete implementation,
but at the moment it's just bitrotting.

Differential Revision: https://reviews.llvm.org/D57252

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The existing typedef of unw_fpreg_t to uint64_t might work and be
correct for the ARM_EHABI case, but for dwarf, some cases in e.g.
DwarfInstructions.hpp convert between double and unw_fpreg_t.

When converting implicitly between double and unw_fpreg_t (uint64_t),
the values get interpreted as integers and converted to float and vice
versa, while the correct thing would be to keep the same bit pattern.

Avoid the whole issue by using the same definition of unw_fpreg_t
as all other architectures, when using dwarf unwinding on ARM.

Change assembler functions to take a void pointer instead of
unw_fpreg_t pointer, to avoid having a different mangled symbol name
depending on the actual value of this typedef.

Differential Revision: https://reviews.llvm.org/D57001

git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@352461 91177308-0d34-0410-b5e6-96231b3b80d8

to reflect the new license. These used slightly different spellings that
defeated my regular expressions.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

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Summary:
Adds the register class implementation for Sparc.
Adds support for DW_CFA_GNU_window_save.
Adds save and restore context functionality.

Adds getArch() function to each Registers_ class to be able to separate
between DW_CFA_AARCH64_negate_ra_state and DW_CFA_GNU_window_save which
are both represented by the same constant.

On Sparc the return address is the address of the call instruction, so
an offset needs to be added when returning to skip the call instruction
and its delay slot. If the function returns a struct it is also necessary
to skip one extra instruction on Sparc V8.

Reviewers: jyknight, mclow.lists, mstorsjo, compnerd

Reviewed By: jyknight, compnerd

Subscribers: jgorbe, mgorny, christof, llvm-commits, fedor.sergeev, JDevlieghere, ldionne, libcxx-commits

Differential Revision: https://reviews.llvm.org/D55763

git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@351044 91177308-0d34-0410-b5e6-96231b3b80d8

This reverts commit r350705.

git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@350787 91177308-0d34-0410-b5e6-96231b3b80d8

Summary:
Adds the register class implementation for Sparc.
Adds support for DW_CFA_GNU_window_save.
Adds save and restore context functionality.

On Sparc the return address is the address of the call instruction,
so an offset needs to be added when returning to skip the call instruction
and its delay slot. If the function returns a struct it is also necessary
to skip one extra instruction.

Reviewers: jyknight, mclow.lists, mstorsjo, compnerd

Reviewed By: compnerd

Subscribers: fedor.sergeev, JDevlieghere, ldionne, libcxx-commits

Differential Revision: https://reviews.llvm.org/D55763

git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@350705 91177308-0d34-0410-b5e6-96231b3b80d8

- Follow up to revision r342895
- gcc would not build libunwind with the earlier patch as the autia1716
  instruction wasn't allowed to be assembled for pre armv8.3a targets
- The autia1716 instruction lives in the hint space encodings so is a valid
  instruction for all armv8a targets
- To work around this I have swapped out the autia1716 instruction for the hint
  instruction

Differential Revision: https://reviews.llvm.org/D55700



git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@349140 91177308-0d34-0410-b5e6-96231b3b80d8

- The used builtins do not compile for pre arm v8.3a targets with gcc



git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@342901 91177308-0d34-0410-b5e6-96231b3b80d8

- When return address signing is enabled, the LR may be signed on function entry
- When an exception is thrown the return address is inspected used to unwind the call stack
- Before this happens, the return address must be correctly authenticated to avoid causing an abort by dereferencing the signed pointer

Differential Revision: https://reviews.llvm.org/D51432



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This makes it possible to unwind hardware exception stack frames,
which necessarily save every register and so need an extra column
for storing the return address. CFI for the exception handler could
then look as follows:

.globl exception_vector
exception_vector:
    .cfi_startproc
    .cfi_signal_frame
    .cfi_return_column 32
    l.addi  r1, r1, -0x100
    .cfi_def_cfa_offset 0x100
    l.sw    0x00(r1), r2
    .cfi_offset 2, 0x00-0x100
    l.sw    0x04(r1), r3
    .cfi_offset 3, 0x04-0x100
    l.sw    0x08(r1), r4
    .cfi_offset 4, 0x08-0x100
    l.mfspr r3, r0, SPR_EPCR_BASE
    l.sw    0x78(r1), r3
    .cfi_offset 32, 0x78-0x100
    l.jal   exception_handler
     l.nop
    l.lwz   r2, 0x00(r1)
    l.lwz   r3, 0x04(r1)
    l.lwz   r4, 0x08(r1)
    l.jr    r9
     l.nop
    .cfi_endproc

This register could, of course, also be accessed by the trace
callback or personality function, if so desired.

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