From 8ae0df93a01bfd869fa80068b5df17359d798714 Mon Sep 17 00:00:00 2001 From: Jonathan Wright Date: Wed, 14 Mar 2018 17:55:32 +0000 Subject: plat/common: remove fall-through on release build Removes fall-through in switch statement on unknown interrupt type in release builds. Previous behaviour was to assert(0) on default case in debug builds but fall through and interpret the unknown interrupt type as INTR_TYPE_EL3 in release builds. Change-Id: I05fb0299608efda0f9eda2288d3e56e5625e05c9 Signed-off-by: Jonathan Wright --- plat/common/plat_gicv3.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'plat') diff --git a/plat/common/plat_gicv3.c b/plat/common/plat_gicv3.c index 030eea723..cf9aca229 100644 --- a/plat/common/plat_gicv3.c +++ b/plat/common/plat_gicv3.c @@ -158,15 +158,14 @@ uint32_t plat_interrupt_type_to_line(uint32_t type, return __builtin_ctz(SCR_FIQ_BIT); else return __builtin_ctz(SCR_IRQ_BIT); - default: - assert(0); - /* Fall through in the release build */ case INTR_TYPE_EL3: /* * The EL3 interrupts are signaled as FIQ in both S-EL0/1 and * NS-EL0/1/2 contexts */ return __builtin_ctz(SCR_FIQ_BIT); + default: + panic(); } } -- cgit v1.2.3 From 649c48f5dca1765eabd42b5d630736a5d1e1f5e2 Mon Sep 17 00:00:00 2001 From: Jonathan Wright Date: Wed, 14 Mar 2018 15:24:00 +0000 Subject: plat: fix switch statements to comply with MISRA rules Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright --- plat/arm/board/fvp/fvp_pm.c | 8 +++----- plat/arm/common/arm_bl2_setup.c | 3 +++ plat/common/plat_gicv2.c | 12 +++++++++-- plat/common/plat_gicv3.c | 1 + plat/hisilicon/hikey/hikey_bl2_setup.c | 3 +++ plat/hisilicon/hikey960/hikey960_bl2_setup.c | 3 +++ plat/hisilicon/poplar/bl2_plat_setup.c | 3 +++ plat/mediatek/common/custom/oem_svc.c | 11 ++-------- plat/mediatek/common/mtk_sip_svc.c | 3 +++ plat/qemu/qemu_bl2_setup.c | 3 +++ plat/rockchip/common/rockchip_sip_svc.c | 2 -- plat/rockchip/rk3368/plat_sip_calls.c | 7 ++----- plat/rockchip/rk3399/drivers/dram/dfs.c | 3 +++ .../rk3399/drivers/dram/dram_spec_timing.c | 3 +++ plat/rockchip/rk3399/drivers/pmu/pmu.c | 24 +++++----------------- plat/rpi3/rpi3_bl2_setup.c | 3 +++ plat/socionext/uniphier/uniphier_bl2_setup.c | 1 + plat/xilinx/zynqmp/aarch64/zynqmp_common.c | 9 ++++++++ 18 files changed, 60 insertions(+), 42 deletions(-) (limited to 'plat') diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c index f61cdb3c3..0fa83a5c0 100644 --- a/plat/arm/board/fvp/fvp_pm.c +++ b/plat/arm/board/fvp/fvp_pm.c @@ -324,13 +324,11 @@ static int fvp_node_hw_state(u_register_t target_cpu, if (psysr == PSYSR_INVALID) return PSCI_E_INVALID_PARAMS; - switch (power_level) { - case ARM_PWR_LVL0: + if (power_level == ARM_PWR_LVL0) { ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF; - break; - case ARM_PWR_LVL1: + } else { + /* power_level == ARM_PWR_LVL1 */ ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF; - break; } return ret; diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c index 7add61dab..8a6c7680e 100644 --- a/plat/arm/common/arm_bl2_setup.c +++ b/plat/arm/common/arm_bl2_setup.c @@ -305,6 +305,9 @@ int arm_bl2_handle_post_image_load(unsigned int image_id) } break; #endif + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/common/plat_gicv2.c b/plat/common/plat_gicv2.c index ca6c03b01..026ea7132 100644 --- a/plat/common/plat_gicv2.c +++ b/plat/common/plat_gicv2.c @@ -190,6 +190,8 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority) int plat_ic_has_interrupt_type(unsigned int type) { + int has_interrupt_type = 0; + switch (type) { #if GICV2_G0_FOR_EL3 case INTR_TYPE_EL3: @@ -197,10 +199,14 @@ int plat_ic_has_interrupt_type(unsigned int type) case INTR_TYPE_S_EL1: #endif case INTR_TYPE_NS: - return 1; + has_interrupt_type = 1; + break; default: - return 0; + /* Do nothing in default case */ + break; } + + return has_interrupt_type; } void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) @@ -221,6 +227,7 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) break; default: assert(0); + break; } gicv2_set_interrupt_type(id, gicv2_type); @@ -260,6 +267,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode, break; default: assert(0); + break; } gicv2_set_spi_routing(id, proc_num); diff --git a/plat/common/plat_gicv3.c b/plat/common/plat_gicv3.c index cf9aca229..26a4973f9 100644 --- a/plat/common/plat_gicv3.c +++ b/plat/common/plat_gicv3.c @@ -247,6 +247,7 @@ void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode, break; default: assert(0); + break; } gicv3_set_spi_routing(id, irm, mpidr); diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c index 8bb282485..a78bb1e91 100644 --- a/plat/hisilicon/hikey/hikey_bl2_setup.c +++ b/plat/hisilicon/hikey/hikey_bl2_setup.c @@ -175,6 +175,9 @@ int hikey_bl2_handle_post_image_load(unsigned int image_id) } break; #endif + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c index 11bbf9e15..6e726d2f5 100644 --- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c @@ -267,6 +267,9 @@ int hikey960_bl2_handle_post_image_load(unsigned int image_id) } break; #endif + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c index 177630b03..2671994a2 100644 --- a/plat/hisilicon/poplar/bl2_plat_setup.c +++ b/plat/hisilicon/poplar/bl2_plat_setup.c @@ -193,6 +193,9 @@ int poplar_bl2_handle_post_image_load(unsigned int image_id) } break; #endif + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/mediatek/common/custom/oem_svc.c b/plat/mediatek/common/custom/oem_svc.c index 08baed874..49e7571de 100644 --- a/plat/mediatek/common/custom/oem_svc.c +++ b/plat/mediatek/common/custom/oem_svc.c @@ -41,15 +41,8 @@ uint64_t oem_smc_handler(uint32_t smc_fid, void *handle, uint64_t flags) { - uint64_t rc; - - switch (smc_fid) { - default: - rc = SMC_UNK; - WARN("Unimplemented OEM Call: 0x%x\n", smc_fid); - } - - SMC_RET1(handle, rc); + WARN("Unimplemented OEM Call: 0x%x\n", smc_fid); + SMC_RET1(handle, SMC_UNK); } /* diff --git a/plat/mediatek/common/mtk_sip_svc.c b/plat/mediatek/common/mtk_sip_svc.c index beb2a6978..869a95904 100644 --- a/plat/mediatek/common/mtk_sip_svc.c +++ b/plat/mediatek/common/mtk_sip_svc.c @@ -71,6 +71,9 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid, boot_to_kernel(x1, x2, x3, x4); SMC_RET0(handle); #endif + default: + /* Do nothing in default case */ + break; } } diff --git a/plat/qemu/qemu_bl2_setup.c b/plat/qemu/qemu_bl2_setup.c index 7650873e2..997c85d7a 100644 --- a/plat/qemu/qemu_bl2_setup.c +++ b/plat/qemu/qemu_bl2_setup.c @@ -287,6 +287,9 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id) bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry(); break; + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/rockchip/common/rockchip_sip_svc.c b/plat/rockchip/common/rockchip_sip_svc.c index 40cc94b7d..eca4f99ac 100644 --- a/plat/rockchip/common/rockchip_sip_svc.c +++ b/plat/rockchip/common/rockchip_sip_svc.c @@ -59,13 +59,11 @@ uint64_t sip_smc_handler(uint32_t smc_fid, case SIP_SVC_UID: /* Return UID to the caller */ SMC_UUID_RET(handle, rk_sip_svc_uid); - break; case SIP_SVC_VERSION: /* Return the version of current implementation */ SMC_RET2(handle, RK_SIP_SVC_VERSION_MAJOR, RK_SIP_SVC_VERSION_MINOR); - break; default: return rockchip_plat_sip_handler(smc_fid, x1, x2, x3, x4, diff --git a/plat/rockchip/rk3368/plat_sip_calls.c b/plat/rockchip/rk3368/plat_sip_calls.c index 7383d2f20..03fee88cb 100644 --- a/plat/rockchip/rk3368/plat_sip_calls.c +++ b/plat/rockchip/rk3368/plat_sip_calls.c @@ -19,9 +19,6 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, void *handle, uint64_t flags) { - switch (smc_fid) { - default: - ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); - SMC_RET1(handle, SMC_UNK); - } + ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); + SMC_RET1(handle, SMC_UNK); } diff --git a/plat/rockchip/rk3399/drivers/dram/dfs.c b/plat/rockchip/rk3399/drivers/dram/dfs.c index d629e4bfb..70d9423b3 100644 --- a/plat/rockchip/rk3399/drivers/dram/dfs.c +++ b/plat/rockchip/rk3399/drivers/dram/dfs.c @@ -207,6 +207,9 @@ static void sdram_timing_cfg_init(struct timing_related_config *ptiming_config, ptiming_config->rdbi = 0; ptiming_config->wdbi = 0; break; + default: + /* Do nothing in default case */ + break; } ptiming_config->dramds = drv_config->dram_side_drv; ptiming_config->dramodt = drv_config->dram_side_dq_odt; diff --git a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c index 2e196b54c..3527f0e5e 100644 --- a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c +++ b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c @@ -1314,5 +1314,8 @@ void dram_get_parameter(struct timing_related_config *timing_config, case LPDDR4: lpddr4_get_parameter(timing_config, pdram_timing); break; + default: + /* Do nothing in default case */ + break; } } diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c index caea7a723..ed1ea8b63 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c @@ -310,6 +310,7 @@ static int pmu_set_power_domain(uint32_t pd_id, uint32_t pd_state) pmu_bus_idle_req(BUS_ID_PERIHP, state); break; default: + /* Do nothing in default case */ break; } @@ -647,12 +648,8 @@ int rockchip_soc_cores_pwr_dm_off(void) int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl, plat_local_state_t lvl_state) { - switch (lvl) { - case MPIDR_AFFLVL1: + if (lvl == MPIDR_AFFLVL1) { clst_pwr_domain_suspend(lvl_state); - break; - default: - break; } return PSCI_E_SUCCESS; @@ -675,12 +672,8 @@ int rockchip_soc_cores_pwr_dm_suspend(void) int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state) { - switch (lvl) { - case MPIDR_AFFLVL1: + if (lvl == MPIDR_AFFLVL1) { clst_pwr_domain_suspend(lvl_state); - break; - default: - break; } return PSCI_E_SUCCESS; @@ -698,12 +691,8 @@ int rockchip_soc_cores_pwr_dm_on_finish(void) int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl, plat_local_state_t lvl_state) { - switch (lvl) { - case MPIDR_AFFLVL1: + if (lvl == MPIDR_AFFLVL1) { clst_pwr_domain_resume(lvl_state); - break; - default: - break; } return PSCI_E_SUCCESS; @@ -721,11 +710,8 @@ int rockchip_soc_cores_pwr_dm_resume(void) int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state) { - switch (lvl) { - case MPIDR_AFFLVL1: + if (lvl == MPIDR_AFFLVL1) { clst_pwr_domain_resume(lvl_state); - default: - break; } return PSCI_E_SUCCESS; diff --git a/plat/rpi3/rpi3_bl2_setup.c b/plat/rpi3/rpi3_bl2_setup.c index 1fd822e9a..86c66d022 100644 --- a/plat/rpi3/rpi3_bl2_setup.c +++ b/plat/rpi3/rpi3_bl2_setup.c @@ -83,6 +83,9 @@ int bl2_plat_handle_post_image_load(unsigned int image_id) bl_mem_params->ep_info.spsr = rpi3_get_spsr_for_bl33_entry(); break; + default: + /* Do nothing in default case */ + break; } return err; diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c index 54b30e5b1..f7ae42646 100644 --- a/plat/socionext/uniphier/uniphier_bl2_setup.c +++ b/plat/socionext/uniphier/uniphier_bl2_setup.c @@ -85,6 +85,7 @@ void bl2_el3_plat_arch_setup(void) break; default: plat_error_handler(-ENOTSUP); + break; } if (!skip_scp) { diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c index d7a7d4e2e..fd054beb9 100644 --- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c +++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c @@ -48,6 +48,9 @@ unsigned int zynqmp_get_uart_clk(void) return 25000000; case ZYNQMP_CSU_VERSION_QEMU: return 133000000; + default: + /* Do nothing in default case */ + break; } return 100000000; @@ -187,6 +190,9 @@ static void zynqmp_print_platform_name(void) case ZYNQMP_CSU_VERSION_SILICON: label = "silicon"; break; + default: + /* Do nothing in default case */ + break; } NOTICE("ATF running on XCZU%s/%s v%d/RTL%d.%d at 0x%x%s\n", @@ -258,6 +264,9 @@ unsigned int plat_get_syscnt_freq2(void) return 4000000; case ZYNQMP_CSU_VERSION_QEMU: return 50000000; + default: + /* Do nothing in default case */ + break; } return mmio_read_32(IOU_SCNTRS_BASEFREQ); -- cgit v1.2.3