From d56a846121136ceacca1eeabfbf440059e99acba Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Sun, 5 Nov 2017 22:56:26 +0100 Subject: ARMv7: introduce Cortex-A5 Signed-off-by: Etienne Carriere --- include/lib/cpus/aarch32/cortex_a5.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/lib/cpus/aarch32/cortex_a5.h (limited to 'include') diff --git a/include/lib/cpus/aarch32/cortex_a5.h b/include/lib/cpus/aarch32/cortex_a5.h new file mode 100644 index 000000000..0a0b7ffa5 --- /dev/null +++ b/include/lib/cpus/aarch32/cortex_a5.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __CORTEX_A5_H__ +#define __CORTEX_A5_H__ + +/******************************************************************************* + * Cortex-A8 midr with version/revision set to 0 + ******************************************************************************/ +#define CORTEX_A5_MIDR 0x410FC050 + +/******************************************************************************* + * CPU Auxiliary Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A5_ACTLR_SMP_BIT (1 << 6) + +#endif /* __CORTEX_A5_H__ */ -- cgit v1.2.3