From a601afe1585e8d53afb7c1ea87d0ba7a5bb85bd3 Mon Sep 17 00:00:00 2001 From: lauwal01 Date: Mon, 24 Jun 2019 11:23:50 -0500 Subject: Workaround for Neoverse N1 erratum 1073348 Neoverse N1 erratum 1073348 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR_EL1 system register, which disables static prediction. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e Signed-off-by: Lauren Wehrmeister --- docs/design/cpu-specific-build-macros.rst | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'docs') diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 6b524c24c..55109dc7d 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -226,6 +226,11 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1275112``: This applies errata 1275112 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. +For Neoverse N1, the following errata build flags are defined : + +- ``ERRATA_N1_1073348``: This applies errata 1073348 workaround to Neoverse-N1 + CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU. + - ``ERRATA_N1_1315703``: This applies errata 1315703 workaround to Neoverse-N1 CPU. This needs to be enabled only for revision <= r3p0 of the CPU. -- cgit v1.2.3