From c0740e4fa6e2bb9595270444cbccd23afda22c88 Mon Sep 17 00:00:00 2001 From: Antonio Nino Diaz Date: Fri, 28 Sep 2018 16:39:26 +0100 Subject: plat/arm: Remove option ARM_BOARD_OPTIMISE_MEM This option makes it hard to optimize the memory definitions of all Arm platforms because any change in the common defines must work in all of them. The best thing to do is to remove it and move the definition to each platform's header. FVP, SGI and SGM were using the definitions in board_arm_def.h. The definitions have been copied to each platform's platform_def.h. Juno was already using the ones in platform_def.h, so there have been no changes. Change-Id: I9aecd11bbc72a3d0d7aad1ef9934d8df21dcfaf2 Signed-off-by: Antonio Nino Diaz --- docs/user-guide.rst | 8 -------- 1 file changed, 8 deletions(-) (limited to 'docs') diff --git a/docs/user-guide.rst b/docs/user-guide.rst index 47a04a315..2632329a2 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -707,14 +707,6 @@ Arm development platform specific build options sets the TSP location to DRAM and ignores the ``ARM_TSP_RAM_LOCATION`` build flag. -- ``ARM_BOARD_OPTIMISE_MEM``: Boolean option to enable or disable optimisation - of the memory reserved for each image. This affects the maximum size of each - BL image as well as the number of allocated memory regions and translation - tables. By default this flag is 0, which means it uses the default - unoptimised values for these macros. Arm development platforms that wish to - optimise memory usage need to set this flag to 1 and must override the - related macros. - - ``ARM_CONFIG_CNTACR``: boolean option to unlock access to the ``CNTBase`` frame registers by setting the ``CNTCTLBase.CNTACR`` register bits. The frame number ```` is defined by ``PLAT_ARM_NSTIMER_FRAME_ID``, which should -- cgit v1.2.3