From a1473c99e69f4ddd89ccde34439dc489a601939a Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 16 Jan 2021 01:05:38 -0600 Subject: allwinner: psci: Drop .get_node_hw_state callback This optional PSCI function was only implemented when SCPI was available. However, the underlying SCPI function is not able to fulfill the necessary contract. First, the SCPI protocol has no way to represent HW_STANDBY at the CPU power level. Second, the SCPI implementation maintains its own logical view of power states, and its implementation of SCPI_CMD_GET_CSS_POWER_STATE does not actually query the hardware. Thus it cannot provide "the physical view of power state", as required for this function by the PSCI specification. Since the function is optional, drop it. Change-Id: I5f3a0810ac19ddeb3c0c5d35aeb09f09a0b80c1d Signed-off-by: Samuel Holland --- plat/allwinner/common/sunxi_pm.c | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/plat/allwinner/common/sunxi_pm.c b/plat/allwinner/common/sunxi_pm.c index e0fa5b3ec..d750d8c1d 100644 --- a/plat/allwinner/common/sunxi_pm.c +++ b/plat/allwinner/common/sunxi_pm.c @@ -226,29 +226,6 @@ static void sunxi_get_sys_suspend_power_state(psci_power_state_t *req_state) req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; } -static int sunxi_get_node_hw_state(u_register_t mpidr, - unsigned int power_level) -{ - unsigned int cluster_state, cpu_state; - unsigned int cpu = MPIDR_AFFLVL0_VAL(mpidr); - - /* SoC power level (always on if PSCI works). */ - if (power_level == SYSTEM_PWR_LVL) - return HW_ON; - if (scpi_get_css_power_state(mpidr, &cpu_state, &cluster_state)) - return PSCI_E_NOT_SUPPORTED; - /* Cluster power level (full power state available). */ - if (power_level == CLUSTER_PWR_LVL) { - if (cluster_state == scpi_power_on) - return HW_ON; - if (cluster_state == scpi_power_retention) - return HW_STANDBY; - return HW_OFF; - } - /* CPU power level (one bit boolean for on or off). */ - return ((cpu_state & BIT(cpu)) != 0) ? HW_ON : HW_OFF; -} - static plat_psci_ops_t sunxi_psci_ops = { .cpu_standby = sunxi_cpu_standby, .pwr_domain_on = sunxi_pwr_domain_on, @@ -297,7 +274,6 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, sunxi_psci_ops.pwr_domain_suspend = sunxi_pwr_domain_off; sunxi_psci_ops.pwr_domain_suspend_finish = sunxi_pwr_domain_on_finish; sunxi_psci_ops.get_sys_suspend_power_state = sunxi_get_sys_suspend_power_state; - sunxi_psci_ops.get_node_hw_state = sunxi_get_node_hw_state; } else { /* This is only needed when SCPI is unavailable. */ sunxi_psci_ops.pwr_domain_pwr_down_wfi = sunxi_pwr_down_wfi; -- cgit v1.2.3 From 772ef7e7af16cef85c20e24d3e64f52287785ec3 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 16 Jan 2021 01:18:38 -0600 Subject: allwinner: psci: Drop MPIDR check from .pwr_domain_on This duplicated the logic in psci_validate_mpidr() which was already called from psci_cpu_on(). Change-Id: I96ee92f1ce3e9cc2985b4e229ba86ebd27b79915 Signed-off-by: Samuel Holland --- plat/allwinner/common/sunxi_pm.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/plat/allwinner/common/sunxi_pm.c b/plat/allwinner/common/sunxi_pm.c index d750d8c1d..e70d859e3 100644 --- a/plat/allwinner/common/sunxi_pm.c +++ b/plat/allwinner/common/sunxi_pm.c @@ -37,8 +37,6 @@ #define SYSTEM_PWR_STATE(state) \ ((state)->pwr_domain_state[SYSTEM_PWR_LVL]) -#define mpidr_is_valid(mpidr) (plat_core_pos_by_mpidr(mpidr) >= 0) - /* * The addresses for the SCP exception vectors are defined in the or1k * architecture specification. @@ -78,9 +76,6 @@ static void sunxi_cpu_standby(plat_local_state_t cpu_state) static int sunxi_pwr_domain_on(u_register_t mpidr) { - if (mpidr_is_valid(mpidr) == 0) - return PSCI_E_INTERN_FAIL; - if (scpi_available) { scpi_set_css_power_state(mpidr, scpi_power_on, -- cgit v1.2.3 From 814dce8f96fdb82d095b0041a204ba4a272c0913 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 16 Jan 2021 01:21:38 -0600 Subject: allwinner: psci: Invert check in .validate_ns_entrypoint Checking the exceptional case and letting the success case fall through is not only more idiomatic, but it also allows adding more exceptional cases in the future, such as a check for overlapping secure DRAM. Change-Id: I720441a6a8853fd7f211ebe851f14d921a6db03d Signed-off-by: Samuel Holland --- plat/allwinner/common/sunxi_pm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/plat/allwinner/common/sunxi_pm.c b/plat/allwinner/common/sunxi_pm.c index e70d859e3..aa80c528b 100644 --- a/plat/allwinner/common/sunxi_pm.c +++ b/plat/allwinner/common/sunxi_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -207,10 +207,11 @@ static int sunxi_validate_power_state(unsigned int power_state, static int sunxi_validate_ns_entrypoint(uintptr_t ns_entrypoint) { /* The non-secure entry point must be in DRAM */ - if (ns_entrypoint >= SUNXI_DRAM_BASE) - return PSCI_E_SUCCESS; + if (ns_entrypoint < SUNXI_DRAM_BASE) { + return PSCI_E_INVALID_ADDRESS; + } - return PSCI_E_INVALID_ADDRESS; + return PSCI_E_SUCCESS; } static void sunxi_get_sys_suspend_power_state(psci_power_state_t *req_state) -- cgit v1.2.3 From ed267c92ad46229394323f21d0e431d7c05f5342 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 24 Jan 2021 16:24:12 -0600 Subject: allwinner: Leave CPU power alone during BL31 setup Disabling secondary CPUs during boot is unnecessary because the other CPUs are already in reset, and it saves an entirely insignificant amount of power. Let's remove this bit of code that was added mostly "because we can", and along with it remove an unconditional dependency on the CPU ops functions. Signed-off-by: Samuel Holland Change-Id: Ia77a1b722da6ba989c3992b656a6cde3f2238fd7 --- plat/allwinner/common/sunxi_bl31_setup.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/plat/allwinner/common/sunxi_bl31_setup.c b/plat/allwinner/common/sunxi_bl31_setup.c index 9c8eaa409..b619b18ed 100644 --- a/plat/allwinner/common/sunxi_bl31_setup.c +++ b/plat/allwinner/common/sunxi_bl31_setup.c @@ -100,9 +100,6 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, bl33_image_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); - - /* Turn off all secondary CPUs */ - sunxi_disable_secondary_cpus(read_mpidr()); } void bl31_plat_arch_setup(void) -- cgit v1.2.3