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* Ensure proper ID register is checked for feature detectionDimitris Papastamos2019-03-041-2/+2
| | | | | | | | | | SSBS support is determined by checking ID_AA64PFR1_EL1 and not ID_AA64PFR0_EL1. Fixes ARM-Software/tf-issues#679 Change-Id: I8ecba13b850995ec6a6ede3c2a1e02e69a3a95db Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
* trusty: Include file with GIC definitionsAntonio Nino Diaz2019-02-271-1/+2
| | | | | | | | The GIC definitions used in this file have to be provided by the platform but platform_def.h wasn't included. Change-Id: I858cdf7e60c50577c8e798d64ec2cbc4f067f33b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1824 from antonio-nino-diaz-arm/an/move-dyn-xlatAntonio Niño Díaz2019-02-181-2/+0
|\ | | | | fvp: trusty: Move dynamic xlat enable to platform
| * fvp: trusty: Move dynamic xlat enable to platformAntonio Nino Diaz2019-02-121-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Rather than letting the Trusty makefile set the option to enable dynamic translation tables, make platforms do it themselves. This also allows platforms to replace the implementation of the translation tables library as long as they use the same function prototypes. Change-Id: Ia60904f61709ac323addcb57f7a83391d9e21cd0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Remove unnecessary register saveAntonio Nino Diaz2019-02-141-8/+0
| | | | | | | | | | | | | | | | | | Since commit 01fc1c24b9a0 ("BL31: Use helper function to save registers in SMC handler") all the general-purpose registers are saved when entering EL3. It isn't needed to save them here. Change-Id: Ic540a5441b89b70888da587ab8fc3b2508cef8cc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Sanitize SPD include pathsAntonio Nino Diaz2019-02-124-3/+8
|/ | | | | | | | | | Commit 09d40e0e0828 ("Sanitise includes across codebase") modified the include paths of the TSP includes but it didn't remove the include path from the makefile or did the same for TLK. This patch does the remaining work. Change-Id: Iecee2e88fabcd06989d35568c3a4c1f4e7d93572 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1810 from antonio-nino-diaz-arm/an/setjmpAntonio Niño Díaz2019-02-113-10/+10
|\ | | | | Make setjmp/longjmp compliant with the C standard and move them to libc
| * Make setjmp.h prototypes comply with the C standardAntonio Nino Diaz2019-02-083-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having a custom implementation of setjmp() and longjmp() it is better to follow the C standard. The comments in setjmp.h are no longer needed as there are no deviations from the expected one, so they have been removed. All SDEI code that relied on them has been fixed to use the new function prototypes and structs. Change-Id: I6cd2e21cb5a5bcf81ba12283f2e4c067bd5172ca Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | trusty: Require dynamic translation tablesAntonio Nino Diaz2019-02-061-1/+3
|/ | | | | | | | | | Trusty requires dynamic translation tables support, so the makefile of Trusty itself should request it. Not doing so causes platforms such as FVP to fail to build with Trusty. Other platforms like Tegra still build because they use dynamic translation tables by default. Change-Id: Id67d3b9e1f7d0547fa81e81cefa3faf1e0e6f876 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* spd: trusty: memmap trusty's code memory before peekingVarun Wadekar2019-02-051-0/+12
| | | | | | | | | | | | This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image. On Tegra platforms, this means we have to increase the mappings to accomodate the new memmap entry. Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* spd: trusty: pass max affinity level to TrustyStephen Wolfe2019-01-311-8/+8
| | | | | | | | | | During System Suspend, the entire system loses its state. To allow Trusty to save/restore its context and allow its TAs to participate in the suspend process, it needs to look at the max affinity level being suspended. This patch passes the max affinity level to Trusty to enable to do so. Change-Id: If7838dae10c3f5a694baedb15ec56fbad41f2b36 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* spd: tlkd: remove unwanted assert on System Suspend entryMihir Joshi2019-01-311-1/+0
| | | | | | | | | | | | c_rt_ctx is used to store current SP before the system goes into suspend. The assert for its value being zero is not really necessary as the value gets over-written eventually. This patch removes assert(tlk_ctx->c_rt_ctx == 0) from the System Suspend path, as a result. Change-Id: If41f15e74ebbbfd82958d8e179114899b2ffb0a7 Signed-off-by: Mihir Joshi <mihirj@nvidia.com>
* tlkd: support new TLK SMCsMihir Joshi2019-01-311-5/+10
| | | | | | | | | | | | | | | | | | | | | | This patch adds support to handle following TLK SMCs: {TLK_SS_REGISTER_HANDLER, TLK_REGISTER_NS_DRAM_RANGES, TLK_SET_ROOT_OF_TRUST} These SMCs need to be supported in ATF in order to forward them to TLK. Otherwise, these functionalities won't work. Brief: TLK_SS_REGISTER_HANDLER: This SMC is issued by TLK Linux Driver to set up secure storage buffers. TLK_REGISTER_NS_DRAM_RANGES: Cboot performs this SMC during boot to pass NS memory ranges to TLK. TLK_SET_ROOT_OF_TRUST: Cboot performs this SMC during boot to pass Verified Boot parameters to TLK. Change-Id: I18af35f6dd6f510dfc22c1d1d1d07f643c7b82bc Reviewed-on: https://git-master.nvidia.com/r/1643851 Signed-off-by: Mihir Joshi <mihirj@nvidia.com>
* Remove support for the SMC Calling Convention 2.0Antonio Nino Diaz2019-01-303-12/+31
| | | | | | | | | | | | | | This reverts commit 2f370465241c ("Add support for the SMC Calling Convention 2.0"). SMCCC v2.0 is no longer required for SPM, and won't be needed in the future. Removing it makes the SMC handling code less complicated. The SPM implementation based on SPCI and SPRT was using it, but it has been adapted to SMCCC v1.0. Change-Id: I36795b91857b2b9c00437cfbfed04b3c1627f578 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1781 from dtwlin/m2Antonio Niño Díaz2019-01-251-1/+2
|\ | | | | spd: trusty: trusty_setup should bail on unknown image
| * spd: trusty: trusty_setup should bail on unknown imageDavid Lin2019-01-241-1/+2
| | | | | | | | | | | | | | | | When an unknown Trusty image is found, there's no point of still trying to register the BL32 init handler. Instead, we just should bail out of the trusty_setup() and allow the system to continue to boot. Signed-off-by: David Lin <dtwlin@google.com>
* | spd: trusty : fix defects flagged by MISRA scanAnthony Zhou2019-01-232-102/+106
|/ | | | | | | | | | | | | | | | | | | Main Fixes: Use int32_t replace int [Rule 4.6] Added explicit casts (e.g. 0U) to integers in order for them to be compatible with whatever operation they're used in [Rule 10.1] Force operands of an operator to the same type category [Rule 10.4] Fixed if statement conditional to be essentially boolean [Rule 14.4] Voided non c-library functions whose return types are not used [Rule 17.7] Change-Id: I98caa330c371757eb2dfb9438448cb99115ed907 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
* SPM: Rename folder of SPM based on MMAntonio Nino Diaz2019-01-228-1/+1
| | | | | | | This implementation is no longer deprecated. Change-Id: I68552d0fd5ba9f08fad4345e4657e8e3c5362a36 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SPM: Rename SPM_DEPRECATED flag to SPM_MMAntonio Nino Diaz2019-01-221-2/+2
| | | | | | | | | The SPM implementation based on MM is going to be kept for the foreseeable future. Change-Id: I11e96778a4f52a1aa803e7e048d9a7cb24a53954 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Acked-by: Sumit Garg <sumit.garg@linaro.org>
* Merge pull request #1738 from ardbiesheuvel/synquacer-spmSoby Mathew2019-01-163-5/+14
|\ | | | | synquacer: add SPM support
| * services/spm_deprecated: fix return code polarity of spm_init()Ard Biesheuvel2019-01-151-1/+1
| | | | | | | | | | | | | | Registered init handlers return a boolean int, not a return code, so convert the result from the SPM init call before returning it. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
| * services/spm_deprecated: disable alignment checking for S-EL0Ard Biesheuvel2019-01-151-2/+5
| | | | | | | | | | | | | | | | | | Permit unaligned accesses while executing the secure partition payload, so that we don't have to modify existing code that we will host there. (The UEFI spec explicitly permits unaligned accesses) Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
| * services/spm_deprecated: permit timer sysreg access at S-EL0Ard Biesheuvel2019-01-082-0/+6
| | | | | | | | | | | | | | | | | | Expose the timer registers that are accessible at EL0 per the architecture to the SPM payload running in secure EL0. Note that this requires NS_TIMER_SWITCH to be enable for all users of this code. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
| * services/spm_deprecated: update ARM platform specific assertsArd Biesheuvel2019-01-081-2/+2
| | | | | | | | | | | | | | | | | | Update some asserts that refer to #defines that only occur in ARM platforms, preventing this code to be used on other platforms. Instead, use a platform agnostic name, and update all the existing users. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* | Correct typographical errorsPaul Beesley2019-01-155-12/+12
|/ | | | | | | | | | | Corrects typos in core code, documentation files, drivers, Arm platforms and services. None of the corrections affect code; changes are limited to comments and other documentation. Change-Id: I5c1027b06ef149864f315ccc0ea473e2a16bfd1d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
* Sanitise includes across codebaseAntonio Nino Diaz2019-01-0437-210/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1712 from jeenu-arm/ssbsSoby Mathew2018-12-121-1/+23
|\ | | | | AArch64: Use SSBS for CVE_2018_3639 mitigation
| * AArch64: Use SSBS for CVE_2018_3639 mitigationJeenu Viswambharan2018-12-101-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armv8.5 extensions introduces PSTATE.SSBS (Speculation Store Bypass Safe) bit to mitigate against Variant 4 vulnerabilities. Although an Armv8.5 feature, this can be implemented by CPUs implementing earlier version of the architecture. With this patch, when both PSTATE.SSBS is implemented and DYNAMIC_WORKAROUND_CVE_2018_3639 is active, querying for SMCCC_ARCH_WORKAROUND_2 via. SMCCC_ARCH_FEATURES call would return 1 to indicate that mitigation on the PE is either permanently enabled or not required. When SSBS is implemented, SCTLR_EL3.DSSBS is initialized to 0 at reset of every BL stage. This means that EL3 always executes with mitigation applied. For Cortex A76, if the PE implements SSBS, the existing mitigation (by using a different vector table, and tweaking CPU ACTLR2) is not used. Change-Id: Ib0386c5714184144d4747951751c2fc6ba4242b6 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* | SPM: Rename files for consistencyAntonio Nino Diaz2018-12-116-4/+4
| | | | | | | | | | | | | | Rename files prefixed by sp_ to spm_. Change-Id: Ie3016a4c4ac5987fe6fdd734c6b470c60954e23d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Remove remaining SMC interfacesAntonio Nino Diaz2018-12-113-52/+4
| | | | | | | | | | | | | | | | Also, add a disclaimer to explain that the current implementation of SPM is a prototype that is going to undergo a lot of rework. Change-Id: I303c1e61c51d9f286cc599fea565fc9ba5a996bf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Migrate mem attr get/set helpers to SPRTAntonio Nino Diaz2018-12-114-160/+157
| | | | | | | | | | | | | | | | The old SMCs SP_MEMORY_ATTRIBUTES_{GET,SET}_AARCH64 have been removed in favour of SPRT_MEMORY_PERM_ATTR_{GET,SET}_AARCH64. Change-Id: Idb93cfa5461d0098df941037c5653f7c44b65227 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Allow preemption in non-blocking requestsAntonio Nino Diaz2018-12-113-8/+65
| | | | | | | | | | Change-Id: I1fdc2285a3f6517a715ad6159322543fd5a37a37 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Support non-blocking callsAntonio Nino Diaz2018-12-111-0/+329
| | | | | | | | | | | | | | | | | | | | | | Note that the arguments passed during the SMC call don't comply with the SPCI specifications. This will be fixed in following patches, but it is needed to implement a few more SPCI SMCs to be able to do it. The current code allows us to start testing it. Change-Id: Ic13dcc54c40327df03be1b0f52e8a44f468f06b4 Co-authored-by: Jean-Paul Etienne <jean-paul.etienne@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Implement global response buffer helpersAntonio Nino Diaz2018-12-113-0/+115
| | | | | | | | | | | | | | | | This buffer is where all the responses from Secure Partitions are stored until they are requested. Change-Id: Iafeb8f0848c5ff6f3e187060cd3a47702484dc45 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Prevent simultaneous blocking callsAntonio Nino Diaz2018-12-113-0/+48
| | | | | | | | | | | | | | Blocking calls can only succeed if the target Secure Partition is idle. Change-Id: Iabeaa0b8d3e653fd8581fa086758936abfc1c772 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Support blocking callsAntonio Nino Diaz2018-12-115-3/+165
| | | | | | | | | | | | | | | | | | | | Note that the arguments passed during the SMC call don't comply with the SPCI specifications. This will be fixed in following patches, but it is needed to implement a few more SPCI SMCs to be able to do it. The current code allows us to start testing it. Change-Id: Ief0e75d072b311737fcdb0c6a60ba5b7406a9ee5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Introduce SPRT C host libraryAntonio Nino Diaz2018-12-111-1/+5
| | | | | | | | | | | | Change-Id: If57ec9cc0791f49d9ade83dff9d24ef9047963a8 Co-authored-by: Jean-Paul Etienne <jean-paul.etienne@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Implement SPCI open/close handle SMCsAntonio Nino Diaz2018-12-113-0/+282
| | | | | | | | | | | | | | | | Introduce SMCs that open and close handles according to the SPCI specification. Change-Id: I65f365f15612e01aa445e783e96e48ae275c39fd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Introduce SMC handlers for SPCI and SPRTAntonio Nino Diaz2018-12-113-2/+107
| | | | | | | | | | Change-Id: I2ae9b3bb686c41b2e138132a7bed107925ac861e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Support multiple xlat tables contextsAntonio Nino Diaz2018-12-111-9/+60
| | | | | | | | | | | | Change-Id: Ib7c2529b85bb5930d44907edfc8ead13d3b1ef4d Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Support multiple partitionsAntonio Nino Diaz2018-12-113-37/+94
| | | | | | | | | | Change-Id: I6673a5f8c2f6afa7780483e0ce8d4dad4c8dc8ea Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Remove old SMC interfacesAntonio Nino Diaz2018-12-111-96/+0
| | | | | | | | | | | | | | Remove interfaces based on MM_COMMUNICATE. Change-Id: I628c884b91d9f4758269ea2c4dedc37a66bb93cf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Map memory regions from RDAntonio Nino Diaz2018-12-113-12/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPM needs to map a number of regions on behalf of the secure partition. Previously, it used to get a list of them from platform code using the plat_get_secure_partition_mmap() API. Now it gets them from the resource description structure. The SPM<->SP shared buffer is mapped dynamically at EL3. This buffer is used to pass information between SPM and SP, so it must be mapped at EL3 as well in order to be used by SPM. Dynamic translation tables have been enabled when the Trusted Firmware is compiled with SPM support. Change-Id: I64ad335e931661812a0a60558e60372e1e5e6b72 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Read entrypoint from resource descriptorAntonio Nino Diaz2018-12-111-1/+2
| | | | | | | | | | | | | | | | Read entrypoint of the Secure Partition from the resource description struct. Change-Id: Ie693c7b4d4fecafd85b6934d9d8c4232efb1dc55 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Load image and RD from SP packageAntonio Nino Diaz2018-12-112-0/+26
| | | | | | | | | | | | | | | | Load SP and RD from package instead of relying on RD being already loaded in memory and the SP being loaded as a BL32 image. Change-Id: I18d4fbf4597656c6a7e878e1d7c01a8a324f3f8a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Remove SP memory mappings definitionsAntonio Nino Diaz2018-12-103-40/+4
| | | | | | | | | | | | | | | | This information is retrieved from the resource description now. Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094 Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Deprecate boot info structAntonio Nino Diaz2018-12-101-68/+0
| | | | | | | | | | | | | | | | This information is defined by the Secure Partition in the resource description. Change-Id: Ia7db90c5de8360a596106880d3f6a632a88d3ea8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | SPM: Deprecate the current implementationAntonio Nino Diaz2018-12-108-0/+1075
|/ | | | | | | | | | | | | | | | | | | The current SPM is a prototype that only supports one secure partition in EL0. The objective of SPM is to have multiple partitions. The current MM interface isn't adequate for this, so it is needed to modify heavily the code to add proper support for it. However, there are platforms which are already using this (like SGI) and removing the code would break it. For this reason, the current SPM code has been duplicated in order to temporarily preserve compatibility. All new improvements/changes to SPM will be done in the non-deprecated copy, that may change without notice. The new build option SPM_DEPRECATED has been introduced to select the SPM implementation. It defaults to 1, that selects the deprecated SPM. Change-Id: Ic9f80b53b450e97b4d3f47e4ef4a138ee8d87443 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* SDEI: Unconditionally resume Secure if it was interruptedJeenu Viswambharan2018-11-261-3/+2
| | | | | | | | | | | | | Secure world execution nearly always expect a controlled exit to Non-secure world. SDEI interrupts, although targets EL3, occur on behalf of Non-secure world, and may have higher priority than Secure world interrupts. Therefore they might preempt Secure execution, and yield execution to Non-secure SDEI handler. Upon completion of SDEI event handling (regardless of whether it's COPLETE or COMPLETE_AND_RESUME), we must resume Secure execution if it was preempted. Change-Id: I6edd991032588588427ba2fe6c3d7668f7080e3d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* SPM: Raise running priority of the core while in Secure PartitionSughosh Ganu2018-11-141-0/+20
| | | | | | | | | | | | | | The current secure partition design mandates that a) at a point, only a single core can be executing in the secure partition, and b) a core cannot be preempted by an interrupt while executing in secure partition. Ensure this by activating the SPM priority prior to entering the parition. Deactivate the priority on return from the partition. Change-Id: Icb3473496d16b733564592eef06304a1028e4f5c Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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