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* Mbed TLS: Remove weak heap implementationAmbroise Vincent2019-04-121-1/+6
| | | | | | | | | | | | The implementation of the heap function plat_get_mbedtls_heap() becomes mandatory for platforms supporting TRUSTED_BOARD_BOOT. The shared Mbed TLS heap default weak function implementation is converted to a helper function get_mbedtls_heap_helper() which can be used by the platforms for their own function implementation. Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* plat: imx8m: remove deprecated code includeJacky Bai2019-04-082-2/+0
| | | | | | | | | The 'drivers/console/aarch64/console.S' is not needed, so remove it from build to fix the build error when 'ERROR_DEPRECATED'set. Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
* Makefile: remove extra include paths in INCLUDESAmbroise Vincent2019-04-031-1/+1
| | | | | | | | | | Now it is needed to use the full path of the common header files. Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more information. Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* Console: remove deprecated finish_console_registerAmbroise Vincent2019-04-033-3/+0
| | | | | | | | | | The old version of the macro is deprecated. Commit cc5859ca19ff ("Multi-console: Deprecate the `finish_console_register` macro") provides more details. Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
* plat: imx8m: Add the basic support for imx8mmJacky Bai2019-03-136-0/+453
| | | | | | | | | | | | | | | | | The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators this patch add the basic support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
* plat: imx8m: refactor the code to make it reusableJacky Bai2019-03-129-184/+492
| | | | | | | | | for the i.MX8M SOCs, part of the code for gpc and PSCI implementation can be reused and make it common for all these SoCs. this patch extracts the common part for reuse. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
* Merge pull request #1837 from spencercw/masterAntonio Niño Díaz2019-03-042-0/+10
|\ | | | | imx: Configure CAAM job rings master ID for i.MX8MQ
| * imx: Configure CAAM job rings master ID for i.MX8MQChris Spencer2019-02-222-0/+10
| | | | | | | | | | | | | | | | For i.MX8MQ B0 revision the default configuration of JRaMID is not valid to allow the kernel to use the CAAM job rings. This patch sets the master ID of the Cortex A in the JRaMID registers. Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
* | imx: make sure GIC redistributor is awake before initializationAnson Huang2019-03-011-0/+21
|/ | | | | | | | | | | | | | | | | | | | | | GICR_WAKER.ProcessorSleep can only be set to zero when: — GICR_WAKER.Sleep bit[0] == 0. — GICR_WAKER.Quiescent bit[31] == 0. On some platforms, when system reboot with GIC in sleep mode but with power ON, such as on NXP's i.MX8QM, Linux kernel enters suspend but could be requested to reboot, and GIC is in sleep mode and it is inside a power domain which is ON in this scenario, when CPU reset, the GIC driver trys to set CORE's redistributor interface to awake, with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] both set, the ProcessorSleep bit[1] will never be clear and cause system hang. This patch makes sure GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] are both zeor before clearing ProcessorSleep bit[1]. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: warp7: Migrate to MULTI_CONSOLE_APIYing-Chun Liu (PaulLiu)2019-02-123-2/+63
| | | | | | | This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
* Remove unneeded include paths in PLAT_INCLUDESAntonio Nino Diaz2019-02-011-1/+0
| | | | | | | | Also, update platform_def.h guidelines about includes in the porting guide. Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* imx: power optimization for i.mx8qxAnson Huang2019-01-294-27/+154
| | | | | | | | | | | | | | | | | | | | Current implementation of i.MX8QX power management related features does NOT optimize power number, all system resources like CCI, DDR, and A cluster etc. are kept in STBY mode (powered ON) when system suspend or CPU hotplug. To lower the power number, OFF mode should be adopted for those system resources whenever they can be OFF, A cluster will be OFF if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF if system suspend, IRQ steer can be OFF if the wakeup source is belonged to system controller partition, so wakeup source runtime check is used to determine if IRQ steer can be OFF before system suspend. If resources are powered off for suspend, they should be restored properly after system resume. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: power optimization for i.mx8qmAnson Huang2019-01-299-83/+290
| | | | | | | | | | | | | | | | | | | | Current implementation of i.MX8QM power management related features does NOT optimize power number, all system resources like CCI, DDR, and A cluster etc. are kept in STBY mode (powered ON) when system suspend or CPU hotplug. To lower the power number, OFF mode should be adopted for those system resources whenever they can be OFF, A cluster will be OFF if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF if system suspend, IRQ steer can be OFF if the wakeup source is belonged to system controller partition, so wakeup source runtime check is used to determine if IRQ steer can be OFF before system suspend. If resources are powered off for suspend, they should be restored properly after system resume. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* Merge pull request #1766 from Anson-Huang/masterAntonio Niño Díaz2019-01-259-1/+1261
|\ | | | | Add more SIP runtime service for i.MX8
| * imx: add i.MX8 SoCs build info SIP(silicon provider) service supportAnson Huang2019-01-183-0/+52
| | | | | | | | | | | | | | | | | | | | This patch adds NXP i.MX8 SoCs' build info SIP support for easy debug. With this function enabled, TF-A's commit hash can be showed in u-boot debug console when booting up, when there is any issue which could be related to TF-A, users can use the commit hash value to easily identify which commit introduces the issue. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| * imx: add i.MX8 SoCs thermal alarm SIP(silicon provider) service supportAnson Huang2019-01-183-0/+16
| | | | | | | | | | | | | | | | | | | | For NXP's i.MX8 SoCs with system controller inside, thermal sensors are maintained by SCFW, Linux needs to call SMC to trap to TF-A for thermal alarm operation etc. by calling SCFW API. This patch adds temperature alarm SIP service support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| * imx: add i.MX8 SoCs OTP SIP(silicon provider) service supportAnson Huang2019-01-183-0/+34
| | | | | | | | | | | | | | | | | | | | For NXP's i.MX8 SoCs with system controller inside, OTP is maintained by SCFW, Linux needs to call SMC to trap to TF-A for OTP read/write etc. operations by calling SCFW API. This patch adds OTP SIP service support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| * imx: support for i.MX8 SoCs misc IPCAnson Huang2019-01-185-1/+1124
| | | | | | | | | | | | | | | | | | | | | | NXP's i.MX8 SoCs have system controller (M4 core) which takes control of misc functions like temperature alarm, dma etc., other Cortex-A clusters can send out command via MU (Message Unit) to system controller for misc operation etc.. This patch adds misc IPC(inter-processor communication) support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
| * imx: add wakeup source SIP runtime service supportAnson Huang2019-01-184-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On i.MX8QM/i.MX8QX with system controller inside, the wakeup source is managed in SCFW(system controller firmware), if the wakeup source is belonged to system controller partition, then before Linux suspend, the wakeup source should be set to SC_PM_WAKE_SRC_SCU, and if the wakeup source is belonged to Cortex-A partition, the wakeup source should be set to SC_PM_WAKE_SRC_IRQSTEER, so need to add wakeup source SIP runtime service to get Linux kernel's wakeup source and set the correct wakeup source for system controller. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* | imx: enable necessary errata for i.mx8qmAnson Huang2019-01-241-0/+4
| | | | | | | | | | | | | | NXP's i.MX8QM uses Cortex-A53 r0p4, enable necessary erratas for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* | imx: enable necessary errata for i.mx8mqAnson Huang2019-01-241-0/+4
| | | | | | | | | | | | | | NXP's i.MX8MQ uses Cortex-A53 r0p4, enable necessary erratas for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* | warp7: Enable Trusted Board Boot for WaRP7Bryan O'Donoghue2019-01-184-1/+157
| | | | | | | | | | | | | | | | This patch enables Trusted Board Boot for warp7. A subsequent patch contains build/run instructions. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org>
* | warp7: Define DTB overlay address in memory mapBryan O'Donoghue2019-01-182-6/+15
| | | | | | | | | | | | | | | | This patch defines the expected DTB overlay address in the memory map for this platform. Its important that all points in the boot process agree on this memory map even if not all elements utilize it. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* | warp7: io_storage: Remove DTB from FIPBryan O'Donoghue2019-01-182-19/+0
|/ | | | | | | | | | | Recently upstreamed changes to OP-TEE mean that it is possible for OP-TEE to provide a DTB overlay directly to subsequent boot stages thus negating the requirement to bundle a DTB in the FIP. This patch switches off the dependency on the DTB in the FIP descriptor instead we will provide the necessary data as an overlay from OP-TEE. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* imx: add cpu-freq SIP runtime service supportAnson Huang2019-01-173-0/+42
| | | | | | | | | | On i.MX8QM/i.MX8QX with system controller inside, the CPU's clock rate is managed by SCFW(system controller firmware) and can ONLY be changed from secure world, so SIP runtime service is needed for setting CPU's clock rate, this patch adds cpu-freq SIP runtime service support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: add imx8qm/imx8qx SRTC SIP runtime service supportAnson Huang2019-01-175-0/+115
| | | | | | | | | | | On i.MX8QM/i.MX8QX with system controller inside, the SRTC is managed by SCFW(system controller firmware) and some functions like setting SRTC's time etc. can ONLY be requested from secure world, so SIP runtime service is needed for such kind of operations, this patch adds SRTC SIP runtime service support for i.MX8QM and i.MX8QX. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* Support for NXP's i.MX8 SoCs timer IPCAnson Huang2019-01-175-3/+828
| | | | | | | | | | | NXP's i.MX8 SoCs have system controller (M4 core) which takes control of timer management, including watchdog, srtc and system counter etc., other clusters like Cortex-A35 can send out command via MU (Message Unit) to system controller for timer operation. This patch adds timer IPC(inter-processor communication) support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: make imx uart work for debug modeAnson Huang2019-01-153-10/+16
| | | | | | | | | | | | | | | | | With DEBUG_CONSOLE enabled, build will fail for imx8mq platform: ./build/imx8mq/release/bl31/imx8mq_bl31_setup.o: In function `bl31_early_platform_setup2': imx8mq_bl31_setup.c:(.text.bl31_early_platform_setup2+0x40): undefined reference to `console_uart_register' Makefile:741: recipe for target 'build/imx8mq/release/bl31/bl31.elf' failed make: *** [build/imx8mq/release/bl31/bl31.elf] Error 1 Besides, the .console_flush callback needs to be added to avoid panic when debug mode is enabled, since the console_flush() will call it without checking whether the function callback is valid. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* imx: add necessary lpuart console_flush callback for debugAnson Huang2019-01-151-2/+8
| | | | | | | | | | Current lpuart driver does NOT implement .console_flush callback, if debug console is enabled, the console_flush() will call the undefined .console_flush callback(NULL) for lpuart and leak to panic, this patch adds .console_flush callback to make lpuart work for debug mode. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* Sanitise includes across codebaseAntonio Nino Diaz2019-01-0435-112/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* io_block: define MAX_IO_BLOCK_DEVICES as unsignedYann Gautier2018-12-101-1/+1
| | | | | | | This is used as a table index, and already compared with an unsigned int: block_dev_count. Signed-off-by: Yann Gautier <yann.gautier@st.com>
* Merge pull request #1700 from jwerner-chromium/JW_crashfixSoby Mathew2018-12-102-2/+0
|\ | | | | MULTI_CONSOLE_API fixes and cleanups
| * drivers/console: Link console framework code by defaultJulius Werner2018-12-062-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the build system link the console framework code by default, like it already does with other common libraries (e.g. cache helpers). This should not make a difference in practice since TF is linked with --gc-sections, so the linker will garbage collect all functions and data that are not referenced by any other code. Thus, if a platform doesn't want to include console code for size reasons and doesn't make any references to console functions, the code will not be included in the final binary. To avoid compatibility issues with older platform ports, only make this change for the MULTI_CONSOLE_API. Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3 Signed-off-by: Julius Werner <jwerner@chromium.org>
* | plat: imx: Add i.MX8MQ basic supportBai Ping2018-12-058-0/+976
|/ | | | | | | | | | | | | i.MX8MQ is new SOC of NXP's i.MX8M family based on A53. It can provide industry-leading audio, voice and video processing for applications that scale from consumer home audio to industrial building automation and mobile computers this patchset add the basic supoort to boot up the 4 X A53. more feature will be added later. Signed-off-by: Bai Ping <ping.bai@nxp.com>
* Standardise header guards across codebaseAntonio Nino Diaz2018-11-0828-85/+85
| | | | | | | | | | | | | | | | | | All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* warp7, ls1043: Remove unneeded include pathsAntonio Nino Diaz2018-10-301-1/+0
| | | | | | | | include/plat/arm/common isn't needed by them, and is removed to avoid dependency on Arm platform code. Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #1636 from antonio-nino-diaz-arm/an/consoleAntonio Niño Díaz2018-10-252-0/+14
|\ | | | | Deprecate weak crash console functions
| * Add plat_crash_console_flush to platforms without itAntonio Nino Diaz2018-10-252-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though at this point plat_crash_console_flush is optional, it will stop being optional in a following patch. The console driver of warp7 doesn't support flush, so the implementation is a placeholder. TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but they weren't global so they weren't actually used. Also, they were calling the wrong functions. imx8_helpers.S only has placeholders for all of the functions. Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Multi-console: Deprecate the `finish_console_register` macroSoby Mathew2018-10-191-1/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `finish_console_register` macro is used by the multi console framework to register the `console_t` driver callbacks. It relied on weak references to the `ldr` instruction to populate 0 to the callback in case the driver has not defined the appropriate function. Use of `ldr` instruction to load absolute address to a reference makes the binary position dependant. These instructions should be replaced with adrp/adr instruction for position independant executable(PIE). But adrp/adr instructions don't work well with weak references as described in GNU ld bugzilla issue 22589. This patch defines a new version of `finish_console_register` macro which can spcify which driver callbacks are valid and deprecates the old one. If any of the argument is not specified, then the macro populates 0 for that callback. Hence the functionality of the previous deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define is used to select the new variant of the macro and will be removed once the deprecated variant is removed. All the upstream console drivers have been migrated to use the new macro in this patch. NOTE: Platforms be aware that the new variant of the `finish_console_register` should be used and the old variant is deprecated. Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* imx8qm: imx8qx: Migrate to new interfacesAntonio Nino Diaz2018-09-285-17/+13
| | | | | | | | | - Migrate to new GIC interfaces. - Migrate to bl31_early_platform_setup2(). - Remove references to removed build options. Change-Id: Ia7c63f75325ea4b41e32a9de3f01b0007d0ae210 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* warp7: Migrate to new interfacesAntonio Nino Diaz2018-09-282-11/+1
| | | | | | | | | | - Fix reference to bl2_el3_early_platform_setup() - Remove references to removed build options. Change-Id: I9733bec64fc28db15716ddf481c05bdc30700b4a Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* warp7: Add warp7 platform to the buildBryan O'Donoghue2018-09-042-0/+408
| | | | | | | | | | | | Previous changes in this series made the necessary driver additions and updates. With those changes in-place we can add the platform.mk and bl2_el3_setup.c to drive the boot process. After this commit its possible to build a fully-functional TF-A for the WaRP7 and boot from the BootROM to the Linux command prompt in secure or non-secure mode. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: panic: hab: Call into BootROM failsafe on panic pathBryan O'Donoghue2018-09-041-0/+8
| | | | | | | | | | | | | | | | | | | | | This patch adds a callback into the BootROM's provided High Assurance Boot (HAB) failsafe function when panicking i.e. the call is done without making use of stack. The HAB failsafe function allows a piece of software to call into the BootROM and place the processor into failsafe mode. Failsafe mode is a special mode which presents a serial download protocol interface over UART or USB at the time of writing. If the board has been set into secure mode, then only a signed binary can be used to recover the board. Thus failsafe gives a putatively secure method of performing a secure recovery over UART or USB. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
* warp7: mem_params_desc: Add boot entries to mem params arrayBryan O'Donoghue2018-09-041-0/+75
| | | | | | | | | | | | | | | | | | | This patch adds entries to the mem params array for - BL32 - BL32_EXTRA1 - BL32_EXTRA2 - BL33 - HW_CONFIG_ID BL32 is marked as bootable to indicate that OPTEE is the thing that should be booted next. In our model OPTEE chain-loads onto u-boot so only BL32 is bootable. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: io_storage: Add initial stub warp7_io_storage.cBryan O'Donoghue2018-09-042-0/+219
| | | | | | | | | | | | This commit adds support for parsing a FIP pre-loaded by a previous boot-phase such as u-boot or via ATF reading directly from eMMC. [bod: squashing several patches from Rui, Jun and bod] Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: Define a platform_def.hBryan O'Donoghue2018-09-041-0/+217
| | | | | | | | | | | | | | | This patch defines a platform_def.h describing - FIP layout and location - eMMC device select - UART identity select - System clock frequency - Operational memory map Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: mem_params_desc: Add a file which exports a REGISTER_BL_IMAGE_DESCSBryan O'Donoghue2018-09-041-0/+15
| | | | | | | | | In order to link even a basic image we need to declare REGISTER_BL_IMAGE_DESCS. This patch declares an empty structure which is passed to REGISTER_BL_IMAGE_DESCS(). Later patches will add in some meaningful data. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: Add a warp7_private.h fileBryan O'Donoghue2018-09-041-0/+14
| | | | | | | Internal declarations for the WaRP7 port will go here. For now just include sys/types.h. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: image_load: Add warp7_image_load.cBryan O'Donoghue2018-09-041-0/+24
| | | | | | | | | | This commit adds warp7_image_load.c with the functions - plat_flush_next_bl_params() - plat_get_bl_image_load_info() - plat_get_next_bl_params() Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
* warp7: Add initial warp7_helpers.SBryan O'Donoghue2018-09-041-0/+44
| | | | | | | | | | | This commit adds a warp7_helpers.S which contains a implementation of: - platform_mem_init - plat_get_my_entrypoint - plat_crash_console_init - plat_crash_console_putc Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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