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* maintainers: allwinner: add missing link to github pageAndre Przywara2018-07-041-0/+1
| | | | | | | | A proper link to Samuel's github page was missing. Add this to make the link actually work. Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* allwinner: Add Samuel as second maintainerAndre Przywara2018-06-281-0/+2
| | | | | | | As Samuel contributed most of the original code and he has an interest in that, add him as a second maintainer for the Allwinner port. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* maintainers: Modify format of fileAntonio Nino Diaz2018-06-281-178/+156
| | | | | | | | | | | | | | | | The previous format was not very practical and hard to parse by scripts. The current format is easier as it uses more tokens that can be identified by scripts, while maintaining a reasonably good result when it is rendered. Some maintainers maintain more than one subsystem but they were all part of the same entry. In cases like this the entry has been split into two to clarify what file belongs to which subsystem. The list of maintainers of the Trusted Firmware has been updated. Change-Id: I4be2d527c5171e8d2d86fb49e45e1d9dbcbd2d80 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* maintainers.rst: separate maintainership of uniphier and synquacerMasahiro Yamada2018-06-231-1/+1
| | | | | | | Socionext has multiple product lines. The UniPhier is not the only platform any more. Correct the maintainership. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* synquacer: Add platform makefile and documentationSumit Garg2018-06-211-0/+11
| | | | | | | | | | | | | Add Makefile and plaform definations file. My thanks to Daniel Thompson and Ard Biesheuvel for the bits and pieces I've taken from their earlier work regarding build and deploy steps for Developerbox based on Synquacer SoCs. They deserve much of the credit for this work although, since I assembled and tested things, any blame is probably mine. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Daniel Thompson <daniel.thompson@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ti: k3: Setup initial files for platformNishanth Menon2018-06-191-0/+11
| | | | | | | | | | | | | | | | Create the baseline Makefile, platform definitions file and platform specific assembly macros file. This includes first set of constants for the platform including cache sizes and linker format and a stub for BL31 and the basic memory layout K3 SoC family of processors do not use require a BL1 or BL2 binary, since such functions are provided by an system controller on the SoC. This lowers the burden of ATF to purely managing the local ARM cores themselves. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
* Merge pull request #1410 from Anson-Huang/masterDimitris Papastamos2018-06-191-0/+10
|\ | | | | Add NXP's i.MX8QX and i.MX8QM SoC support
| * Support for NXP's i.MX8QX SoCAnson Huang2018-06-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | NXP's i.MX8QX is an ARMv8 SoC with 4 Cortex-A35 cores and system controller (Cortex-M4) inside, documentation can be found in below link: https://www.nxp.com/products/processors-and-microcontrollers/ applications-processors/i.mx-applications-processors/i.mx-8-processors:IMX8-SERIES This patch adds support for booting up SMP linux kernel (v4.9). Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* | allwinner: Add Allwinner A64 supportSamuel Holland2018-06-151-0/+11
|/ | | | | | | | | | | | | The Allwinner A64 SoC is quite popular on single board computers. It comes with four Cortex-A53 cores in a singe cluster and the usual peripherals for set-top box/tablet SoC. The ATF platform target is called "sun50i_a64". [Andre: adapted to amended directory layout, removed unneeded definitions ] Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* layerscape: Initial TF-A support for LS1043ardbJiafei Pan2018-04-101-0/+10
| | | | | | | | | | | | | | | | | | | | | | This patch introduce TF-A support for NXP's ls1043a platform. more details information of ls1043a chip and ls1043ardb board can be found at docs/plat/ls1043a.rst. Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1 loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel. Now TF-A on ls1043ardb platform has the following features in this patch: * Support boot from Nor flash. * TF-A can boot bl33 which runs in el2 of non-secure world. * TF-A boot OPTee OS. * Support PSCI Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> Signed-off-by: Wen He <wen.he_1@nxp.com>
* Update Arm TF references to TF-ADan Handley2018-03-151-5/+5
| | | | | | | | | | | | Update Arm Trusted Firmware references in the upstream documents to Trusted Firmware-A (TF-A). This is for consistency with and disambiguation from Trusted Firmware-M (TF-M). Also update other Arm trademarks, e.g. ARM->Arm, ARMv8->Armv8-A. Change-Id: I8bb0e18af29c6744eeea2dc6c08f2c10b20ede22 Signed-off-by: Dan Handley <dan.handley@arm.com> Signed-off-by: David Cunado <david.cunado@arm.com>
* maintainers.rst: Add maintainer for plat PoplarVictor Chong2018-02-071-4/+15
| | | | Signed-off-by: Victor Chong <victor.chong@linaro.org>
* Miscellaneous fixes to maintainers.rstDan Handley2017-12-061-9/+23
| | | | | | | | | | | | | * Update the RockChip sub-maintainer from rkchrome to rockchip-linux in maintainers.rst. * Add missing documentation files and change extensions from `md` to `rst`. * Add sub-maintainer for Socionext UniPhier platform. Change-Id: I7f498316acb0f7947c6432dbe14988e61a8903fe Co-Authored-By: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Dan Handley <dan.handley@arm.com>
* Merge pull request #1177 from sivadur/masterdavidcunado-arm2017-12-061-2/+2
|\ | | | | Update Xilinx maintainer details
| * Update Xilinx maintainer detailsSiva Durga Prasad Paladugu2017-11-301-2/+2
| | | | | | | | | | | | | | | | This patch updates Xilinx maintainers details as sorenb is no more the maintainer for xilinx and the email id is invalid now. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* | rpi3: Introduce AArch64 Raspberry Pi 3 portAntonio Nino Diaz2017-12-011-0/+10
|/ | | | | | | | | | | | | This port can be compiled to boot an AArch64 or AArch32 payload with the build option `RPI3_BL33_AARCH32`. Note: This is not a secure port of the Trusted Firmware. This port is only meant to be a reference implementation to experiment with an inexpensive board in real hardware. Change-Id: Ide58114299289bf765ef1366199eb05c46f81903 Co-authored-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* ARMv7 target is driven by ARM_ARCH_MAJOR==7Etienne Carriere2017-11-081-0/+6
| | | | | | | | | | | | | | | | | External build environment shall sets directive ARM_ARCH_MAJOR to 7 to specify a target ARMv7-A core. As ARM-TF expects AARCH to be set, ARM_ARCH_MAJOR==7 mandates AARCH=aarch32. The toolchain target architecture/cpu is delegated after the platform configuration is parsed. Platform shall define target core through ARM_CORTEX_A<x>=yes, <x> being 5, 7, 9, 12, 15 and/or 17. Platform can bypass ARM_CORTEX_A<x>=yes directive and provide straight the toolchain target directive through MARCH32_DIRECTIVE. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
* Convert documentation to reStructuredTextDouglas Raillard2017-06-291-0/+102
Due to recent issues in the rendering of the documentation on GitHub and some long-standing issues like the lack of automatic table of content in Markdown, the documentation has been converted to reStructuredText. Basic constructs looks pretty similar to Markdown. Automatically convert GitHub markdown documentation to reStructuredText using pandoc. Change-Id: If20b695acedc6d1b49c8d9fb64efd6b6ba23f4a9 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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