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* fdts: stm32mp1: add bsec nodeYann Gautier2019-03-113-17/+37
| | | | | | | | | | | | | This node is added in a new file stm32mp157c-security.dtsi. This node includes OTPs that should be shadowed and made readable to non secure world. Explicitly add status and secure-status, as these OTPs are accessible by secure and non-secure world. The stgen node is also moved to this file. Change-Id: I3c89a01588d2e411fecfc44997e1c5df2fc37cad Signed-off-by: Yann Gautier <yann.gautier@st.com>
* Merge pull request #1836 from Yann-lms/docs_and_m4Antonio Niño Díaz2019-02-222-0/+4
|\ | | | | Update documentation for STM32MP1 and add Cortex-M4 support
| * stm32mp1: add minimal support for co-processor Cortex-M4Yann Gautier2019-02-202-0/+4
| | | | | | | | | | | | | | | | | | | | STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4. The support for Cortex-M4 clocks is added when configuring the clock tree. Some minimal security features to allow communications between A7 and M4 are also added. Change-Id: I60417e244a476f60a2758f4969700b2684056665 Signed-off-by: Yann Gautier <yann.gautier@st.com>
* | plat/arm: Support for Cortex A5 in FVP Versatile Express platformUsama Arif2019-02-191-0/+144
| | | | | | | | | | | | | | | | | | Cortex A5 doesnt support VFP, Large Page addressing and generic timer which are addressed in this patch. The device tree for Cortex a5 is also included. Change-Id: I0722345721b145dfcc80bebd36a1afbdc44bb678 Signed-off-by: Usama Arif <usama.arif@arm.com>
* | plat/arm: Introduce FVP Versatile Express platform.Usama Arif2019-02-191-0/+76
|/ | | | | | | | | | | | | | This patch adds support for Versatile express FVP (Fast models). Versatile express is a family of platforms that are based on ARM v7. Currently this port has only been tested on Cortex A7, although it should work with other ARM V7 cores that support LPAE, generic timers, VFP and hardware divide. Future patches will support other cores like Cortex A5 that dont support features like LPAE and hardware divide. This platform is tested on and only expected to work on single core models. Change-Id: I10893af65b8bb64da7b3bd851cab8231718e61dd Signed-off-by: Usama Arif <usama.arif@arm.com>
* stm32mp1: introduce STM32MP1 discovery boardsYann Gautier2019-02-144-0/+503
| | | | | | | Add the device tree files to support the 2 discovery boards: DK1 & DK2. Change-Id: I90b4797dc69bd0aab1b643a72c932ead48a03c1f Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: update I2C and PMIC driversYann Gautier2019-02-141-1/+1
| | | | | | | | | | | | | | | | | Regulator configuration at boot takes more information from DT. I2C configuration from DT is done in I2C driver. I2C driver manages more transfer modes. The min voltage of buck1 should also be increased to 1.2V, else the platform does not boot. Heavily modifies stm32_i2c.c since many functions move inside the source file to remove redundant declarations. Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
* stm32mp1: update device tree filesYann Gautier2019-01-187-133/+381
| | | | | | | | The drivers are also updated to reflect the changes. Set RCC as non-secure. Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: rename stpmu1 to stpmic1Yann Gautier2019-01-181-3/+3
| | | | | | | | This is the correct name of the IP. Rename stm32mp1_pmic files to stm32mp_pmic. Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f Signed-off-by: Yann Gautier <yann.gautier@st.com>
* stm32mp1: Add device tree filesYann Gautier2018-07-247-0/+1125
| | | | | | | | Those device tree files are taken from STM32MP1 U-Boot and Linux. And they are updated to fit TF-A needs. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
* Dynamic_config: remove the FVP dtb filesSoby Mathew2018-05-218-0/+0
| | | | | | | | | Since FVP enables dynamic configuration by default, the DT blobs are compiled from source and included in FIP during build. Hence this patch removes the dtb files from the `fdts` folder. Change-Id: Ic155ecd257384a33eb2aa38c9b4430e47b09cd31 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Remove dtc warningsRoberto Vargas2018-04-244-41/+41
| | | | | | | | | DTC generates warnings when unit names begin with 0, or when a node containing a reg or range property doesn't have a unit name in the node name. This patch fixes those cases. Change-Id: If24ec68ef3034fb3fcefb96c5625c47a0bbd8474 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
* fdts: Add DTS for DynamIQ platformsJeenu Viswambharan2018-02-282-0/+41
| | | | | | | | DynamIQ platforms host all CPUs in a single cluster. This patch adds a DTS and DTB for DynamicQ platforms hosting up to 8 CPUs. Change-Id: I2d97bc740ac3062818767e7251020644f5bb9100 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* FVP: Fix AArch32 dts for `interrupts` nodeSoby Mathew2018-02-263-2/+254
| | | | | | | | | | | | The commit 8d2c497 changed the interrupt map in `rtsm_ve-motherboard.dtsi` for the Linux FDT sources to be compatible for FreeBSD. But this also introduced a regression for FVP AArch32 mode but was undetected till now because the corresponding DTB was not updated. This patch creates a new `rtsm_ve-motherboard-aarch32.dtsi` which reverts the change and is now included by the AArch32 DTS files. Change-Id: Ibefbbf43a91c8fb890f0fa7a22be91f0227dad34 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Add Linux DTS for FVP with threaded CPUsJeenu Viswambharan2017-08-014-262/+310
| | | | | | | | | | | | | | In contrast with the non-multi-threading DTS, this enumerates MPIDR values shifted by one affinity level to the left. The newly added DTS reflects CPUs with a single thread in them. Since both DTS files are the same apart from MPIDR contents, the common bits have been moved to a separate file that's then included from the top-level DTS files. The multi-threading version only updates the MPIDR contents. Change-Id: Id225cd93574f764171df8962ac76f42fcb6bba4b Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
* Device tree changes to boot FreeBSD on FVPsAchin Gupta2017-06-0112-419/+41
| | | | | | | | | | | | | | FreeBSD does not understand #interrupt-map in a device tree. This prevents the GIC from being set up correctly. This patch removes the #interrupt-map in the device trees for the Base and Foundation FVPs. This enables correct boot of FreeBSD on these platforms. These changes have been tested with FreeBSD and an Ubuntu cloud image (ubuntu-16.04-server-cloudimg-arm64-uefi1.img) to ensure compatibility with Linux. Change-Id: I1347acdcf994ec4b1dd843ba32af9951aa54db73 Signed-off-by: Achin Gupta <achin.gupta@arm.com>
* Fix incorrect copyright noticesAntonio Nino Diaz2016-12-142-2/+2
| | | | | | | | Some files have incorrect copyright notices, this patch fixes all files with deviations from the standard notice. Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Merge pull request #727 from soby-mathew/sm/PSCI_lib_docdanh-arm2016-10-124-0/+671
|\ | | | | AArch32: Update user-guide and add DTBs
| * AArch32: Update user-guide and add DTBsSoby Mathew2016-10-114-0/+671
| | | | | | | | | | | | | | | | | | | | This patch adds necessary updates for building and running Trusted Firmware for AArch32 to user-guide.md. The instructions for running on both `FVP_Base_AEMv8A-AEMv8A` in AArch32 mode and `FVP_Base_Cortex-A32x4` models are added. The device tree files for AArch32 Linux kernel are also added in the `fdts` folder. Change-Id: I0023b6b03e05f32637cb5765fdeda8c8df2d0d3e
* | Fix GICv3 DT to include psci system off/resetSoby Mathew2016-10-116-463/+6
|/ | | | | | | | | | | | | | The `fvp-base-gicv3-psci` and `fvp-foundation-gicv3-psci` device tree source files did not have psci node entries for `system off` and `system reset`. Also the DTS files included `rtsm_ve-motherboard-no_psci.dtsi` instead of `rtsm_ve-motherboard.dtsi`. As a result, the Linux kernel failed to invoke the PSCI_SYSTEM_OFF/RESET API when being shutdown/reset. This patch corrects this problem and also updates the corresponding DTB files. This patch also removes `rtsm_ve-motherboard-no_psci.dtsi` and `fvp-foundation-motherboard-no_psci.dtsi` files as they are no longer used. Change-Id: I8ba61a1323035f7508cae663bb490ac0e8a64618
* Remove support for legacy VE memory map in FVPSoby Mathew2016-04-274-588/+0
| | | | | | | | This patch removes support for legacy Versatile Express memory map for the GIC peripheral in the FVP platform. The user guide is also updated for the same. Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533
* Add cache topology info to FVP DTBsAntonio Nino Diaz2016-03-0312-6/+66
| | | | | | | | | | | | | | | | From version 4.0 onwards, the ARM64 Linux kernel expects the device tree to indicate the cache hierarchy. Failing to provide this information results in the following warning message to be printed by the kernel: `Unable to detect cache hierarchy from DT for CPU x` All the FVP device trees provided in the TF source tree have been modified to add this information. Fixes ARM-software/tf-issues#325 Change-Id: I0ff888992e602b81a0fe1744a86151d625727511
* FVP: update device tree idle state entriesJuan Castillo2015-04-2912-14/+26
| | | | | | | | | | | Device tree idle state bindings changed in kernel v3.18. This patch updates the FVP DT files to use PSCI suspend as idle state. The patch also updates the 'compatible' property in the PSCI node and the 'entry-method' property in the idle-states node in the FVP Foundation GICv2-legacy device tree. Change-Id: Ie921d497c579f425c03d482f9d7b90e166106e2f
* Increment the PSCI VERSION to 1.0Soby Mathew2015-01-2612-6/+6
| | | | | | | | | | | | | | | | | | This patch: * Bumps the PSCI VERSION to 1.0. This means that the PSCI_VERSION API will now return the value 0x00010000 to indicate the version as 1.0. The firmware remains compatible with PSCI v0.2 clients. * The firmware design guide is updated to document the APIs supported by the Trusted Firmware generic code. * The FVP Device Tree Sources (dts) and Blobs(dtb) are also updated to add "psci-1.0" and "psci-0.2" to the list of compatible PSCI versions. Change-Id: Iafc2f549c92651dcd65d7e24a8aae35790d00f8a
* FVP: Update device trees to match cpuidle driverAchin Gupta2014-08-2012-36/+369
| | | | | | | | This patch updates the representation of idle tables and cpu/cluster topology in the device tree source files for the FVP to what the latest cpuidle driver in Linux expects. The device tree binaries have also been updated. Change-Id: If0668b96234f65aa0435fba52f288c9378bd8824
* Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo2014-08-1914-28/+521
| | | | | | | | | | | | | | | | | | | | | | This patch adds support for SYSTEM_OFF and SYSTEM_RESET PSCI operations. A platform should export handlers to complete the requested operation. The FVP port exports fvp_system_off() and fvp_system_reset() as an example. If the SPD provides a power management hook for system off and system reset, then the SPD is notified about the corresponding operation so it can do some bookkeeping. The TSPD exports tspd_system_off() and tspd_system_reset() for that purpose. Versatile Express shutdown and reset methods have been removed from the FDT as new PSCI sys_poweroff and sys_reset services have been added. For those kernels that do not support yet these PSCI services (i.e. GICv3 kernel), the original dtsi files have been renamed to *-no_psci.dtsi. Fixes ARM-software/tf-issues#218 Change-Id: Ic8a3bf801db979099ab7029162af041c4e8330c8
* Reserve some DDR DRAM for secure use on FVP platformsJuan Castillo2014-05-2212-6/+6
| | | | | | | | | | | | | | | | | | | | TZC-400 is configured to set the last 16MB of DRAM1 as secure memory and the rest of DRAM as non-secure. Non-secure software must not attempt to access the 16MB secure area. Device tree files (sources and binaries) have been updated to match this configuration, removing that memory from the Linux physical memory map. To use UEFI and Linux with this patch, the latest version of UEFI and the updated device tree files are required. Check the user guide in the documentation for more details. Replaced magic numbers with #define for memory region definition in the platform security initialization function. Fixes ARM-software/tf-issues#149 Change-Id: Ia5d070244aae6c5288ea0e6c8e89d92859522bfe
* Enable secure memory support for FVPsHarry Liebel2014-04-2412-27/+27
| | | | | | | | | | | | | | | | - Use the TrustZone controller on Base FVP to program DRAM access permissions. By default no access to DRAM is allowed if 'secure memory' is enabled on the Base FVP. - The Foundation FVP does not have a TrustZone controller but instead has fixed access permissions. - Update FDTs for Linux to use timers at the correct security level. - Starting the FVPs with 'secure memory' disabled is also supported. Limitations: Virtio currently uses a reserved NSAID. This will be corrected in future FVP releases. Change-Id: I0b6c003a7b5982267815f62bcf6eb82aa4c50a31
* Update year in copyright text to 2014Dan Handley2014-01-178-8/+8
| | | | Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
* Enable third party contributionsDan Handley2013-12-058-8/+8
| | | | | | | | - Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
* Increase default amount of RAM for Base FVPs in FDTsHarry Liebel2013-11-276-9/+3
| | | | | | | - Large RAM-disks may have trouble starting with 2GB of memory. - Increase from 2GB to 4GB in FDT. Change-Id: I12c1b8e5db41114b88c69c48621cb21247a6a6a7
* Add GICv3 ITS to FDTsHarry Liebel2013-11-144-91/+109
| | | | | | - The interrupt addresses need to be updated to work. Change-Id: Icdd00177095ae9e4eb7b13718762f92e29b1465c
* FDTs for v5.2 Foundation modelHarry Liebel2013-11-147-0/+800
| | | | | | | | | | | | | | | | | | | | | - The Foundation FVP is a cut down version of the Base FVP and as such lacks some components. - Three FDTs are provided. fvp-foundation-gicv2legacy-psci: Use this when setting the Foundation FVP to use GICv2. In this mode the GIC is located at the VE location, as described in the VE platform memory map. fvp-foundation-gicv3-psci : Use this when setting the Foundation FVP to use GICv3. In this mode the GIC is located at the Base location, as described in the Base platform memory map. fvp-foundation-gicv2-psci : Use this when setting the Foundation FVP to use GICv3, but Linux is expected to use GICv2 emulation mode. In this mode the GIC is located at the Base location, but the GICv3 is used in GICv2 emulation mode. Change-Id: I9d69bcef35c64cc8f16550efe077f578e55aaae5
* ARMv8 Trusted Firmware release v0.2Achin Gupta2013-10-257-0/+1014
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