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* Introduce fdtw_read_array() helperAntonio Nino Diaz2018-11-021-1/+39
| | | | | | | | fdtw_read_cells() can only read one or two cells, sometimes it may be needed to read more cells from one property. Change-Id: Ie70dc76d1540cd6a04787cde7cccb4d1bafc7282 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Introduce new fdt helper to read string propertiesAntonio Nino Diaz2018-11-021-0/+33
| | | | | | | Introduced fdtw_read_string() to read string properties. Change-Id: I854eef0390632cf2eaddd2dce60cdb98c117de43 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Remove some MISRA defects in common codeAntonio Nino Diaz2018-10-043-53/+56
| | | | | | | No functional changes. Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Mark BL31 initialization functionsDaniel Boulby2018-10-031-1/+1
| | | | | | | | | Mark the initialization functions in BL31, such as context management, EHF, RAS and PSCI as __init so that they can be reclaimed by the platform when no longer needed Change-Id: I7446aeee3dde8950b0f410cb766b7a2312c20130 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* Remove build option LOAD_IMAGE_V2Roberto Vargas2018-09-281-294/+1
| | | | | | | | The code of LOAD_IMAGE_V2=0 has been removed. Change-Id: Iea03e5bebb90c66889bdb23f85c07d0c9717fffe Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Allow setting log level back to compile time valueJunhan Zhou2018-09-111-2/+2
| | | | | | | | | | | | | | When using the tf_log_set_max_level() function, one can dynamically set the log level to a value smaller than then compile time specified one, but not equal. This means that when the log level have been lowered, it can't be reset to the previous value. This commit modifies this function to allow setting the log level back to the compile time value. Fixes ARM-software/tf-issues#624 Change-Id: Ib157715c8835982ce4977ba67a48e18ff23d5a61 Signed-off-by: Junhan Zhou <Junhan@mellanox.com>
* Merge pull request #1549 from danielboulby-arm/db/pointerDimitris Papastamos2018-08-311-1/+1
|\ | | | | Remove rt_svc_descs pointer from global scope
| * Remove rt_svc_descs pointer from global scopeDaniel Boulby2018-08-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | A pointer to rt_svc_desc_t is defined both in the function handle_runtime_svc() and globally. Since the value of the pointer RT_SVC_DESCS_START is defined by the linker and never changes make this definition local in both handle_runtime_svc() and runtime_svc_init() to reduce the number of loads Change-Id: Iea42c778d8599a26c87700009163b5a8d7d60be2 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* | Fix MISRA defects in log helpersAntonio Nino Diaz2018-08-301-8/+9
| | | | | | | | | | | | | | No functional changes. Change-Id: I850f08718abb69d5d58856b0e3de036266d8c2f4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | backtrace: Introduce backtrace functionDouglas Raillard2018-08-301-0/+256
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function diplays the backtrace, the current EL and security state to allow a post-processing tool to choose the right binary to interpret the dump. The output can be fed to GNU addr2line to resolve function names given an ELF binary compiled with debug information. The "-i" flag is recommended to improve display in case of inlined functions. The *.dump files generated during the build process can also be used. The function works in AArch64 and AArch32. In AArch32 it only works in A32 mode (without T32 interworking), which is enforced in the Makefile. Sample output of a backtrace at EL3: BACKTRACE: START: function_name 0: EL3: 0x798 1: EL3: 0x538 2: EL3: 0x550 3: EL3: 0x55c 4: EL3: 0x568 5: EL3: 0x5a8 6: EL3: 0xf4 BACKTRACE: END: function_name In order to enable it the new option ENABLE_BACKTRACE must be set to 1. This option is set to 1 by default only in AArch64 debug builds. As usual, it can be overridden by the platform makefile and in the build command line. Change-Id: Icaff39b0e5188329728be2f3c72b868b2368e794 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
* libc: Move tf_printf and tf_snprintf to libcAntonio Nino Diaz2018-08-223-322/+4
| | | | | | | | | Change their names to printf and snprintf. They are much smaller than the previous versions we had, which makes them better suited for the Trusted Firmware. Change-Id: Ia872af91b7b967c47fce012eccecede7873a3daf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* tf_printf: Return number of printed charactersAntonio Nino Diaz2018-08-221-16/+38
| | | | | | | | The C standard says that printf() has to return the number of characters it has printed. Change-Id: I0ef50b1d6766d140724ac0a2fa2c5d023431f984 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* tf_snprintf: Add support for '%s'Antonio Nino Diaz2018-08-101-0/+17
| | | | | Change-Id: Ia3a159444e638f63de7dc5a6a4b76169c757188a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Add end_vector_entry assembler macroRoberto Vargas2018-07-111-16/+16
| | | | | | | | | | | | | | Check_vector_size checks if the size of the vector fits in the size reserved for it. This check creates problems in the Clang assembler. A new macro, end_vector_entry, is added and check_vector_size is deprecated. This new macro fills the current exception vector until the next exception vector. If the size of the current vector is bigger than 32 instructions then it gives an error. Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
* Fix MISRA Rule 5.3 Part 2Daniel Boulby2018-06-121-6/+6
| | | | | | | | | | | | | | Use a _ prefix for Macro arguments to prevent that argument from hiding variables of the same name in the outer scope Rule 5.3: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope Fixed For: make LOG_LEVEL=50 PLAT=fvp Change-Id: I67b6b05cbad4aeca65ce52981b4679b340604708 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* Fix MISRA Rule 5.3 Part 1Daniel Boulby2018-06-121-1/+1
| | | | | | | | | | | | | | | | Conflict with function name and variable name within that function. Change the name of the function from image_size to get_image_size to remove conflict and make the function fit the normal project naming convention. Rule 5.3: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope Fixed For: make LOG_LEVEL=50 PLAT=fvp Change-Id: I1a63d2730113e2741fffa79730459c584b0224d7 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* Revert "Code change to fix small bugs"Dimitris Papastamos2018-06-081-0/+1
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* Remove rt_svc_descs pointer from inner scopeDaniel Boulby2018-05-251-1/+0
| | | | | | | | | | | A pointer to rt_svc_desc_t was defined both in the function and globally. The innermost definition hid the global definition which is the one we want to use so remove the innermost definition to prevent this Change-Id: Idabdbc0947178ae83224bd17a9b170df7c278d51 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
* Allow disabling authentication dynamicallySoby Mathew2018-05-181-20/+53
| | | | | | | | | | This patch allows platforms to dynamically disable authentication of images during cold boot. This capability is controlled via the DYN_DISABLE_AUTH build flag and is only meant for development purposes. Change-Id: Ia3df8f898824319bb76d5cc855b5ad6c3d227260 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Add support for the SMC Calling Convention 2.0Antonio Nino Diaz2018-04-231-10/+25
| | | | | | | | | | | | | | | | | Due to differences in the bitfields of the SMC IDs, it is not possible to support SMCCC 1.X and 2.0 at the same time. The behaviour of `SMCCC_MAJOR_VERSION` has changed. Now, it is a build option that specifies the major version of the SMCCC that the Trusted Firmware supports. The only two allowed values are 1 and 2, and it defaults to 1. The value of `SMCCC_MINOR_VERSION` is derived from it. Note: Support for SMCCC v2.0 is an experimental feature to enable prototyping of secure partition specifications. Support for this convention is disabled by default and could be removed without notice. Change-Id: I88abf9ccf08e9c66a13ce55c890edea54d9f16a7 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Clean usage of void pointers to access symbolsJoel Hutton2018-03-271-3/+1
| | | | | | | | | | | Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type. Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
* Dynamic cfg: Do not populate args if already initializedAmit Daniel Kachhap2018-03-051-5/+14
| | | | | | | | | | | | | This patch modifies the common utility function `populate_next_bl_params_config()` to only modify the entrypoint arguments to an executable image only if they are not initialized earlier. This issue was detected while testing Optee on ARM platforms which needed the current arguments to be preserved in the absence of corresponding config files. Change-Id: I1e3fb4be8176fc173959e72442396dd33a99a316 Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: David Cunado <david.cunado@arm.com>
* Fix MISRA rule 8.5 Part 1Roberto Vargas2018-02-281-3/+1
| | | | | | | | | | | Rule 8.5: An external object or function shall be declared once in one and only one file. Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all Change-Id: I2420c58134c280db90706cad2d5e7a190f9f9311 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
* Dynamic cfg: MISRA fixesSoby Mathew2018-02-262-15/+15
| | | | | Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* ARM Platforms: Load HW_CONFIG in BL2Soby Mathew2018-02-261-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds the necessary changes to load HW_CONFIG in BL2 for ARM Platforms : 1. The load address of HW_CONFIG is specified via the `hw_config_addr` property in TB_FW_CONFIG is loaded by BL1. The `hw_config_max_size` property defines the maximum size to be expected for the HW_CONFIG. The `arm_dyn_cfg_helpers.c` and corresponding header implements utility functions to parse these DT properties defined. The `arm_dyn_cfg.c` implements wrappers to these helpers to enable them to be invoked from ARM platform layer. 2. `HW_CONFIG` is added to the `bl2_mem_params_descs[]` array which is the list of images to be loaded by BL2. 3. The `libfdt` sources are now included when BL2 is built 4. A new helper `populate_next_bl_params_config()` is introduced in desc_image_load.c to populate the subsequent executable BL images with the `hw_config` and the corresponding `fw_config` if available. The `plat_get_next_bl_params()` API for ARM platforms is modified to invoke this new helper. 5. The implementation of `bl2_early_platform_setup2()` is modified to consider `arg0` as well in addition to `arg1` passed from BL1. 6. Bump up the BL2 size for Juno to accommodate the inclusion of libfdt. Change-Id: I80f1554adec41753e0d179a5237364f04fe13a3f Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Dynamic cfg: Introduce fdt wrappersSoby Mathew2018-02-261-0/+96
| | | | | | Change-Id: I9b1cdaf2430a1998a69aa366ea1461224a3d43dc Co-Authoured-by: Jeenu Viswambharan <Jeenu.Viswambharan@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* image_decompress: add APIs for decompressing imagesMasahiro Yamada2018-02-021-0/+79
| | | | | | | | | | | | | | | | | | These APIs are used by platforms that need to decompress images. image_decompress_init(): This registers a temporary buffer and a decompressor callback. This should be called from platform init code. image_decompress_prepare(): This should be called before each compressed image is loaded. The best location to call this will be bl*_plat_handle_pre_image_load(). image_decompress(): This should be called after each compressed image is loaded. The best location to call this will be bl*_plat_handle_post_image_load(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Add support to left-pad with zeroes in tf_printfAntonio Nino Diaz2017-12-151-7/+36
| | | | | | | | Add support to formats %i, %d, %p, %x and %u for left-padding numbers with zeroes (e.g. `%08x`). Change-Id: Ifd4795a82a8d83da2c00b44b9e482a2d9be797e3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Unify cache flush code path after image loadSoby Mathew2017-12-051-17/+7
| | | | | | | | | | Previously the cache flush happened in 2 different places in code depending on whether TRUSTED_BOARD_BOOT is enabled or not. This patch unifies this code path for both the cases. The `load_image()` function is now made an internal static function. Change-Id: I96a1da29d29236bbc34b1c95053e6a9a7fc98a54 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* ARMv7 may not support Virtualization ExtensionsEtienne Carriere2017-11-081-0/+16
| | | | | | | | | | | | | | | | | | | | | ARMv7-A Virtualization extensions brings new instructions and resources that were supported by later architectures. Reference ARM ARM Issue C.c [DDI0406C_C]. ERET and extended MSR/MRS instructions, as specified in [DDI0406C_C] in ID_PFR1 description of bits[15:12] (Virtualization Extensions): A value of 0b0001 implies implementation of the HVC, ERET, MRS (Banked register), and MSR (Banked register) instructions. The ID_ISARs do not identify whether these instructions are implemented. UDIV/SDIV were introduced with the Virtualization extensions, even if not strictly related to the virtualization extensions. If ARMv7 based platform does not set ARM_CORTEX_Ax=yes, platform shall define ARMV7_SUPPORTS_VIRTUALIZATION to enable virtualization extension related resources. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
* Merge pull request #1153 from robertovargas-arm/fix-macrosdavidcunado-arm2017-11-061-0/+1
|\ | | | | Avoid use of undefined macros
| * Include debug.h in debug.SRoberto Vargas2017-11-011-0/+1
| | | | | | | | | | | | | | | | | | debug.S was using macros defined in debug.h, but since it didn't include it, these macros were taking the value 0, which means that all the preprocessor conditionals were wrong. Change-Id: If4ca81cc5a1662991589f914a2557ceff0eaaede Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
* | Add platform hooks for boot redundancy supportRoberto Vargas2017-10-241-3/+15
|/ | | | | | | | | | These hooks are intended to allow one platform to try load images from alternative places. There is a hook to initialize the sequence of boot locations and a hook to pass to the next sequence. Change-Id: Ia0f84c415208dc4fa4f9d060d58476db23efa5b2 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
* Implement log frameworkSoby Mathew2017-09-111-0/+61
| | | | | | | | | | | | | | | | | | | | This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run time using the tf_log_set_max_level() function. The default prefix string can be defined by platform by overriding the `plat_log_get_prefix()` platform API which is also introduced in this patch. The new log framework results in saving of some RO data. For example, when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted in saving 384 bytes of RO data and increase of 8 bytes of RW data. The framework also adds about 108 bytes of code to the release build of FVP. Fixes ARM-software/tf-issues#462 Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554 Co-authored-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Introduce tf_vprintf() and tf_string_print()Soby Mathew2017-09-111-9/+16
| | | | | | | | | This patch introduces tf_vprintf() and tf_string_print() APIs which is needed by the logging framework introduced in a later patch. Change-Id: Ie4240443d0e04e070502b51e371e546dd469fd33 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
* Fix x30 reporting for unhandled exceptionsJulius Werner2017-08-212-3/+3
| | | | | | | | | | | | | Some error paths that lead to a crash dump will overwrite the value in the x30 register by calling functions with the no_ret macro, which resolves to a BL instruction. This is not very useful and not what the reader would expect, since a crash dump should usually show all registers in the state they were in when the exception happened. This patch replaces the offending function calls with a B instruction to preserve the value in x30. Change-Id: I2a3636f2943f79bab0cd911f89d070012e697c2a Signed-off-by: Julius Werner <jwerner@chromium.org>
* Tegra: enable 'signed-comparison' compilation warning/errorsVarun Wadekar2017-06-141-4/+6
| | | | | | | | This patch enables the 'sign-compare' flag, to enable warning/errors for comparisons between signed/unsigned variables. The warning has been enabled for all the Tegra platforms, to start with. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
* Introduce `tf_snprintf`Antonio Nino Diaz2017-05-241-0/+108
| | | | | | | | | | This is a reduced version of `snprintf` that only supports formats '%d', '%i' and '%u'. It can be used when the full `snprintf` is not needed in order to save memory. If it finds an unknown format specifier, it prints an error message and panics. Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Align tf_printf implementation between AArch32 and AArch64dp-arm2017-05-151-80/+0
| | | | | | | | No need for these wrapper functions anymore. The compiler-rt builtins provide runtime support for 64-bit division and modulo operations. Change-Id: Ib785d37c86f0c82ebd34c35023a4c1822c03e7df Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
* Merge pull request #925 from dp-arm/dp/spdxdavidcunado-arm2017-05-047-175/+7
|\ | | | | Use SPDX license identifiers
| * Use SPDX license identifiersdp-arm2017-05-037-175/+7
| | | | | | | | | | | | | | | | | | | | | | | | To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
* | Update terminology: standard SMC to yielding SMCDavid Cunado2017-04-261-3/+4
|/ | | | | | | | | | | | | | | | Since Issue B (November 2016) of the SMC Calling Convention document standard SMC calls are renamed to yielding SMC calls to help avoid confusion with the standard service SMC range, which remains unchanged. http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf This patch adds a new define for yielding SMC call type and deprecates the current standard SMC call type. The tsp is migrated to use this new terminology and, additionally, the documentation and code comments are updated to use this new terminology. Change-Id: I0d7cc0224667ee6c050af976745f18c55906a793 Signed-off-by: David Cunado <david.cunado@arm.com>
* Merge pull request #911 from danh-arm/dh/refactor-bl2-image-loaddavidcunado-arm2017-04-241-8/+4
|\ | | | | Minor refactor of BL2 image load v2
| * Minor refactor of BL2 image load v2Dan Handley2017-04-191-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, get_next_bl_params_from_mem_params_desc() populated arg0 in the EL3 runtime entrypoint with a bl_params_t pointer. This is the responsibility of the generic LOAD_IMAGE_V2 framework instead of the descriptor-based image loading utility functions. Therefore this patch moves that code to bl2_load_images(). Also, this patch moves the code that flushes the bl_params structure to flush_bl_params_desc(), together with the other descriptor-based image loading flushing code. Change-Id: I4541e3f50e3878dde7cf89e9e8f31fe0b173fb9d Signed-off-by: Dan Handley <dan.handley@arm.com>
* | Remove build option `ASM_ASSERTION`Antonio Nino Diaz2017-04-202-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The build option `ENABLE_ASSERTIONS` should be used instead. That way both C and ASM assertions can be enabled or disabled together. All occurrences of `ASM_ASSERTION` in common code and ARM platforms have been replaced by `ENABLE_ASSERTIONS`. ASM_ASSERTION has been removed from the user guide. Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* | Add `ENABLE_ASSERTIONS` build optionAntonio Nino Diaz2017-04-192-0/+12
|/ | | | | | | | | | | | | | | | | | Add the new build option `ENABLE_ASSERTIONS` that controls whether or not assert functions are compiled out. It defaults to 1 for debug builds and to 0 for release builds. Additionally, a following patch will be done to allow this build option to hide auxiliary code used for the checks done in an `assert()`. This code is is currently under the DEBUG build flag. Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO, which is the default for debug builds. This patch also updates the User Guide. Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Remove dead loops in assert() in C and ASMAntonio Nino Diaz2017-03-312-2/+2
| | | | | | | | The desired behaviour is to call `plat_panic_handler()`, and to use `no_ret` to do so from ASM. Change-Id: I88b2feefa6e6c8f9bf057fd51ee0d2e9fb551e4f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Add and use plat_crash_console_flush() APIAntonio Nino Diaz2017-03-312-2/+11
| | | | | | | | | | This API makes sure that all the characters sent to the crash console are output before returning from it. Porting guide updated. Change-Id: I1785f970a40f6aacfbe592b6a911b1f249bb2735 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Simplify translation tables headers dependenciesAntonio Nino Diaz2017-03-081-1/+1
| | | | | | | | | The files affected by this patch don't really depend on `xlat_tables.h`. By changing the included file it becomes easier to switch between the two versions of the translation tables library. Change-Id: Idae9171c490e0865cb55883b19eaf942457c4ccc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
* Introduce unified API to zero memoryDouglas Raillard2017-02-061-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce zeromem_dczva function on AArch64 that can handle unaligned addresses and make use of DC ZVA instruction to zero a whole block at a time. This zeroing takes place directly in the cache to speed it up without doing external memory access. Remove the zeromem16 function on AArch64 and replace it with an alias to zeromem. This zeromem16 function is now deprecated. Remove the 16-bytes alignment constraint on __BSS_START__ in firmware-design.md as it is now not mandatory anymore (it used to comply with zeromem16 requirements). Change the 16-bytes alignment constraints in SP min's linker script to a 8-bytes alignment constraint as the AArch32 zeromem implementation is now more efficient on 8-bytes aligned addresses. Introduce zero_normalmem and zeromem helpers in platform agnostic header that are implemented this way: * AArch32: * zero_normalmem: zero using usual data access * zeromem: alias for zero_normalmem * AArch64: * zero_normalmem: zero normal memory using DC ZVA instruction (needs MMU enabled) * zeromem: zero using usual data access Usage guidelines: in most cases, zero_normalmem should be preferred. There are 2 scenarios where zeromem (or memset) must be used instead: * Code that must run with MMU disabled (which means all memory is considered device memory for data accesses). * Code that fills device memory with null bytes. Optionally, the following rule can be applied if performance is important: * Code zeroing small areas (few bytes) that are not secrets should use memset to take advantage of compiler optimizations. Note: Code zeroing security-related critical information should use zero_normalmem/zeromem instead of memset to avoid removal by compilers' optimizations in some cases or misbehaving versions of GCC. Fixes ARM-software/tf-issues#408 Change-Id: Iafd9663fc1070413c3e1904e54091cf60effaa82 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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