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* Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1danh-arm2015-06-241-127/+41
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| * Introduce PROGRAMMABLE_RESET_ADDRESS build optionSandrine Bailleux2015-06-041-1/+7
| * Rationalize reset handling codeSandrine Bailleux2015-06-041-128/+36
* | Fix handling of spurious interrupts in BL3_1Achin Gupta2015-05-131-20/+29
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* Add support to indicate size and end of assembly functionsKévin Petit2015-04-085-0/+20
* Initialise cpu ops after enabling data cacheVikram Kanigiri2015-03-132-6/+4
* Call reset handlers upon BL3-1 entry.Yatharth Kochar2015-01-261-6/+12
* Remove coherent memory from the BL memory mapsSoby Mathew2015-01-221-0/+2
* Miscellaneous documentation fixesSandrine Bailleux2014-08-273-10/+6
* Add CPU specific crash reporting handlersSoby Mathew2014-08-201-18/+3
* Add CPU specific power management operationsSoby Mathew2014-08-201-0/+6
* Introduce framework for CPU specific operationsSoby Mathew2014-08-201-1/+1
* Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta2014-08-153-12/+16
* Merge pull request #179 from jcastillo-arm/jc/tf-issues/219danh-arm2014-08-041-10/+0
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| * Call platform_is_primary_cpu() only from reset handlerJuan Castillo2014-08-011-10/+0
* | Optimize EL3 register state stored in cpu_context structureSoby Mathew2014-07-311-39/+0
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* Merge pull request #172 from soby-mathew/sm/asm_assertdanh-arm2014-07-283-276/+336
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| * Add CPUECTLR_EL1 and Snoop Control register to crash reportingSoby Mathew2014-07-281-0/+22
| * Rework the crash reporting in BL3-1 to use less stackSoby Mathew2014-07-283-276/+314
* | Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta2014-07-282-17/+17
* | Remove coherent stack usage from the warm boot pathAchin Gupta2014-07-192-40/+8
* | Remove coherent stack usage from the cold boot pathAchin Gupta2014-07-191-11/+6
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* Allow FP register context to be optional at build timeJuan Castillo2014-07-101-0/+2
* Merge pull request #151 from vikramkanigiri/vk/t133-code-readabilityAndrew Thoelke2014-06-271-0/+4
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| * Simplify entry point information generation code on FVPVikram Kanigiri2014-06-241-0/+4
* | Initialise CPU contexts from entry_point_infoAndrew Thoelke2014-06-232-44/+6
* | Remove early_exceptions from BL3-1Andrew Thoelke2014-06-171-3/+5
* | Per-cpu data cache restructuringAndrew Thoelke2014-06-163-12/+119
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* Merge pull request #133 from athoelke/at/crash-reporting-optdanh-arm2014-06-161-2/+9
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| * Make the BL3-1 crash reporting optionalAndrew Thoelke2014-06-111-2/+9
* | Include 'platform_def.h' header file in 'crash_reporting.S'Sandrine Bailleux2014-06-051-0/+1
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* Fix compilation issue for IMF_READ_INTERRUPT_ID build flagSoby Mathew2014-05-291-1/+2
* Pass 'cookie' parameter to interrupt handler in BL3-1Soby Mathew2014-05-291-0/+3
* Further renames of platform porting functionsDan Handley2014-05-271-2/+2
* Split platform.h into separate headersDan Handley2014-05-231-1/+1
* Introduce interrupt handling framework in BL3-1Achin Gupta2014-05-222-7/+109
* Add support for BL3-1 as a reset vectorVikram Kanigiri2014-05-221-9/+31
* Populate BL31 input parameters as per new specVikram Kanigiri2014-05-221-5/+5
* Rework handover interface between BL stagesVikram Kanigiri2014-05-221-13/+4
* Merge pull request #78 from jeenuv:tf-issues-148Andrew Thoelke2014-05-191-2/+12
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| * Add build configuration for timer save/restoreJeenu Viswambharan2014-05-161-2/+12
* | Rework BL3-1 unhandled exception handling and reportingSoby Mathew2014-05-162-76/+317
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* Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu...danh-arm2014-05-082-17/+34
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| * Preserve x19-x29 across world switch for exception handlingSoby Mathew2014-05-082-17/+34
* | Merge pull request #62 from athoelke/set-little-endian-v2danh-arm2014-05-081-2/+1
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| * | Set processor endianness immediately after RESETAndrew Thoelke2014-05-071-2/+1
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* | Access system registers directly in assemblerAndrew Thoelke2014-05-071-4/+3
* | Correct usage of data and instruction barriersAndrew Thoelke2014-05-071-1/+0
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* Reduce deep nesting of header filesDan Handley2014-05-064-7/+10
* Make use of user/system includes more consistentDan Handley2014-05-062-3/+3
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