aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
| | | * | | | | Merge "xlat_tables_v2: simplify end address checks in mmap_add_region_check()...Soby Mathew2020-01-241-3/+3
| | | |\ \ \ \ \
| | | | * | | | | xlat_tables_v2: simplify end address checks in mmap_add_region_check()Masahiro Yamada2020-01-221-3/+3
| | | * | | | | | Merge "Prevent speculative execution past ERET" into integrationSoby Mathew2020-01-2411-19/+28
| | | |\ \ \ \ \ \
| | | | * | | | | | Prevent speculative execution past ERETAnthony Steinhauser2020-01-2211-19/+28
| | | | | |_|_|/ / | | | | |/| | | |
| | | * | | | | | Merge "Xilinx zynqmp: add missing pin control group for ethernet 0." into int...Manish Pandey2020-01-241-1/+2
| | | |\ \ \ \ \ \ | | | | |_|_|_|/ / | | | |/| | | | |
| | | | * | | | | Xilinx zynqmp: add missing pin control group for ethernet 0.Norbert Werner2020-01-221-1/+2
| | | * | | | | | Merge changes from topic "bridge-en" into integrationManish Pandey2020-01-2328-719/+551
| | | |\ \ \ \ \ \
| | | | * | | | | | intel: Add function to check fpga readinessHadi Asyrafi2020-01-165-23/+28
| | | | * | | | | | intel: Add bridge control for FPGA reconfigHadi Asyrafi2020-01-163-0/+18
| | | | * | | | | | intel: FPGA config_isdone() status queryHadi Asyrafi2020-01-161-3/+8
| | | | * | | | | | intel: System Manager refactoringHadi Asyrafi2020-01-1616-410/+258
| | | | * | | | | | intel: Refactor reset manager driverHadi Asyrafi2020-01-1615-507/+268
| | | | * | | | | | intel: Enable bridge access in Intel platformHadi Asyrafi2020-01-1611-9/+175
| | | | * | | | | | intel: Modify non secure access functionHadi Asyrafi2020-01-165-2/+31
| | | * | | | | | | Merge "xilinx: versal: PLM to ATF handover" into integrationAlexei Fedorov2020-01-236-21/+47
| | | |\ \ \ \ \ \ \
| | | | * | | | | | | xilinx: versal: PLM to ATF handoverVenkatesh Yadav Abbarapu2020-01-236-21/+47
| | | * | | | | | | | Merge "xilinx: common: Move ATF handover to common file" into integrationAlexei Fedorov2020-01-235-22/+39
| | | |\| | | | | | | | | | | |_|_|_|_|/ / | | | |/| | | | | |
| | | | * | | | | | xilinx: common: Move ATF handover to common fileVenkatesh Yadav Abbarapu2020-01-235-22/+39
| | | * | | | | | | Merge "Revert "Changes necessary to support SEPARATE_NOBITS_REGION feature"" ...Mark Dykes2020-01-234-17/+10
| | | |\ \ \ \ \ \ \
| | | | * | | | | | | Revert "Changes necessary to support SEPARATE_NOBITS_REGION feature"Mark Dykes2020-01-224-17/+10
| | | * | | | | | | | Merge "Revert "plat/arm: Add support for SEPARATE_NOBITS_REGION"" into integr...Mark Dykes2020-01-233-40/+4
| | | |\ \ \ \ \ \ \ \
| | | | * | | | | | | | Revert "plat/arm: Add support for SEPARATE_NOBITS_REGION"Mark Dykes2020-01-233-40/+4
| | | |/ / / / / / / /
| | | * | | | | | | | Merge "Errata workarounds N1 1043202, 1315703 default off" into integrationAlexei Fedorov2020-01-231-2/+2
| | | |\ \ \ \ \ \ \ \
| | | | * | | | | | | | Errata workarounds N1 1043202, 1315703 default offlaurenw-arm2020-01-231-2/+2
| | | |/ / / / / / / /
| | | * | | | | | | | Merge "spm-mm: correcting instructions to build SPM for FVP" into integrationManish Pandey2020-01-231-2/+2
| | | |\ \ \ \ \ \ \ \ | | | | |_|/ / / / / / | | | |/| | | | | | |
| | | | * | | | | | | spm-mm: correcting instructions to build SPM for FVPManish Pandey2020-01-231-2/+2
| | | |/ / / / / / /
| | | * | | | | | | Merge "plat/arm: Add support for SEPARATE_NOBITS_REGION" into integrationMark Dykes2020-01-223-4/+40
| | | |\ \ \ \ \ \ \
| | | | * | | | | | | plat/arm: Add support for SEPARATE_NOBITS_REGIONMadhukar Pappireddy2020-01-213-4/+40
| | | | |/ / / / / /
| | | * | | | / / / Merge "Changes necessary to support SEPARATE_NOBITS_REGION feature" into inte...Mark Dykes2020-01-224-10/+17
| | | |\| | | | | | | | | | |_|_|/ / / | | | |/| | | | |
| | | | * | | | | Changes necessary to support SEPARATE_NOBITS_REGION featureMadhukar Pappireddy2020-01-214-10/+17
| | | |/ / / / /
| | | * | | | | Merge "FDT helper functions: Fix MISRA issues" into integrationSandrine Bailleux2020-01-221-6/+9
| | | |\ \ \ \ \
| | | | * | | | | FDT helper functions: Fix MISRA issuesAndre Przywara2020-01-221-6/+9
| | | | | |_|/ / | | | | |/| | |
| | | * | | | | Merge changes from topic "add-versal-soc-support" into integrationSoby Mathew2020-01-2227-87/+2394
| | | |\ \ \ \ \ | | | | |_|_|/ / | | | |/| | | |
| | | | * | | | plat: xilinx: Move pm_client.h to common directoryTejas Patel2020-01-152-30/+7
| | | | * | | | plat: xilinx: versal: Make silicon default build targetSiva Durga Prasad Paladugu2020-01-152-2/+2
| | | | * | | | xilinx: versal: Wire silicon default setupSiva Durga Prasad Paladugu2020-01-151-0/+6
| | | | * | | | versal: Increase OCM memory size for DEBUG buildsVenkatesh Yadav Abbarapu2020-01-151-1/+1
| | | | * | | | plat: xilinx: versal: Dont set IOU switch clockSiva Durga Prasad Paladugu2020-01-152-7/+0
| | | | * | | | arm64: versal: Adjust cpu clock for versal virtualSiva Durga Prasad Paladugu2020-01-151-1/+1
| | | | * | | | xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI callSaeed Nowshadi2020-01-154-0/+42
| | | | * | | | plat: versal: Add Get_ChipID APIRavi Patel2020-01-154-0/+28
| | | | * | | | plat: xilinx: versal: Add load Pdi API supportJolly Shah2020-01-154-0/+36
| | | | * | | | xilinx: versal: Add feature check APIRavi Patel2020-01-154-4/+88
| | | | * | | | xilinx: versal: Implement set wakeup source for clientTejas Patel2020-01-152-0/+118
| | | | * | | | plat: xilinx: versal: Add GET_CALLBACK_DATA functionRajan Vaja2020-01-153-0/+28
| | | | * | | | xilinx: versal: Add PSCI APIs for system shutdown & resetSaeed Nowshadi2020-01-154-1/+62
| | | | * | | | xilinx: versal: Add PSCI APIs for suspend/resumeTejas Patel2020-01-158-3/+175
| | | | * | | | xilinx: versal: Remove no_pmc ops to ON power domainTejas Patel2020-01-151-36/+15
| | | | * | | | xilinx: versal: Add set wakeup source APITejas Patel2020-01-154-0/+25
| | | | * | | | xilinx: versal: Add client wakeup APITejas Patel2020-01-152-0/+41