diff options
Diffstat (limited to 'plat')
-rw-r--r-- | plat/nvidia/tegra/common/tegra_pm.c | 10 | ||||
-rw-r--r-- | plat/nvidia/tegra/include/tegra_private.h | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t132/plat_setup.c | 8 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t186/plat_setup.c | 13 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_setup.c | 11 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_setup.c | 18 |
6 files changed, 60 insertions, 2 deletions
diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c index 1f59f30aa..5ec6f849e 100644 --- a/plat/nvidia/tegra/common/tegra_pm.c +++ b/plat/nvidia/tegra/common/tegra_pm.c @@ -259,7 +259,7 @@ int32_t tegra_validate_ns_entrypoint(uintptr_t entrypoint) /******************************************************************************* * Export the platform handlers to enable psci to invoke them ******************************************************************************/ -static const plat_psci_ops_t tegra_plat_psci_ops = { +static plat_psci_ops_t tegra_plat_psci_ops = { .cpu_standby = tegra_cpu_standby, .pwr_domain_on = tegra_pwr_domain_on, .pwr_domain_off = tegra_pwr_domain_off, @@ -296,6 +296,14 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, (void)tegra_soc_pwr_domain_on_finish(&target_state); /* + * Disable System Suspend if the platform does not + * support it + */ + if (!plat_supports_system_suspend()) { + tegra_plat_psci_ops.get_sys_suspend_power_state = NULL; + } + + /* * Initialize PSCI ops struct */ *psci_ops = &tegra_plat_psci_ops; diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h index c6ecc0e7b..ad3cee4b4 100644 --- a/plat/nvidia/tegra/include/tegra_private.h +++ b/plat/nvidia/tegra/include/tegra_private.h @@ -9,6 +9,7 @@ #define TEGRA_PRIVATE_H #include <platform_def.h> +#include <stdbool.h> #include <arch.h> #include <arch_helpers.h> @@ -78,6 +79,7 @@ plat_params_from_bl2_t *plat_get_bl31_plat_params(void); void plat_early_platform_setup(void); void plat_late_platform_setup(void); void plat_relocate_bl32_image(const image_info_t *bl32_img_info); +bool plat_supports_system_suspend(void); /* Declarations for plat_secondary.c */ void plat_secondary_setup(void); diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c index 2f54dd525..4bfc2de0e 100644 --- a/plat/nvidia/tegra/soc/t132/plat_setup.c +++ b/plat/nvidia/tegra/soc/t132/plat_setup.c @@ -154,3 +154,11 @@ void plat_late_platform_setup(void) { ; /* do nothing */ } + +/******************************************************************************* + * Handler to indicate support for System Suspend + ******************************************************************************/ +bool plat_supports_system_suspend(void) +{ + return true; +} diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c index 8bf8382a6..06a328427 100644 --- a/plat/nvidia/tegra/soc/t186/plat_setup.c +++ b/plat/nvidia/tegra/soc/t186/plat_setup.c @@ -291,13 +291,16 @@ int32_t plat_core_pos_by_mpidr(u_register_t mpidr) return ret; } +/******************************************************************************* + * Handler to relocate BL32 image to TZDRAM + ******************************************************************************/ void plat_relocate_bl32_image(const image_info_t *bl32_img_info) { const plat_params_from_bl2_t *plat_bl31_params = plat_get_bl31_plat_params(); const entry_point_info_t *bl32_ep_info = bl31_plat_get_next_image_ep_info(SECURE); uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end; - if ((bl32_img_info != NULL) && (bl32_ep_info != NULL)) { + if ((bl32_img_info != NULL) && (bl32_ep_info != NULL)) { /* Relocate BL32 if it resides outside of the TZDRAM */ tzdram_start = plat_bl31_params->tzdram_base; @@ -326,3 +329,11 @@ void plat_relocate_bl32_image(const image_info_t *bl32_img_info) } } } + +/******************************************************************************* + * Handler to indicate support for System Suspend + ******************************************************************************/ +bool plat_supports_system_suspend(void) +{ + return true; +} diff --git a/plat/nvidia/tegra/soc/t194/plat_setup.c b/plat/nvidia/tegra/soc/t194/plat_setup.c index 912dcc6f9..3640ade0a 100644 --- a/plat/nvidia/tegra/soc/t194/plat_setup.c +++ b/plat/nvidia/tegra/soc/t194/plat_setup.c @@ -304,6 +304,9 @@ plat_params_from_bl2_t *plat_get_bl31_plat_params(void) return (plat_params_from_bl2_t *)(uintptr_t)val; } +/******************************************************************************* + * Handler for late platform setup + ******************************************************************************/ void plat_late_platform_setup(void) { #if ENABLE_STRICT_CHECKING_MODE @@ -314,3 +317,11 @@ void plat_late_platform_setup(void) mce_enable_strict_checking(); #endif } + +/******************************************************************************* + * Handler to indicate support for System Suspend + ******************************************************************************/ +bool plat_supports_system_suspend(void) +{ + return true; +} diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c index c4bd58e33..c32772de8 100644 --- a/plat/nvidia/tegra/soc/t210/plat_setup.c +++ b/plat/nvidia/tegra/soc/t210/plat_setup.c @@ -262,3 +262,21 @@ void plat_gic_setup(void) */ tegra_fc_enable_fiq_to_ccplex_routing(); } +/******************************************************************************* + * Handler to indicate support for System Suspend + ******************************************************************************/ +bool plat_supports_system_suspend(void) +{ + const plat_params_from_bl2_t *plat_params = bl31_get_plat_params(); + + /* + * sc7entry-fw is only supported by Tegra210 SoCs. + */ + if (!tegra_chipid_is_t210_b01() && (plat_params->sc7entry_fw_base != 0U)) { + return true; + } else if (tegra_chipid_is_t210_b01()) { + return true; + } else { + return false; + } +} |