diff options
Diffstat (limited to 'plat/marvell')
22 files changed, 66 insertions, 69 deletions
diff --git a/plat/marvell/a3700/a3700/mvebu_def.h b/plat/marvell/a3700/a3700/mvebu_def.h index c58f06bb5..dad1085f8 100644 --- a/plat/marvell/a3700/a3700/mvebu_def.h +++ b/plat/marvell/a3700/a3700/mvebu_def.h @@ -5,9 +5,9 @@ * https://spdx.org/licenses */ -#ifndef __MVEBU_DEF_H__ -#define __MVEBU_DEF_H__ +#ifndef MVEBU_DEF_H +#define MVEBU_DEF_H #include <a3700_plat_def.h> -#endif /* __MVEBU_DEF_H__ */ +#endif /* MVEBU_DEF_H */ diff --git a/plat/marvell/a3700/common/include/a3700_plat_def.h b/plat/marvell/a3700/common/include/a3700_plat_def.h index 6ae57b3f0..c7f40adc3 100644 --- a/plat/marvell/a3700/common/include/a3700_plat_def.h +++ b/plat/marvell/a3700/common/include/a3700_plat_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __A3700_PLAT_DEF_H__ -#define __A3700_PLAT_DEF_H__ +#ifndef A3700_PLAT_DEF_H +#define A3700_PLAT_DEF_H #include <marvell_def.h> @@ -119,4 +119,4 @@ */ #define MVEBU_COMPHY_REG_BASE (MVEBU_REGS_BASE + 0x18300) -#endif /* __A3700_PLAT_DEF_H__ */ +#endif /* A3700_PLAT_DEF_H */ diff --git a/plat/marvell/a3700/common/include/a3700_pm.h b/plat/marvell/a3700/common/include/a3700_pm.h index bd8792a9b..cc6cf436a 100644 --- a/plat/marvell/a3700/common/include/a3700_pm.h +++ b/plat/marvell/a3700/common/include/a3700_pm.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __A3700_PM_H__ -#define __A3700_PM_H__ +#ifndef A3700_PM_H +#define A3700_PM_H #include <stdint.h> @@ -48,5 +48,4 @@ struct pm_wake_up_src_config { struct pm_wake_up_src_config *mv_wake_up_src_config_get(void); - -#endif /* __A3700_PM_H__ */ +#endif /* A3700_PM_H */ diff --git a/plat/marvell/a3700/common/include/ddr_info.h b/plat/marvell/a3700/common/include/ddr_info.h index 1a9230da0..254f78c1b 100644 --- a/plat/marvell/a3700/common/include/ddr_info.h +++ b/plat/marvell/a3700/common/include/ddr_info.h @@ -5,10 +5,10 @@ * https://spdx.org/licenses */ -#ifndef _DDR_INFO_H_ -#define _DDR_INFO_H_ +#ifndef DDR_INFO_H +#define DDR_INFO_H #define DRAM_MAX_IFACE 1 #define DRAM_CH0_MMAP_LOW_OFFSET 0x200 -#endif /* _DDR_INFO_H_ */ +#endif /* DDR_INFO_H */ diff --git a/plat/marvell/a3700/common/include/dram_win.h b/plat/marvell/a3700/common/include/dram_win.h index 7ff20bed7..6f345f945 100644 --- a/plat/marvell/a3700/common/include/dram_win.h +++ b/plat/marvell/a3700/common/include/dram_win.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef _DRAM_WIN_H_ -#define _DRAM_WIN_H_ +#ifndef DRAM_WIN_H +#define DRAM_WIN_H #include <bl_common.h> #include <io_addr_dec.h> @@ -14,5 +14,4 @@ void dram_win_map_build(struct dram_win_map *win_map); void cpu_wins_init(void); -#endif /* _DRAM_WIN_H_ */ - +#endif /* DRAM_WIN_H */ diff --git a/plat/marvell/a3700/common/include/io_addr_dec.h b/plat/marvell/a3700/common/include/io_addr_dec.h index 79f6f2cc5..42ef30bc2 100644 --- a/plat/marvell/a3700/common/include/io_addr_dec.h +++ b/plat/marvell/a3700/common/include/io_addr_dec.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef _IO_ADDR_DEC_H_ -#define _IO_ADDR_DEC_H_ +#ifndef IO_ADDR_DEC_H +#define IO_ADDR_DEC_H #include <stdint.h> @@ -63,5 +63,4 @@ int init_io_addr_dec(struct dram_win_map *dram_wins_map, struct dec_win_config *io_dec_config, uint32_t io_unit_num); -#endif /* _IO_ADDR_DEC_H_ */ - +#endif /* IO_ADDR_DEC_H */ diff --git a/plat/marvell/a3700/common/include/plat_macros.S b/plat/marvell/a3700/common/include/plat_macros.S index b52d1cf1d..f689b4f39 100644 --- a/plat/marvell/a3700/common/include/plat_macros.S +++ b/plat/marvell/a3700/common/include/plat_macros.S @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PLAT_MACROS_S__ -#define __PLAT_MACROS_S__ +#ifndef PLAT_MACROS_S +#define PLAT_MACROS_S #include <marvell_macros.S> @@ -23,4 +23,4 @@ print_cci_regs .endm -#endif /* __PLAT_MACROS_S__ */ +#endif /* PLAT_MACROS_S */ diff --git a/plat/marvell/a3700/common/include/platform_def.h b/plat/marvell/a3700/common/include/platform_def.h index 7c72cc54a..ca2553c99 100644 --- a/plat/marvell/a3700/common/include/platform_def.h +++ b/plat/marvell/a3700/common/include/platform_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PLATFORM_DEF_H__ -#define __PLATFORM_DEF_H__ +#ifndef PLATFORM_DEF_H +#define PLATFORM_DEF_H #include <board_marvell_def.h> #include <mvebu_def.h> @@ -228,4 +228,4 @@ #define BL32_LIMIT TRUSTED_DRAM_SIZE #endif -#endif /* __PLATFORM_DEF_H__ */ +#endif /* PLATFORM_DEF_H */ diff --git a/plat/marvell/a8k/a70x0/mvebu_def.h b/plat/marvell/a8k/a70x0/mvebu_def.h index a7c5abbb2..72bca12e3 100644 --- a/plat/marvell/a8k/a70x0/mvebu_def.h +++ b/plat/marvell/a8k/a70x0/mvebu_def.h @@ -5,11 +5,11 @@ * https://spdx.org/licenses */ -#ifndef __MVEBU_DEF_H__ -#define __MVEBU_DEF_H__ +#ifndef MVEBU_DEF_H +#define MVEBU_DEF_H #include <a8k_plat_def.h> #define CP_COUNT 1 /* A70x0 has single CP0 */ -#endif /* __MVEBU_DEF_H__ */ +#endif /* MVEBU_DEF_H */ diff --git a/plat/marvell/a8k/a70x0_amc/mvebu_def.h b/plat/marvell/a8k/a70x0_amc/mvebu_def.h index 5c6655283..cedf3239a 100644 --- a/plat/marvell/a8k/a70x0_amc/mvebu_def.h +++ b/plat/marvell/a8k/a70x0_amc/mvebu_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MVEBU_DEF_H__ -#define __MVEBU_DEF_H__ +#ifndef MVEBU_DEF_H +#define MVEBU_DEF_H #include <a8k_plat_def.h> @@ -28,4 +28,4 @@ #endif -#endif /* __MVEBU_DEF_H__ */ +#endif /* MVEBU_DEF_H */ diff --git a/plat/marvell/a8k/a80x0/board/phy-porting-layer.h b/plat/marvell/a8k/a80x0/board/phy-porting-layer.h index da391ebee..38497fb53 100644 --- a/plat/marvell/a8k/a80x0/board/phy-porting-layer.h +++ b/plat/marvell/a8k/a80x0/board/phy-porting-layer.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PHY_PORTING_LAYER_H -#define __PHY_PORTING_LAYER_H +#ifndef PHY_PORTING_LAYER_H +#define PHY_PORTING_LAYER_H #define MAX_LANE_NR 6 @@ -164,4 +164,4 @@ static const struct sata_params }, }, }; -#endif /* __PHY_PORTING_LAYER_H */ +#endif /* PHY_PORTING_LAYER_H */ diff --git a/plat/marvell/a8k/a80x0/mvebu_def.h b/plat/marvell/a8k/a80x0/mvebu_def.h index 5bff12ce5..3fa119af6 100644 --- a/plat/marvell/a8k/a80x0/mvebu_def.h +++ b/plat/marvell/a8k/a80x0/mvebu_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MVEBU_DEF_H__ -#define __MVEBU_DEF_H__ +#ifndef MVEBU_DEF_H +#define MVEBU_DEF_H #include <a8k_plat_def.h> @@ -14,4 +14,4 @@ #define I2C_SPD_ADDR 0x53 /* Access SPD data */ #define I2C_SPD_P0_ADDR 0x36 /* Select SPD data page 0 */ -#endif /* __MVEBU_DEF_H__ */ +#endif /* MVEBU_DEF_H */ diff --git a/plat/marvell/a8k/a80x0_mcbin/mvebu_def.h b/plat/marvell/a8k/a80x0_mcbin/mvebu_def.h index 5bff12ce5..3fa119af6 100644 --- a/plat/marvell/a8k/a80x0_mcbin/mvebu_def.h +++ b/plat/marvell/a8k/a80x0_mcbin/mvebu_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MVEBU_DEF_H__ -#define __MVEBU_DEF_H__ +#ifndef MVEBU_DEF_H +#define MVEBU_DEF_H #include <a8k_plat_def.h> @@ -14,4 +14,4 @@ #define I2C_SPD_ADDR 0x53 /* Access SPD data */ #define I2C_SPD_P0_ADDR 0x36 /* Select SPD data page 0 */ -#endif /* __MVEBU_DEF_H__ */ +#endif /* MVEBU_DEF_H */ diff --git a/plat/marvell/a8k/common/include/a8k_plat_def.h b/plat/marvell/a8k/common/include/a8k_plat_def.h index 55ad00247..7ed56e042 100644 --- a/plat/marvell/a8k/common/include/a8k_plat_def.h +++ b/plat/marvell/a8k/common/include/a8k_plat_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __A8K_PLAT_DEF_H__ -#define __A8K_PLAT_DEF_H__ +#ifndef A8K_PLAT_DEF_H +#define A8K_PLAT_DEF_H #include <marvell_def.h> @@ -191,4 +191,4 @@ enum ccu_target_ids { }; #endif /* __ASSEMBLER__ */ -#endif /* __A8K_PLAT_DEF_H__ */ +#endif /* A8K_PLAT_DEF_H */ diff --git a/plat/marvell/a8k/common/include/mentor_i2c_plat.h b/plat/marvell/a8k/common/include/mentor_i2c_plat.h index 8829a922c..e03c448a6 100644 --- a/plat/marvell/a8k/common/include/mentor_i2c_plat.h +++ b/plat/marvell/a8k/common/include/mentor_i2c_plat.h @@ -6,8 +6,8 @@ */ /* This driver provides I2C support for Marvell A8K and compatible SoCs */ -#ifndef A8K_I2C_H -#define A8K_I2C_H +#ifndef MENTOR_I2C_PLAT_H +#define MENTOR_I2C_PLAT_H #define CONFIG_SYS_TCLK 250000000 #define CONFIG_SYS_I2C_SPEED 100000 @@ -30,4 +30,4 @@ struct mentor_i2c_regs { uint32_t unstuck; }; -#endif +#endif /* MENTOR_I2C_PLAT_H */ diff --git a/plat/marvell/a8k/common/include/plat_macros.S b/plat/marvell/a8k/common/include/plat_macros.S index 2a6ccf27c..8faccf00b 100644 --- a/plat/marvell/a8k/common/include/plat_macros.S +++ b/plat/marvell/a8k/common/include/plat_macros.S @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PLAT_MACROS_S__ -#define __PLAT_MACROS_S__ +#ifndef PLAT_MACROS_S +#define PLAT_MACROS_S #include <marvell_macros.S> @@ -17,4 +17,4 @@ .macro plat_crash_print_regs .endm -#endif /* __PLAT_MACROS_S__ */ +#endif /* PLAT_MACROS_S */ diff --git a/plat/marvell/a8k/common/include/platform_def.h b/plat/marvell/a8k/common/include/platform_def.h index ed7bb63da..4c3e7a9ea 100644 --- a/plat/marvell/a8k/common/include/platform_def.h +++ b/plat/marvell/a8k/common/include/platform_def.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PLATFORM_DEF_H__ -#define __PLATFORM_DEF_H__ +#ifndef PLATFORM_DEF_H +#define PLATFORM_DEF_H #include <board_marvell_def.h> #include <gic_common.h> @@ -198,4 +198,4 @@ #define MVEBU_PMU_IRQ_WA -#endif /* __PLATFORM_DEF_H__ */ +#endif /* PLATFORM_DEF_H */ diff --git a/plat/marvell/a8k/common/mss/mss_pm_ipc.h b/plat/marvell/a8k/common/mss/mss_pm_ipc.h index 0f6945707..1dfa9fa03 100644 --- a/plat/marvell/a8k/common/mss/mss_pm_ipc.h +++ b/plat/marvell/a8k/common/mss/mss_pm_ipc.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MSS_PM_IPC_H -#define __MSS_PM_IPC_H +#ifndef MSS_PM_IPC_H +#define MSS_PM_IPC_H #include <mss_ipc_drv.h> @@ -32,4 +32,4 @@ int mss_pm_ipc_msg_send(unsigned int channel_id, unsigned int msg_id, int mss_pm_ipc_msg_trigger(void); -#endif /* __MSS_PM_IPC_H */ +#endif /* MSS_PM_IPC_H */ diff --git a/plat/marvell/common/mss/mss_ipc_drv.h b/plat/marvell/common/mss/mss_ipc_drv.h index 28eb907ea..7bb15d3f2 100644 --- a/plat/marvell/common/mss/mss_ipc_drv.h +++ b/plat/marvell/common/mss/mss_ipc_drv.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __PM_IPC_DRV_H -#define __PM_IPC_DRV_H +#ifndef MSS_IPC_DRV_H +#define MSS_IPC_DRV_H #include <psci.h> @@ -117,4 +117,4 @@ int mv_pm_ipc_msg_rx(unsigned int channel_id, struct mss_pm_ipc_msg *msg); int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id, unsigned int cluster_power_state); -#endif /* __PM_IPC_DRV_H */ +#endif /* MSS_IPC_DRV_H */ diff --git a/plat/marvell/common/mss/mss_mem.h b/plat/marvell/common/mss/mss_mem.h index efff59e62..5d68ac788 100644 --- a/plat/marvell/common/mss/mss_mem.h +++ b/plat/marvell/common/mss/mss_mem.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MSS_PM_MEM_H -#define __MSS_PM_MEM_H +#ifndef MSS_MEM_H +#define MSS_MEM_H /* MSS SRAM Memory base */ #define MSS_SRAM_PM_CONTROL_BASE (MVEBU_REGS_BASE + 0x520000) @@ -57,4 +57,4 @@ struct mss_pm_ctrl_block { unsigned int ctrl_blk_size; }; -#endif /* __MSS_PM_MEM_H */ +#endif /* MSS_MEM_H */ diff --git a/plat/marvell/common/mss/mss_scp_bl2_format.h b/plat/marvell/common/mss/mss_scp_bl2_format.h index c04df727a..7cf8d3201 100644 --- a/plat/marvell/common/mss/mss_scp_bl2_format.h +++ b/plat/marvell/common/mss/mss_scp_bl2_format.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MSS_SCP_BL2_FORMAT_H -#define __MSS_SCP_BL2_FORMAT_H +#ifndef MSS_SCP_BL2_FORMAT_H +#define MSS_SCP_BL2_FORMAT_H #define MAX_NR_OF_FILES 5 #define FILE_MAGIC 0xddd01ff @@ -41,4 +41,4 @@ typedef struct img_header { */ } img_header_t; -#endif /* __MSS_SCP_BL2_FORMAT_H */ +#endif /* MSS_SCP_BL2_FORMAT_H */ diff --git a/plat/marvell/common/mss/mss_scp_bootloader.h b/plat/marvell/common/mss/mss_scp_bootloader.h index 67c387a03..4950d2472 100644 --- a/plat/marvell/common/mss/mss_scp_bootloader.h +++ b/plat/marvell/common/mss/mss_scp_bootloader.h @@ -5,8 +5,8 @@ * https://spdx.org/licenses */ -#ifndef __MSS_SCP_BOOTLOADER_H__ -#define __MSS_SCP_BOOTLOADER_H__ +#ifndef MSS_SCP_BOOTLOADER_H +#define MSS_SCP_BOOTLOADER_H int scp_bootloader_transfer(void *image, unsigned int image_size); uintptr_t bl2_plat_get_cp_mss_regs(int ap_idx, int cp_idx); @@ -16,4 +16,4 @@ uint32_t bl2_plat_get_ap_count(void); void bl2_plat_configure_mss_windows(uintptr_t mss_regs); int bl2_plat_mss_check_image_ready(void); -#endif /* __MSS_SCP_BOOTLOADER_H__ */ +#endif /* MSS_SCP_BOOTLOADER_H */ |