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-rw-r--r--include/drivers/console.h6
-rw-r--r--include/drivers/ti/uart/uart_16550.h2
-rw-r--r--include/lib/aarch32/arch.h7
-rw-r--r--include/lib/aarch64/arch.h7
-rw-r--r--include/lib/aarch64/setjmp.h59
-rw-r--r--include/lib/utils_def.h26
-rw-r--r--include/lib/xlat_tables/xlat_mmu_helpers.h5
-rw-r--r--include/lib/xlat_tables/xlat_tables.h72
-rw-r--r--include/lib/xlat_tables/xlat_tables_v2.h93
-rw-r--r--include/plat/arm/board/common/board_arm_def.h4
-rw-r--r--include/plat/arm/common/arm_def.h10
-rw-r--r--include/plat/arm/common/plat_arm.h6
-rw-r--r--include/services/sdei.h11
-rw-r--r--include/services/secure_partition.h9
-rw-r--r--include/services/spm_svc.h3
15 files changed, 215 insertions, 105 deletions
diff --git a/include/drivers/console.h b/include/drivers/console.h
index a4d89fe91..6e7ebbf9c 100644
--- a/include/drivers/console.h
+++ b/include/drivers/console.h
@@ -16,9 +16,9 @@
#define CONSOLE_T_FLUSH (U(4) * REGSZ)
#define CONSOLE_T_DRVDATA (U(5) * REGSZ)
-#define CONSOLE_FLAG_BOOT BIT(0)
-#define CONSOLE_FLAG_RUNTIME BIT(1)
-#define CONSOLE_FLAG_CRASH BIT(2)
+#define CONSOLE_FLAG_BOOT (U(1) << 0)
+#define CONSOLE_FLAG_RUNTIME (U(1) << 1)
+#define CONSOLE_FLAG_CRASH (U(1) << 2)
/* Bits 3 to 7 reserved for additional scopes in future expansion. */
#define CONSOLE_FLAG_SCOPE_MASK ((U(1) << 8) - 1)
/* Bits 8 to 31 reserved for non-scope use in future expansion. */
diff --git a/include/drivers/ti/uart/uart_16550.h b/include/drivers/ti/uart/uart_16550.h
index 9eba41aa6..b00f66421 100644
--- a/include/drivers/ti/uart/uart_16550.h
+++ b/include/drivers/ti/uart/uart_16550.h
@@ -23,6 +23,8 @@
#define UARTMSR 0x18
#define UARTSPR 0x1c
#define UARTCSR 0x20
+/* Some instances have MDR1 defined as well */
+#define UARTMDR1 0x20
#define UARTRXFIFOCFG 0x24
#define UARTMIE 0x28
#define UARTVNDR 0x2c
diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h
index 3624cc689..910341a72 100644
--- a/include/lib/aarch32/arch.h
+++ b/include/lib/aarch32/arch.h
@@ -379,6 +379,7 @@
* Definitions of register offsets and fields in the CNTCTLBase Frame of the
* system level implementation of the Generic Timer.
******************************************************************************/
+#define CNTCTLBASE_CNTFRQ U(0x0)
#define CNTNSAR 0x4
#define CNTNSAR_NS_SHIFT(x) (x)
@@ -390,6 +391,12 @@
#define CNTACR_RWVT_SHIFT 0x4
#define CNTACR_RWPT_SHIFT 0x5
+/*******************************************************************************
+ * Definitions of register offsets in the CNTBaseN Frame of the
+ * system level implementation of the Generic Timer.
+ ******************************************************************************/
+#define CNTBASE_CNTFRQ U(0x10)
+
/* MAIR macros */
#define MAIR0_ATTR_SET(attr, index) ((attr) << ((index) << 3))
#define MAIR1_ATTR_SET(attr, index) ((attr) << (((index) - 3) << 3))
diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index 92bb97d51..7cc4b2377 100644
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -554,6 +554,7 @@
* Definitions of register offsets and fields in the CNTCTLBase Frame of the
* system level implementation of the Generic Timer.
******************************************************************************/
+#define CNTCTLBASE_CNTFRQ U(0x0)
#define CNTNSAR U(0x4)
#define CNTNSAR_NS_SHIFT(x) (x)
@@ -565,6 +566,12 @@
#define CNTACR_RWVT_SHIFT U(0x4)
#define CNTACR_RWPT_SHIFT U(0x5)
+/*******************************************************************************
+ * Definitions of register offsets in the CNTBaseN Frame of the
+ * system level implementation of the Generic Timer.
+ ******************************************************************************/
+#define CNTBASE_CNTFRQ U(0x10)
+
/* PMCR_EL0 definitions */
#define PMCR_EL0_RESET_VAL U(0x0)
#define PMCR_EL0_N_SHIFT U(11)
diff --git a/include/lib/aarch64/setjmp.h b/include/lib/aarch64/setjmp.h
new file mode 100644
index 000000000..c65810d82
--- /dev/null
+++ b/include/lib/aarch64/setjmp.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __JMP_H__
+#define __JMP_H__
+
+#define JMP_CTX_X19 0x0
+#define JMP_CTX_X21 0x10
+#define JMP_CTX_X23 0x20
+#define JMP_CTX_X25 0x30
+#define JMP_CTX_X27 0x40
+#define JMP_CTX_X29 0x50
+#define JMP_CTX_SP 0x60
+#define JMP_CTX_END 0x70
+
+#define JMP_SIZE (JMP_CTX_END >> 3)
+
+#ifndef __ASSEMBLY__
+
+#include <stdint.h>
+
+/* Jump buffer hosting x18 - x30 and sp_el0 registers */
+struct jmpbuf {
+ uint64_t buf[JMP_SIZE];
+} __aligned(16);
+
+
+/*
+ * Set a jump point, and populate the jump buffer with context information so
+ * that longjmp() can jump later. The caller must adhere to the following
+ * conditions:
+ *
+ * - After calling this function, the stack must not be shrunk. The contents of
+ * the stack must not be changed either.
+ *
+ * - If the caller were to 'return', the buffer must be considered invalid, and
+ * must not be used with longjmp().
+ *
+ * The caller will observe this function returning at two distinct
+ * circumstances, each with different return values:
+ *
+ * - Zero, when the buffer is setup;
+ *
+ * - Non-zero, when a call to longjmp() is made (presumably by one of the
+ * callee functions) with the same jump buffer.
+ */
+int setjmp(struct jmpbuf *buf);
+
+/*
+ * Reset execution to a jump point, and restore context information according to
+ * the jump buffer populated by setjmp().
+ */
+void longjmp(struct jmpbuf *buf);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __JMP_H__ */
diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h
index 31b129454..7335103b1 100644
--- a/include/lib/utils_def.h
+++ b/include/lib/utils_def.h
@@ -16,7 +16,31 @@
#define SIZE_FROM_LOG2_WORDS(n) (4 << (n))
-#define BIT(nr) (ULL(1) << (nr))
+#define BIT_32(nr) (U(1) << (nr))
+#define BIT_64(nr) (ULL(1) << (nr))
+
+#ifdef AARCH32
+#define BIT BIT_32
+#else
+#define BIT BIT_64
+#endif
+
+/*
+ * Create a contiguous bitmask starting at bit position @l and ending at
+ * position @h. For example
+ * GENMASK_64(39, 21) gives us the 64bit vector 0x000000ffffe00000.
+ */
+#define GENMASK_32(h, l) \
+ (((~UINT32_C(0)) << (l)) & (~UINT32_C(0) >> (32 - 1 - (h))))
+
+#define GENMASK_64(h, l) \
+ (((~UINT64_C(0)) << (l)) & (~UINT64_C(0) >> (64 - 1 - (h))))
+
+#ifdef AARCH32
+#define GENMASK GENMASK_32
+#else
+#define GENMASK GENMASK_64
+#endif
/*
* This variant of div_round_up can be used in macro definition but should not
diff --git a/include/lib/xlat_tables/xlat_mmu_helpers.h b/include/lib/xlat_tables/xlat_mmu_helpers.h
index d83d7640f..779531770 100644
--- a/include/lib/xlat_tables/xlat_mmu_helpers.h
+++ b/include/lib/xlat_tables/xlat_mmu_helpers.h
@@ -43,6 +43,8 @@
#ifndef __ASSEMBLY__
+#include <sys/types.h>
+
#ifdef AARCH32
/* AArch32 specific translation table API */
void enable_mmu_secure(unsigned int flags);
@@ -52,6 +54,9 @@ void enable_mmu_el1(unsigned int flags);
void enable_mmu_el3(unsigned int flags);
#endif /* AARCH32 */
+int xlat_arch_is_granule_size_supported(size_t size);
+size_t xlat_arch_get_max_supported_granule_size(void);
+
#endif /* __ASSEMBLY__ */
#endif /* __XLAT_MMU_HELPERS_H__ */
diff --git a/include/lib/xlat_tables/xlat_tables.h b/include/lib/xlat_tables/xlat_tables.h
index 91f2f055b..c017e193d 100644
--- a/include/lib/xlat_tables/xlat_tables.h
+++ b/include/lib/xlat_tables/xlat_tables.h
@@ -25,7 +25,7 @@
#define MAP_REGION(pa, va, sz, attr) {(pa), (va), (sz), (attr)}
/*
- * Shifts and masks to access fields of an mmap_attr_t
+ * Shifts and masks to access fields of an mmap attribute
*/
#define MT_TYPE_MASK U(0x7)
#define MT_TYPE(_attr) ((_attr) & MT_TYPE_MASK)
@@ -39,37 +39,41 @@
/*
* Memory mapping attributes
*/
-typedef enum {
- /*
- * Memory types supported.
- * These are organised so that, going down the list, the memory types
- * are getting weaker; conversely going up the list the memory types are
- * getting stronger.
- */
- MT_DEVICE,
- MT_NON_CACHEABLE,
- MT_MEMORY,
- /* Values up to 7 are reserved to add new memory types in the future */
-
- MT_RO = U(0) << MT_PERM_SHIFT,
- MT_RW = U(1) << MT_PERM_SHIFT,
-
- MT_SECURE = U(0) << MT_SEC_SHIFT,
- MT_NS = U(1) << MT_SEC_SHIFT,
-
- /*
- * Access permissions for instruction execution are only relevant for
- * normal read-only memory, i.e. MT_MEMORY | MT_RO. They are ignored
- * (and potentially overridden) otherwise:
- * - Device memory is always marked as execute-never.
- * - Read-write normal memory is always marked as execute-never.
- */
- MT_EXECUTE = U(0) << MT_EXECUTE_SHIFT,
- MT_EXECUTE_NEVER = U(1) << MT_EXECUTE_SHIFT,
-} mmap_attr_t;
-
-#define MT_CODE (MT_MEMORY | MT_RO | MT_EXECUTE)
-#define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER)
+
+/*
+ * Memory types supported.
+ * These are organised so that, going down the list, the memory types are
+ * getting weaker; conversely going up the list the memory types are getting
+ * stronger.
+ */
+#define MT_DEVICE U(0)
+#define MT_NON_CACHEABLE U(1)
+#define MT_MEMORY U(2)
+/* Values up to 7 are reserved to add new memory types in the future */
+
+#define MT_RO (U(0) << MT_PERM_SHIFT)
+#define MT_RW (U(1) << MT_PERM_SHIFT)
+
+#define MT_SECURE (U(0) << MT_SEC_SHIFT)
+#define MT_NS (U(1) << MT_SEC_SHIFT)
+
+/*
+ * Access permissions for instruction execution are only relevant for normal
+ * read-only memory, i.e. MT_MEMORY | MT_RO. They are ignored (and potentially
+ * overridden) otherwise:
+ * - Device memory is always marked as execute-never.
+ * - Read-write normal memory is always marked as execute-never.
+ */
+#define MT_EXECUTE (U(0) << MT_EXECUTE_SHIFT)
+#define MT_EXECUTE_NEVER (U(1) << MT_EXECUTE_SHIFT)
+
+/* Compound attributes for most common usages */
+#define MT_CODE (MT_MEMORY | MT_RO | MT_EXECUTE)
+#define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER)
+
+#if !ERROR_DEPRECATED
+typedef unsigned int mmap_attr_t;
+#endif
/*
* Structure for specifying a single region of memory.
@@ -78,13 +82,13 @@ typedef struct mmap_region {
unsigned long long base_pa;
uintptr_t base_va;
size_t size;
- mmap_attr_t attr;
+ unsigned int attr;
} mmap_region_t;
/* Generic translation table APIs */
void init_xlat_tables(void);
void mmap_add_region(unsigned long long base_pa, uintptr_t base_va,
- size_t size, mmap_attr_t attr);
+ size_t size, unsigned int attr);
void mmap_add(const mmap_region_t *mm);
#endif /*__ASSEMBLY__*/
diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h
index b2379454d..98f00d715 100644
--- a/include/lib/xlat_tables/xlat_tables_v2.h
+++ b/include/lib/xlat_tables/xlat_tables_v2.h
@@ -47,7 +47,7 @@
_MAP_REGION_FULL_SPEC(_pa, _va, _sz, _attr, _gr)
/*
- * Shifts and masks to access fields of an mmap_attr_t
+ * Shifts and masks to access fields of an mmap attribute
*/
#define MT_TYPE_MASK U(0x7)
#define MT_TYPE(_attr) ((_attr) & MT_TYPE_MASK)
@@ -57,57 +57,56 @@
#define MT_SEC_SHIFT U(4)
/* Access permissions for instruction execution (EXECUTE/EXECUTE_NEVER) */
#define MT_EXECUTE_SHIFT U(5)
-/*
- * In the EL1&0 translation regime, mark the region as User (EL0) or
- * Privileged (EL1). In the EL3 translation regime this has no effect.
- */
+/* In the EL1&0 translation regime, User (EL0) or Privileged (EL1). */
#define MT_USER_SHIFT U(6)
/* All other bits are reserved */
/*
* Memory mapping attributes
*/
-typedef enum {
- /*
- * Memory types supported.
- * These are organised so that, going down the list, the memory types
- * are getting weaker; conversely going up the list the memory types are
- * getting stronger.
- */
- MT_DEVICE,
- MT_NON_CACHEABLE,
- MT_MEMORY,
- /* Values up to 7 are reserved to add new memory types in the future */
-
- MT_RO = U(0) << MT_PERM_SHIFT,
- MT_RW = U(1) << MT_PERM_SHIFT,
-
- MT_SECURE = U(0) << MT_SEC_SHIFT,
- MT_NS = U(1) << MT_SEC_SHIFT,
-
- /*
- * Access permissions for instruction execution are only relevant for
- * normal read-only memory, i.e. MT_MEMORY | MT_RO. They are ignored
- * (and potentially overridden) otherwise:
- * - Device memory is always marked as execute-never.
- * - Read-write normal memory is always marked as execute-never.
- */
- MT_EXECUTE = U(0) << MT_EXECUTE_SHIFT,
- MT_EXECUTE_NEVER = U(1) << MT_EXECUTE_SHIFT,
-
- /*
- * When mapping a region at EL0 or EL1, this attribute will be used to
- * determine if a User mapping (EL0) will be created or a Privileged
- * mapping (EL1).
- */
- MT_USER = U(1) << MT_USER_SHIFT,
- MT_PRIVILEGED = U(0) << MT_USER_SHIFT,
-} mmap_attr_t;
+
+/*
+ * Memory types supported.
+ * These are organised so that, going down the list, the memory types are
+ * getting weaker; conversely going up the list the memory types are getting
+ * stronger.
+ */
+#define MT_DEVICE U(0)
+#define MT_NON_CACHEABLE U(1)
+#define MT_MEMORY U(2)
+/* Values up to 7 are reserved to add new memory types in the future */
+
+#define MT_RO (U(0) << MT_PERM_SHIFT)
+#define MT_RW (U(1) << MT_PERM_SHIFT)
+
+#define MT_SECURE (U(0) << MT_SEC_SHIFT)
+#define MT_NS (U(1) << MT_SEC_SHIFT)
+
+/*
+ * Access permissions for instruction execution are only relevant for normal
+ * read-only memory, i.e. MT_MEMORY | MT_RO. They are ignored (and potentially
+ * overridden) otherwise:
+ * - Device memory is always marked as execute-never.
+ * - Read-write normal memory is always marked as execute-never.
+ */
+#define MT_EXECUTE (U(0) << MT_EXECUTE_SHIFT)
+#define MT_EXECUTE_NEVER (U(1) << MT_EXECUTE_SHIFT)
+
+/*
+ * When mapping a region at EL0 or EL1, this attribute will be used to determine
+ * if a User mapping (EL0) will be created or a Privileged mapping (EL1).
+ */
+#define MT_USER (U(1) << MT_USER_SHIFT)
+#define MT_PRIVILEGED (U(0) << MT_USER_SHIFT)
/* Compound attributes for most common usages */
-#define MT_CODE (MT_MEMORY | MT_RO | MT_EXECUTE)
-#define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER)
-#define MT_RW_DATA (MT_MEMORY | MT_RW | MT_EXECUTE_NEVER)
+#define MT_CODE (MT_MEMORY | MT_RO | MT_EXECUTE)
+#define MT_RO_DATA (MT_MEMORY | MT_RO | MT_EXECUTE_NEVER)
+#define MT_RW_DATA (MT_MEMORY | MT_RW | MT_EXECUTE_NEVER)
+
+#if !ERROR_DEPRECATED
+typedef unsigned int mmap_attr_t;
+#endif
/*
* Structure for specifying a single region of memory.
@@ -116,7 +115,7 @@ typedef struct mmap_region {
unsigned long long base_pa;
uintptr_t base_va;
size_t size;
- mmap_attr_t attr;
+ unsigned int attr;
/* Desired granularity. See the MAP_REGION2() macro for more details. */
size_t granularity;
} mmap_region_t;
@@ -213,7 +212,7 @@ void init_xlat_tables_ctx(xlat_ctx_t *ctx);
* removed afterwards.
*/
void mmap_add_region(unsigned long long base_pa, uintptr_t base_va,
- size_t size, mmap_attr_t attr);
+ size_t size, unsigned int attr);
void mmap_add_region_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm);
/*
@@ -238,7 +237,7 @@ void mmap_add_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm);
* EPERM: It overlaps another region in an invalid way.
*/
int mmap_add_dynamic_region(unsigned long long base_pa, uintptr_t base_va,
- size_t size, mmap_attr_t attr);
+ size_t size, unsigned int attr);
int mmap_add_dynamic_region_ctx(xlat_ctx_t *ctx, mmap_region_t *mm);
/*
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h
index 2d8e4c139..96eefbbeb 100644
--- a/include/plat/arm/board/common/board_arm_def.h
+++ b/include/plat/arm/board/common/board_arm_def.h
@@ -87,9 +87,9 @@
* little space for growth.
*/
#if TRUSTED_BOARD_BOOT
-# define PLAT_ARM_MAX_BL2_SIZE 0x1E000
+# define PLAT_ARM_MAX_BL2_SIZE 0x1F000
#else
-# define PLAT_ARM_MAX_BL2_SIZE 0x10000
+# define PLAT_ARM_MAX_BL2_SIZE 0x11000
#endif
/*
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index d87fc16fe..e3d0edbce 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -245,13 +245,7 @@
* The number of regions like RO(code), coherent and data required by
* different BL stages which need to be mapped in the MMU.
*/
-#if ENABLE_SPM && defined(IMAGE_BL31)
-# if USE_COHERENT_MEM
-# define ARM_BL_REGIONS 5
-# else
-# define ARM_BL_REGIONS 4
-# endif
-#elif USE_COHERENT_MEM
+#if USE_COHERENT_MEM
# define ARM_BL_REGIONS 4
#else
# define ARM_BL_REGIONS 3
@@ -264,6 +258,8 @@
#define ARM_SYS_CNTCTL_BASE 0x2a430000
#define ARM_SYS_CNTREAD_BASE 0x2a800000
#define ARM_SYS_TIMCTL_BASE 0x2a810000
+#define ARM_SYS_CNT_BASE_S 0x2a820000
+#define ARM_SYS_CNT_BASE_NS 0x2a830000
#define ARM_CONSOLE_BAUDRATE 115200
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index fc3f4ec3a..33f2c7dbe 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -155,6 +155,12 @@ struct tzc_dmc500_driver_data;
void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data,
const arm_tzc_regions_info_t *tzc_regions);
+/* Console utility functions */
+void arm_console_boot_init(void);
+void arm_console_boot_end(void);
+void arm_console_runtime_init(void);
+void arm_console_runtime_end(void);
+
/* Systimer utility function */
void arm_configure_sys_timer(void);
diff --git a/include/services/sdei.h b/include/services/sdei.h
index ce9a008c5..79d1d065d 100644
--- a/include/services/sdei.h
+++ b/include/services/sdei.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -52,6 +52,7 @@
#define _SDEI_MAPF_SIGNALABLE_SHIFT 3
#define _SDEI_MAPF_PRIVATE_SHIFT 4
#define _SDEI_MAPF_CRITICAL_SHIFT 5
+#define _SDEI_MAPF_EXPLICIT_SHIFT 6
/* SDEI event 0 */
#define SDEI_EVENT_0 0
@@ -81,9 +82,12 @@
*/
#define SDEI_MAPF_DYNAMIC BIT(_SDEI_MAPF_DYNAMIC_SHIFT)
#define SDEI_MAPF_BOUND BIT(_SDEI_MAPF_BOUND_SHIFT)
+#define SDEI_MAPF_EXPLICIT BIT(_SDEI_MAPF_EXPLICIT_SHIFT)
#define SDEI_MAPF_SIGNALABLE BIT(_SDEI_MAPF_SIGNALABLE_SHIFT)
#define SDEI_MAPF_PRIVATE BIT(_SDEI_MAPF_PRIVATE_SHIFT)
+
+#define SDEI_MAPF_NORMAL 0
#define SDEI_MAPF_CRITICAL BIT(_SDEI_MAPF_CRITICAL_SHIFT)
/* Indices of private and shared mappings */
@@ -114,6 +118,9 @@
#define SDEI_DEFINE_EVENT_0(_intr) \
SDEI_PRIVATE_EVENT(SDEI_EVENT_0, _intr, SDEI_MAPF_SIGNALABLE)
+#define SDEI_EXPLICIT_EVENT(_event, _pri) \
+ SDEI_EVENT_MAP(_event, 0, _pri | SDEI_MAPF_EXPLICIT | SDEI_MAPF_PRIVATE)
+
/*
* Declare shared and private entries for each core. Also declare a global
* structure containing private and share entries.
@@ -176,6 +183,6 @@ uint64_t sdei_smc_handler(uint32_t smc_fid,
void sdei_init(void);
/* Public API to dispatch an event to Normal world */
-int sdei_dispatch_event(int ev_num, unsigned int preempted_sec_state);
+int sdei_dispatch_event(int ev_num);
#endif /* __SDEI_H__ */
diff --git a/include/services/secure_partition.h b/include/services/secure_partition.h
index f1fdb733f..d4aff1cc0 100644
--- a/include/services/secure_partition.h
+++ b/include/services/secure_partition.h
@@ -7,18 +7,9 @@
#ifndef __SECURE_PARTITION_H__
#define __SECURE_PARTITION_H__
-#include <bl_common.h>
#include <types.h>
#include <utils_def.h>
-/* Import linker symbols */
-IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_START__, SP_IMAGE_XLAT_TABLES_START);
-IMPORT_SYM(uintptr_t, __SP_IMAGE_XLAT_TABLES_END__, SP_IMAGE_XLAT_TABLES_END);
-
-/* Definitions */
-#define SP_IMAGE_XLAT_TABLES_SIZE \
- (SP_IMAGE_XLAT_TABLES_END - SP_IMAGE_XLAT_TABLES_START)
-
/*
* Flags used by the secure_partition_mp_info structure to describe the
* characteristics of a cpu. Only a single flag is defined at the moment to
diff --git a/include/services/spm_svc.h b/include/services/spm_svc.h
index 8f872c39e..0200992c1 100644
--- a/include/services/spm_svc.h
+++ b/include/services/spm_svc.h
@@ -74,6 +74,9 @@ uint64_t spm_smc_handler(uint32_t smc_fid,
void *handle,
uint64_t flags);
+/* Helper to enter a Secure Partition */
+uint64_t spm_sp_call(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3);
+
#endif /* __ASSEMBLY__ */
#endif /* __SPM_SVC_H__ */
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-15 07:17:20 +0000