diff options
Diffstat (limited to 'include')
45 files changed, 874 insertions, 365 deletions
diff --git a/include/common/aarch32/console_macros.S b/include/common/aarch32/console_macros.S index 480e3c298..7c30688fb 100644 --- a/include/common/aarch32/console_macros.S +++ b/include/common/aarch32/console_macros.S @@ -17,6 +17,14 @@ * with a tail call that will include return to the caller. * REQUIRES console_t pointer in x0 and a valid return address in x30. */ +/* + * The USE_FINISH_CONSOLE_REG_2 guard is introduced to allow selection between + * the 2 variants of the finish_console_register macro and will be removed + * once the deprecated variant is removed. + */ +#ifndef USE_FINISH_CONSOLE_REG_2 +#if !ERROR_DEPRECATED + /* This version of the macro is deprecated. Use the new version */ .macro finish_console_register _driver /* * Add these weak definitions so we will automatically write a 0 if the @@ -39,5 +47,38 @@ str r1, [r0, #CONSOLE_T_FLAGS] b console_register .endm +#endif /* ERROR_DEPRECATED */ +#else /* USE_FINISH_CONSOLE_REG_2 */ + /* The new version of the macro not using weak references */ + .macro finish_console_register _driver, putc=0, getc=0, flush=0 + /* + * If any of the callback is not specified or set as 0, then the + * corresponding callback entry in console_t is set to 0. + */ + .ifne \putc + ldr r1, =console_\_driver\()_putc + .else + mov r1, #0 + .endif + str r1, [r0, #CONSOLE_T_PUTC] + + .ifne \getc + ldr r1, =console_\_driver\()_getc + .else + mov r1, #0 + .endif + str r1, [r0, #CONSOLE_T_GETC] + .ifne \flush + ldr r1, =console_\_driver\()_flush + .else + mov r1, #0 + .endif + str r1, [r0, #CONSOLE_T_FLUSH] + + mov r1, #(CONSOLE_FLAG_BOOT | CONSOLE_FLAG_CRASH) + str r1, [r0, #CONSOLE_T_FLAGS] + b console_register + .endm +#endif /* USE_FINISH_CONSOLE_REG_2 */ #endif /* __CONSOLE_MACROS_S__ */ diff --git a/include/common/aarch64/asm_macros.S b/include/common/aarch64/asm_macros.S index 9621a1c02..91416e4e4 100644 --- a/include/common/aarch64/asm_macros.S +++ b/include/common/aarch64/asm_macros.S @@ -105,8 +105,9 @@ * Clobber: X30, X1, X2 */ .macro get_my_mp_stack _name, _size - bl plat_my_core_pos - ldr x2, =(\_name + \_size) + bl plat_my_core_pos + adrp x2, (\_name + \_size) + add x2, x2, :lo12:(\_name + \_size) mov x1, #\_size madd x0, x0, x1, x2 .endm @@ -117,7 +118,8 @@ * Out: X0 = physical address of stack base */ .macro get_up_stack _name, _size - ldr x0, =(\_name + \_size) + adrp x0, (\_name + \_size) + add x0, x0, :lo12:(\_name + \_size) .endm /* diff --git a/include/common/aarch64/console_macros.S b/include/common/aarch64/console_macros.S index 0ebea2c1b..b285ecce9 100644 --- a/include/common/aarch64/console_macros.S +++ b/include/common/aarch64/console_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,6 +17,14 @@ * with a tail call that will include return to the caller. * REQUIRES console_t pointer in x0 and a valid return address in x30. */ +/* + * The USE_FINISH_CONSOLE_REG_2 guard is introduced to allow selection between + * the 2 variants of the finish_console_register macro and will be removed + * once the deprecated variant is removed. + */ +#ifndef USE_FINISH_CONSOLE_REG_2 +#if !ERROR_DEPRECATED + /* This version of the macro is deprecated. Use the new version */ .macro finish_console_register _driver /* * Add these weak definitions so we will automatically write a 0 if the @@ -39,5 +47,41 @@ str x1, [x0, #CONSOLE_T_FLAGS] b console_register .endm +#endif /* ERROR_DEPRECATED */ +#else /* USE_FINISH_CONSOLE_REG_2 */ + /* The new version of the macro not using weak references */ + .macro finish_console_register _driver, putc=0, getc=0, flush=0 + /* + * If any of the callback is not specified or set as 0, then the + * corresponding callback entry in console_t is set to 0. + */ + .ifne \putc + adrp x1, console_\_driver\()_putc + add x1, x1, :lo12:console_\_driver\()_putc + str x1, [x0, #CONSOLE_T_PUTC] + .else + str xzr, [x0, #CONSOLE_T_PUTC] + .endif + + .ifne \getc + adrp x1, console_\_driver\()_getc + add x1, x1, :lo12:console_\_driver\()_getc + str x1, [x0, #CONSOLE_T_GETC] + .else + str xzr, [x0, #CONSOLE_T_GETC] + .endif + .ifne \flush + adrp x1, console_\_driver\()_flush + add x1, x1, :lo12:console_\_driver\()_flush + str x1, [x0, #CONSOLE_T_FLUSH] + .else + str xzr, [x0, #CONSOLE_T_FLUSH] + .endif + + mov x1, #(CONSOLE_FLAG_BOOT | CONSOLE_FLAG_CRASH) + str x1, [x0, #CONSOLE_T_FLAGS] + b console_register + .endm +#endif /* USE_FINISH_CONSOLE_REG_2 */ #endif /* __CONSOLE_MACROS_S__ */ diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index 03b977e36..4902583b1 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -70,9 +70,14 @@ * * SCR_EL3.EA: Set to one to route External Aborts and SError Interrupts * to EL3 when executing at any EL. + * + * SCR_EL3.{API,APK}: For Armv8.3 pointer authentication feature, + * disable traps to EL3 when accessing key registers or using pointer + * authentication instructions from lower ELs. * --------------------------------------------------------------------- */ - mov x0, #((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT) \ + mov_imm x0, ((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT | \ + SCR_API_BIT | SCR_APK_BIT) \ & ~(SCR_TWE_BIT | SCR_TWI_BIT | SCR_SMD_BIT)) msr scr_el3, x0 @@ -278,26 +283,38 @@ * an earlier boot loader stage. * ------------------------------------------------------------- */ - ldr x0, =__RW_START__ - ldr x1, =__RW_END__ + adrp x0, __RW_START__ + add x0, x0, :lo12:__RW_START__ + adrp x1, __RW_END__ + add x1, x1, :lo12:__RW_END__ sub x1, x1, x0 bl inv_dcache_range #endif + adrp x0, __BSS_START__ + add x0, x0, :lo12:__BSS_START__ - ldr x0, =__BSS_START__ - ldr x1, =__BSS_SIZE__ + adrp x1, __BSS_END__ + add x1, x1, :lo12:__BSS_END__ + sub x1, x1, x0 bl zeromem #if USE_COHERENT_MEM - ldr x0, =__COHERENT_RAM_START__ - ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__ + adrp x0, __COHERENT_RAM_START__ + add x0, x0, :lo12:__COHERENT_RAM_START__ + adrp x1, __COHERENT_RAM_END_UNALIGNED__ + add x1, x1, :lo12: __COHERENT_RAM_END_UNALIGNED__ + sub x1, x1, x0 bl zeromem #endif #if defined(IMAGE_BL1) || (defined(IMAGE_BL2) && BL2_IN_XIP_MEM) - ldr x0, =__DATA_RAM_START__ - ldr x1, =__DATA_ROM_START__ - ldr x2, =__DATA_SIZE__ + adrp x0, __DATA_RAM_START__ + add x0, x0, :lo12:__DATA_RAM_START__ + adrp x1, __DATA_ROM_START__ + add x1, x1, :lo12:__DATA_ROM_START__ + adrp x2, __DATA_RAM_END__ + add x2, x2, :lo12:__DATA_RAM_END__ + sub x2, x2, x0 bl memcpy16 #endif .endif /* _init_c_runtime */ diff --git a/include/common/bl_common.h b/include/common/bl_common.h index af598d0da..6a79dc33f 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -83,6 +83,7 @@ IMPORT_SYM(unsigned long, __BL2_END__, BL2_END); #elif defined(IMAGE_BL2U) IMPORT_SYM(unsigned long, __BL2U_END__, BL2U_END); #elif defined(IMAGE_BL31) +IMPORT_SYM(unsigned long, __BL31_START__, BL31_START); IMPORT_SYM(unsigned long, __BL31_END__, BL31_END); #elif defined(IMAGE_BL32) IMPORT_SYM(unsigned long, __BL32_END__, BL32_END); @@ -193,6 +194,11 @@ extern const char version_string[]; void print_entry_point_info(const entry_point_info_t *ep_info); uintptr_t page_align(uintptr_t value, unsigned dir); +struct mmap_region; + +void setup_page_tables(const struct mmap_region *bl_regions, + const struct mmap_region *plat_regions); + #endif /*__ASSEMBLY__*/ #endif /* __BL_COMMON_H__ */ diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h index a97914de6..96bfb5341 100644 --- a/include/common/tbbr/tbbr_img_def.h +++ b/include/common/tbbr/tbbr_img_def.h @@ -77,7 +77,13 @@ /* NT_FW_CONFIG */ #define NT_FW_CONFIG_ID U(27) +/* GPT Partition */ +#define GPT_IMAGE_ID U(28) + +/* Binary with STM32 header */ +#define STM32_IMAGE_ID U(29) + /* Define size of the array */ -#define MAX_NUMBER_IDS U(28) +#define MAX_NUMBER_IDS U(30) #endif /* __TBBR_IMG_DEF_H__ */ diff --git a/include/drivers/allwinner/sunxi_rsb.h b/include/drivers/allwinner/sunxi_rsb.h new file mode 100644 index 000000000..5a69d35f2 --- /dev/null +++ b/include/drivers/allwinner/sunxi_rsb.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2017-2018 ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef SUNXI_RSB_H +#define SUNXI_RSB_H + +#include <stdint.h> + +int rsb_init_controller(void); +int rsb_set_bus_speed(uint32_t source_freq, uint32_t bus_freq); +int rsb_set_device_mode(uint32_t device_mode); +int rsb_assign_runtime_address(uint16_t hw_addr, uint8_t rt_addr); + +int rsb_read(uint8_t rt_addr, uint8_t reg_addr); +int rsb_write(uint8_t rt_addr, uint8_t reg_addr, uint8_t value); + +#endif diff --git a/include/drivers/arm/tzc400.h b/include/drivers/arm/tzc400.h index 095099c60..a7bb3f648 100644 --- a/include/drivers/arm/tzc400.h +++ b/include/drivers/arm/tzc400.h @@ -4,83 +4,84 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC400_H__ -#define __TZC400_H__ +#ifndef TZC400_H +#define TZC400_H #include <tzc_common.h> +#include <utils_def.h> -#define BUILD_CONFIG_OFF 0x000 -#define GATE_KEEPER_OFF 0x008 -#define SPECULATION_CTRL_OFF 0x00c -#define INT_STATUS 0x010 -#define INT_CLEAR 0x014 +#define BUILD_CONFIG_OFF U(0x000) +#define GATE_KEEPER_OFF U(0x008) +#define SPECULATION_CTRL_OFF U(0x00c) +#define INT_STATUS U(0x010) +#define INT_CLEAR U(0x014) -#define FAIL_ADDRESS_LOW_OFF 0x020 -#define FAIL_ADDRESS_HIGH_OFF 0x024 -#define FAIL_CONTROL_OFF 0x028 -#define FAIL_ID 0x02c +#define FAIL_ADDRESS_LOW_OFF U(0x020) +#define FAIL_ADDRESS_HIGH_OFF U(0x024) +#define FAIL_CONTROL_OFF U(0x028) +#define FAIL_ID U(0x02c) /* ID registers not common across different varieties of TZC */ -#define PID5 0xFD4 -#define PID6 0xFD8 -#define PID7 0xFDC +#define PID5 U(0xFD4) +#define PID6 U(0xFD8) +#define PID7 U(0xFDC) #define BUILD_CONFIG_NF_SHIFT 24 -#define BUILD_CONFIG_NF_MASK 0x3 +#define BUILD_CONFIG_NF_MASK U(0x3) #define BUILD_CONFIG_AW_SHIFT 8 -#define BUILD_CONFIG_AW_MASK 0x3f +#define BUILD_CONFIG_AW_MASK U(0x3f) #define BUILD_CONFIG_NR_SHIFT 0 -#define BUILD_CONFIG_NR_MASK 0x1f +#define BUILD_CONFIG_NR_MASK U(0x1f) /* * Number of gate keepers is implementation defined. But we know the max for * this device is 4. Get implementation details from BUILD_CONFIG. */ #define GATE_KEEPER_OS_SHIFT 16 -#define GATE_KEEPER_OS_MASK 0xf +#define GATE_KEEPER_OS_MASK U(0xf) #define GATE_KEEPER_OR_SHIFT 0 -#define GATE_KEEPER_OR_MASK 0xf -#define GATE_KEEPER_FILTER_MASK 0x1 +#define GATE_KEEPER_OR_MASK U(0xf) +#define GATE_KEEPER_FILTER_MASK U(0x1) /* Speculation is enabled by default. */ -#define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) -#define SPECULATION_CTRL_READ_DISABLE (1 << 0) +#define SPECULATION_CTRL_WRITE_DISABLE BIT_32(1) +#define SPECULATION_CTRL_READ_DISABLE BIT_32(0) /* Max number of filters allowed is 4. */ #define INT_STATUS_OVERLAP_SHIFT 16 -#define INT_STATUS_OVERLAP_MASK 0xf +#define INT_STATUS_OVERLAP_MASK U(0xf) #define INT_STATUS_OVERRUN_SHIFT 8 -#define INT_STATUS_OVERRUN_MASK 0xf +#define INT_STATUS_OVERRUN_MASK U(0xf) #define INT_STATUS_STATUS_SHIFT 0 -#define INT_STATUS_STATUS_MASK 0xf +#define INT_STATUS_STATUS_MASK U(0xf) #define INT_CLEAR_CLEAR_SHIFT 0 -#define INT_CLEAR_CLEAR_MASK 0xf - -#define FAIL_CONTROL_DIR_SHIFT (1 << 24) -#define FAIL_CONTROL_DIR_READ 0x0 -#define FAIL_CONTROL_DIR_WRITE 0x1 -#define FAIL_CONTROL_NS_SHIFT (1 << 21) -#define FAIL_CONTROL_NS_SECURE 0x0 -#define FAIL_CONTROL_NS_NONSECURE 0x1 -#define FAIL_CONTROL_PRIV_SHIFT (1 << 20) -#define FAIL_CONTROL_PRIV_PRIV 0x0 -#define FAIL_CONTROL_PRIV_UNPRIV 0x1 +#define INT_CLEAR_CLEAR_MASK U(0xf) + +#define FAIL_CONTROL_DIR_SHIFT 24 +#define FAIL_CONTROL_DIR_READ U(0) +#define FAIL_CONTROL_DIR_WRITE U(1) +#define FAIL_CONTROL_NS_SHIFT 21 +#define FAIL_CONTROL_NS_SECURE U(0) +#define FAIL_CONTROL_NS_NONSECURE U(1) +#define FAIL_CONTROL_PRIV_SHIFT 20 +#define FAIL_CONTROL_PRIV_PRIV U(0) +#define FAIL_CONTROL_PRIV_UNPRIV U(1) /* * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. * Platform should provide the value on initialisation. */ #define FAIL_ID_VNET_SHIFT 24 -#define FAIL_ID_VNET_MASK 0xf +#define FAIL_ID_VNET_MASK U(0xf) #define FAIL_ID_ID_SHIFT 0 -#define TZC_400_PERIPHERAL_ID 0x460 +#define TZC_400_PERIPHERAL_ID U(0x460) /* Filter enable bits in a TZC */ -#define TZC_400_REGION_ATTR_F_EN_MASK 0xf -#define TZC_400_REGION_ATTR_FILTER_BIT(x) ((1 << x) \ - << TZC_REGION_ATTR_F_EN_SHIFT) +#define TZC_400_REGION_ATTR_F_EN_MASK U(0xf) +#define TZC_400_REGION_ATTR_FILTER_BIT(x) \ + ((U(1) << (x)) << TZC_REGION_ATTR_F_EN_SHIFT) #define TZC_400_REGION_ATTR_FILTER_BIT_ALL \ (TZC_400_REGION_ATTR_F_EN_MASK << \ TZC_REGION_ATTR_F_EN_SHIFT) @@ -89,8 +90,8 @@ * All TZC region configuration registers are placed one after another. It * depicts size of block of registers for programming each region. */ -#define TZC_400_REGION_SIZE 0x20 -#define TZC_400_ACTION_OFF 0x4 +#define TZC_400_REGION_SIZE U(0x20) +#define TZC_400_ACTION_OFF U(0x4) #ifndef __ASSEMBLY__ @@ -101,15 +102,15 @@ * Function & variable prototypes ******************************************************************************/ void tzc400_init(uintptr_t base); -void tzc400_configure_region0(tzc_region_attributes_t sec_attr, +void tzc400_configure_region0(unsigned int sec_attr, unsigned int ns_device_access); void tzc400_configure_region(unsigned int filters, - int region, + unsigned int region, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc400_set_action(tzc_action_t action); +void tzc400_set_action(unsigned int action); void tzc400_enable_filters(void); void tzc400_disable_filters(void); @@ -119,7 +120,7 @@ static inline void tzc_init(uintptr_t base) } static inline void tzc_configure_region0( - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int ns_device_access) { tzc400_configure_region0(sec_attr, ns_device_access); @@ -127,17 +128,17 @@ static inline void tzc_configure_region0( static inline void tzc_configure_region( unsigned int filters, - int region, + unsigned int region, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int ns_device_access) { tzc400_configure_region(filters, region, region_base, region_top, sec_attr, ns_device_access); } -static inline void tzc_set_action(tzc_action_t action) +static inline void tzc_set_action(unsigned int action) { tzc400_set_action(action); } @@ -155,4 +156,4 @@ static inline void tzc_disable_filters(void) #endif /* __ASSEMBLY__ */ -#endif /* __TZC400__ */ +#endif /* TZC400_H */ diff --git a/include/drivers/arm/tzc_common.h b/include/drivers/arm/tzc_common.h index bb64b008f..dac79aa44 100644 --- a/include/drivers/arm/tzc_common.h +++ b/include/drivers/arm/tzc_common.h @@ -1,11 +1,13 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC_COMMON_H__ -#define __TZC_COMMON_H__ +#ifndef TZC_COMMON_H +#define TZC_COMMON_H + +#include <utils_def.h> /* * Offset of core registers from the start of the base of configuration @@ -13,83 +15,83 @@ */ /* ID Registers */ -#define PID0_OFF 0xfe0 -#define PID1_OFF 0xfe4 -#define PID2_OFF 0xfe8 -#define PID3_OFF 0xfec -#define PID4_OFF 0xfd0 -#define CID0_OFF 0xff0 -#define CID1_OFF 0xff4 -#define CID2_OFF 0xff8 -#define CID3_OFF 0xffc +#define PID0_OFF U(0xfe0) +#define PID1_OFF U(0xfe4) +#define PID2_OFF U(0xfe8) +#define PID3_OFF U(0xfec) +#define PID4_OFF U(0xfd0) +#define CID0_OFF U(0xff0) +#define CID1_OFF U(0xff4) +#define CID2_OFF U(0xff8) +#define CID3_OFF U(0xffc) + +/* + * What type of action is expected when an access violation occurs. + * The memory requested is returned as zero. But we can also raise an event to + * let the system know it happened. + * We can raise an interrupt(INT) and/or cause an exception(ERR). + * TZC_ACTION_NONE - No interrupt, no Exception + * TZC_ACTION_ERR - No interrupt, raise exception -> sync external + * data abort + * TZC_ACTION_INT - Raise interrupt, no exception + * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync + * external data abort + */ +#define TZC_ACTION_NONE U(0) +#define TZC_ACTION_ERR U(1) +#define TZC_ACTION_INT U(2) +#define TZC_ACTION_ERR_INT (TZC_ACTION_ERR | TZC_ACTION_INT) /* Bit positions of TZC_ACTION registers */ #define TZC_ACTION_RV_SHIFT 0 -#define TZC_ACTION_RV_MASK 0x3 -#define TZC_ACTION_RV_LOWOK 0x0 -#define TZC_ACTION_RV_LOWERR 0x1 -#define TZC_ACTION_RV_HIGHOK 0x2 -#define TZC_ACTION_RV_HIGHERR 0x3 +#define TZC_ACTION_RV_MASK U(0x3) +#define TZC_ACTION_RV_LOWOK U(0x0) +#define TZC_ACTION_RV_LOWERR U(0x1) +#define TZC_ACTION_RV_HIGHOK U(0x2) +#define TZC_ACTION_RV_HIGHERR U(0x3) + +/* + * Controls secure access to a region. If not enabled secure access is not + * allowed to region. + */ +#define TZC_REGION_S_NONE U(0) +#define TZC_REGION_S_RD U(1) +#define TZC_REGION_S_WR U(2) +#define TZC_REGION_S_RDWR (TZC_REGION_S_RD | TZC_REGION_S_WR) -/* Used along with 'tzc_region_attributes_t' below */ #define TZC_REGION_ATTR_S_RD_SHIFT 30 #define TZC_REGION_ATTR_S_WR_SHIFT 31 #define TZC_REGION_ATTR_F_EN_SHIFT 0 #define TZC_REGION_ATTR_SEC_SHIFT 30 -#define TZC_REGION_ATTR_S_RD_MASK 0x1 -#define TZC_REGION_ATTR_S_WR_MASK 0x1 -#define TZC_REGION_ATTR_SEC_MASK 0x3 +#define TZC_REGION_ATTR_S_RD_MASK U(0x1) +#define TZC_REGION_ATTR_S_WR_MASK U(0x1) +#define TZC_REGION_ATTR_SEC_MASK U(0x3) #define TZC_REGION_ACCESS_WR_EN_SHIFT 16 #define TZC_REGION_ACCESS_RD_EN_SHIFT 0 -#define TZC_REGION_ACCESS_ID_MASK 0xf +#define TZC_REGION_ACCESS_ID_MASK U(0xf) /* Macros for allowing Non-Secure access to a region based on NSAID */ #define TZC_REGION_ACCESS_RD(nsaid) \ - ((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ + ((U(1) << (nsaid & TZC_REGION_ACCESS_ID_MASK)) << \ TZC_REGION_ACCESS_RD_EN_SHIFT) #define TZC_REGION_ACCESS_WR(nsaid) \ - ((1 << ((nsaid) & TZC_REGION_ACCESS_ID_MASK)) << \ + ((U(1) << (nsaid & TZC_REGION_ACCESS_ID_MASK)) << \ TZC_REGION_ACCESS_WR_EN_SHIFT) #define TZC_REGION_ACCESS_RDWR(nsaid) \ (TZC_REGION_ACCESS_RD(nsaid) | \ TZC_REGION_ACCESS_WR(nsaid)) -#ifndef __ASSEMBLY__ - /* Returns offset of registers to program for a given region no */ #define TZC_REGION_OFFSET(region_size, region_no) \ ((region_size) * (region_no)) -/* - * What type of action is expected when an access violation occurs. - * The memory requested is returned as zero. But we can also raise an event to - * let the system know it happened. - * We can raise an interrupt(INT) and/or cause an exception(ERR). - * TZC_ACTION_NONE - No interrupt, no Exception - * TZC_ACTION_ERR - No interrupt, raise exception -> sync external - * data abort - * TZC_ACTION_INT - Raise interrupt, no exception - * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync - * external data abort - */ -typedef enum { - TZC_ACTION_NONE = 0, - TZC_ACTION_ERR = 1, - TZC_ACTION_INT = 2, - TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) -} tzc_action_t; +#ifndef __ASSEMBLY__ -/* - * Controls secure access to a region. If not enabled secure access is not - * allowed to region. - */ -typedef enum { - TZC_REGION_S_NONE = 0, - TZC_REGION_S_RD = 1, - TZC_REGION_S_WR = 2, - TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR) -} tzc_region_attributes_t; +#if !ERROR_DEPRECATED +typedef unsigned int tzc_action_t; +typedef unsigned int tzc_region_attributes_t; +#endif #endif /* __ASSEMBLY__ */ -#endif /* __TZC_COMMON_H__ */ +#endif /* TZC_COMMON_H */ diff --git a/include/drivers/arm/tzc_dmc500.h b/include/drivers/arm/tzc_dmc500.h index ff58a2794..df6e7f949 100644 --- a/include/drivers/arm/tzc_dmc500.h +++ b/include/drivers/arm/tzc_dmc500.h @@ -1,38 +1,39 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __TZC_DMC500_H__ -#define __TZC_DMC500_H__ +#ifndef TZC_DMC500_H +#define TZC_DMC500_H #include <tzc_common.h> +#include <utils_def.h> -#define SI_STATUS_OFFSET 0x000 -#define SI_STATE_CTRL_OFFSET 0x030 -#define SI_FLUSH_CTRL_OFFSET 0x034 -#define SI_INT_CONTROL_OFFSET 0x048 +#define SI_STATUS_OFFSET U(0x000) +#define SI_STATE_CTRL_OFFSET U(0x030) +#define SI_FLUSH_CTRL_OFFSET U(0x034) +#define SI_INT_CONTROL_OFFSET U(0x048) -#define SI_INT_STATUS_OFFSET 0x004 -#define SI_TZ_FAIL_ADDRESS_LOW_OFFSET 0x008 -#define SI_TZ_FAIL_ADDRESS_HIGH_OFFSET 0x00c -#define SI_FAIL_CONTROL_OFFSET 0x010 -#define SI_FAIL_ID_OFFSET 0x014 -#define SI_INT_CLR_OFFSET 0x04c +#define SI_INT_STATUS_OFFSET U(0x004) +#define SI_TZ_FAIL_ADDRESS_LOW_OFFSET U(0x008) +#define SI_TZ_FAIL_ADDRESS_HIGH_OFFSET U(0x00c) +#define SI_FAIL_CONTROL_OFFSET U(0x010) +#define SI_FAIL_ID_OFFSET U(0x014) +#define SI_INT_CLR_OFFSET U(0x04c) /* * DMC-500 has 2 system interfaces each having a similar set of regs * to configure each interface. */ -#define SI0_BASE 0x0000 -#define SI1_BASE 0x0200 +#define SI0_BASE U(0x0000) +#define SI1_BASE U(0x0200) /* Bit positions of SIx_SI_STATUS */ -#define SI_EMPTY_SHIFT 0x01 -#define SI_STALL_ACK_SHIFT 0x00 -#define SI_EMPTY_MASK 0x01 -#define SI_STALL_ACK_MASK 0x01 +#define SI_EMPTY_SHIFT 1 +#define SI_STALL_ACK_SHIFT 0 +#define SI_EMPTY_MASK U(0x01) +#define SI_STALL_ACK_MASK U(0x01) /* Bit positions of SIx_SI_INT_STATUS */ #define PMU_REQ_INT_OVERFLOW_STATUS_SHIFT 18 @@ -40,11 +41,11 @@ #define PMU_REQ_INT_STATUS_SHIFT 2 #define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_SHIFT 1 #define FAILED_ACCESS_INT_STATUS_SHIFT 0 -#define PMU_REQ_INT_OVERFLOW_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_OVERFLOW_STATUS_MASK 0x1 -#define PMU_REQ_INT_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_MASK 0x1 -#define FAILED_ACCESS_INT_STATUS_MASK 0x1 +#define PMU_REQ_INT_OVERFLOW_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_OVERFLOW_STATUS_MASK U(0x1) +#define PMU_REQ_INT_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_TZ_OVERLAP_STATUS_MASK U(0x1) +#define FAILED_ACCESS_INT_STATUS_MASK U(0x1) /* Bit positions of SIx_TZ_FAIL_CONTROL */ #define DIRECTION_SHIFT 24 @@ -52,21 +53,21 @@ #define PRIVILEGED_SHIFT 20 #define FAILED_ACCESS_INT_INFO_RANK_MASKED_SHIFT 3 #define FAILED_ACCESS_INT_INFO_UNMAPPED_SHIFT 2 -#define FAILED_ACCESS_INT_TZ_FAIL_SHIFT 0x1 +#define FAILED_ACCESS_INT_TZ_FAIL_SHIFT 1 #define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_SHIFT 0 -#define DIRECTION_MASK 0x1 -#define NON_SECURE_MASK 0x1 -#define PRIVILEGED_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_RANK_MASKED_MASK 0x1 -#define FAILED_ACCESS_INT_INFO_UNMAPPED_MASK 0x1 -#define FAILED_ACCESS_INT_TZ_FAIL_MASK 1 -#define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_MASK 0x1 +#define DIRECTION_MASK U(0x1) +#define NON_SECURE_MASK U(0x1) +#define PRIVILEGED_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_RANK_MASKED_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_UNMAPPED_MASK U(0x1) +#define FAILED_ACCESS_INT_TZ_FAIL_MASK U(0x1) +#define FAILED_ACCESS_INT_INFO_OUTSIDE_DEFAULT_MASK U(0x1) /* Bit positions of SIx_FAIL_STATUS */ #define FAIL_ID_VNET_SHIFT 24 #define FAIL_ID_ID_SHIFT 0 -#define FAIL_ID_VNET_MASK 0xf -#define FAIL_ID_ID_MASK 0xffffff +#define FAIL_ID_VNET_MASK U(0xf) +#define FAIL_ID_ID_MASK U(0xffffff) /* Bit positions of SIx_SI_STATE_CONTRL */ #define SI_STALL_REQ_GO 0x0 @@ -81,44 +82,44 @@ #define PMU_REQ_INT_EN_SHIFT 2 #define OVERLAP_DETECT_INT_EN_SHIFT 1 #define FAILED_ACCESS_INT_EN_SHIFT 0 -#define PMU_REQ_INT_EN_MASK 0x1 -#define OVERLAP_DETECT_INT_EN_MASK 0x1 -#define FAILED_ACCESS_INT_EN_MASK 0x1 -#define PMU_REQ_INT_EN 0x1 -#define OVERLAP_DETECT_INT_EN 0x1 -#define FAILED_ACCESS_INT_EN 0x1 +#define PMU_REQ_INT_EN_MASK U(0x1) +#define OVERLAP_DETECT_INT_EN_MASK U(0x1) +#define FAILED_ACCESS_INT_EN_MASK U(0x1) +#define PMU_REQ_INT_EN U(0x1) +#define OVERLAP_DETECT_INT_EN U(0x1) +#define FAILED_ACCESS_INT_EN U(0x1) /* Bit positions of SIx_SI_INT_CLR */ #define PMU_REQ_OFLOW_CLR_SHIFT 18 #define FAILED_ACCESS_OFLOW_CLR_SHIFT 16 #define PMU_REQ_INT_CLR_SHIFT 2 #define FAILED_ACCESS_INT_CLR_SHIFT 0 -#define PMU_REQ_OFLOW_CLR_MASK 0x1 -#define FAILED_ACCESS_OFLOW_CLR_MASK 0x1 -#define PMU_REQ_INT_CLR_MASK 0x1 -#define FAILED_ACCESS_INT_CLR_MASK 0x1 -#define PMU_REQ_OFLOW_CLR 0x1 -#define FAILED_ACCESS_OFLOW_CLR 0x1 -#define PMU_REQ_INT_CLR 0x1 -#define FAILED_ACCESS_INT_CLR 0x1 +#define PMU_REQ_OFLOW_CLR_MASK U(0x1) +#define FAILED_ACCESS_OFLOW_CLR_MASK U(0x1) +#define PMU_REQ_INT_CLR_MASK U(0x1) +#define FAILED_ACCESS_INT_CLR_MASK U(0x1) +#define PMU_REQ_OFLOW_CLR U(0x1) +#define FAILED_ACCESS_OFLOW_CLR U(0x1) +#define PMU_REQ_INT_CLR U(0x1) +#define FAILED_ACCESS_INT_CLR U(0x1) /* Macro to get the correct base register for a system interface */ #define IFACE_OFFSET(sys_if) ((sys_if) ? SI1_BASE : SI0_BASE) -#define MAX_SYS_IF_COUNT 2 +#define MAX_SYS_IF_COUNT U(2) #define MAX_REGION_VAL 8 /* DMC-500 supports striping across a max of 4 DMC instances */ #define MAX_DMC_COUNT 4 /* Consist of part_number_1 and part_number_0 */ -#define DMC500_PERIPHERAL_ID 0x0450 +#define DMC500_PERIPHERAL_ID U(0x0450) /* Filter enable bits in a TZC */ -#define TZC_DMC500_REGION_ATTR_F_EN_MASK 0x1 +#define TZC_DMC500_REGION_ATTR_F_EN_MASK U(0x1) /* Length of registers for configuring each region */ -#define TZC_DMC500_REGION_SIZE 0x018 +#define TZC_DMC500_REGION_SIZE U(0x018) #ifndef __ASSEMBLY__ @@ -134,18 +135,17 @@ typedef struct tzc_dmc500_driver_data { } tzc_dmc500_driver_data_t; void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data); -void tzc_dmc500_configure_region0(tzc_region_attributes_t sec_attr, +void tzc_dmc500_configure_region0(unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc_dmc500_configure_region(int region_no, +void tzc_dmc500_configure_region(unsigned int region_no, unsigned long long region_base, unsigned long long region_top, - tzc_region_attributes_t sec_attr, + unsigned int sec_attr, unsigned int nsaid_permissions); -void tzc_dmc500_set_action(tzc_action_t action); +void tzc_dmc500_set_action(unsigned int action); void tzc_dmc500_config_complete(void); int tzc_dmc500_verify_complete(void); #endif /* __ASSEMBLY__ */ -#endif /* __TZC_DMC500_H__ */ - +#endif /* TZC_DMC500_H */ diff --git a/include/drivers/io/io_storage.h b/include/drivers/io/io_storage.h index 485ed8c0f..02308e3a2 100644 --- a/include/drivers/io/io_storage.h +++ b/include/drivers/io/io_storage.h @@ -22,6 +22,8 @@ typedef enum { IO_TYPE_DUMMY, IO_TYPE_FIRMWARE_IMAGE_PACKAGE, IO_TYPE_BLOCK, + IO_TYPE_MMC, + IO_TYPE_STM32IMAGE, IO_TYPE_MAX } io_type_t; diff --git a/include/drivers/meson/meson_console.h b/include/drivers/meson/meson_console.h new file mode 100644 index 000000000..759571dda --- /dev/null +++ b/include/drivers/meson/meson_console.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MESON_CONSOLE_H +#define MESON_CONSOLE_H + +#include <console.h> + +#define CONSOLE_T_MESON_BASE CONSOLE_T_DRVDATA + +#ifndef __ASSEMBLY__ + +#include <stdint.h> + +typedef struct { + console_t console; + uintptr_t base; +} console_meson_t; + +/* + * Initialize a new meson console instance and register it with the console + * framework. The |console| pointer must point to storage that will be valid + * for the lifetime of the console, such as a global or static local variable. + * Its contents will be reinitialized from scratch. + * + * NOTE: The clock is actually fixed to 24 MHz. The argument is only there in + * order to make this function future-proof. + */ +int console_meson_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud, + console_meson_t *console); + +#endif /*__ASSEMBLY__*/ + +#endif /* MESON_CONSOLE_H */ diff --git a/include/drivers/st/io_mmc.h b/include/drivers/st/io_mmc.h new file mode 100644 index 000000000..de71e7d8a --- /dev/null +++ b/include/drivers/st/io_mmc.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IO_MMC_H +#define IO_MMC_H + +#include <io_driver.h> + +int register_io_dev_mmc(const io_dev_connector_t **dev_con); + +#endif /* IO_MMC_H */ diff --git a/include/drivers/st/io_stm32image.h b/include/drivers/st/io_stm32image.h new file mode 100644 index 000000000..b66821960 --- /dev/null +++ b/include/drivers/st/io_stm32image.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IO_STM32IMAGE_H +#define IO_STM32IMAGE_H + +#include <io_driver.h> +#include <partition.h> + +#define MAX_LBA_SIZE 512 +#define MAX_PART_NAME_SIZE (EFI_NAMELEN + 1) +#define STM32_PART_NUM (PLAT_PARTITION_MAX_ENTRIES - STM32_TF_A_COPIES) + +struct stm32image_part_info { + char name[MAX_PART_NAME_SIZE]; + uint32_t binary_type; + uintptr_t part_offset; + uint32_t bkp_offset; +}; + +struct stm32image_device_info { + struct stm32image_part_info part_info[STM32_PART_NUM]; + uint32_t device_size; + uint32_t lba_size; +}; + +int register_io_dev_stm32image(const io_dev_connector_t **dev_con); + +#endif /* IO_STM32IMAGE_H */ diff --git a/include/drivers/st/stm32_sdmmc2.h b/include/drivers/st/stm32_sdmmc2.h new file mode 100644 index 000000000..b17265926 --- /dev/null +++ b/include/drivers/st/stm32_sdmmc2.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef STM32_SDMMC2_H +#define STM32_SDMMC2_H + +#include <mmc.h> +#include <stdbool.h> + +struct stm32_sdmmc2_params { + uintptr_t reg_base; + unsigned int clk_rate; + unsigned int bus_width; + unsigned int flags; + struct mmc_device_info *device_info; + unsigned int pin_ckin; + unsigned int negedge; + unsigned int dirpol; + unsigned int clock_id; + unsigned int reset_id; + bool use_dma; +}; + +unsigned long long stm32_sdmmc2_mmc_get_device_size(void); +int stm32_sdmmc2_mmc_init(struct stm32_sdmmc2_params *params); +bool plat_sdmmc2_use_dma(unsigned int instance, unsigned int memory); + +#endif /* STM32_SDMMC2_H */ diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index a6022cb01..e6842e148 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -218,6 +218,8 @@ /* SCR definitions */ #define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5)) #define SCR_FIEN_BIT (U(1) << 21) +#define SCR_API_BIT (U(1) << 17) +#define SCR_APK_BIT (U(1) << 16) #define SCR_TWE_BIT (U(1) << 13) #define SCR_TWI_BIT (U(1) << 12) #define SCR_ST_BIT (U(1) << 11) @@ -274,6 +276,8 @@ #define VTTBR_BADDR_SHIFT U(0) /* HCR definitions */ +#define HCR_API_BIT (ULL(1) << 41) +#define HCR_APK_BIT (ULL(1) << 40) #define HCR_RW_SHIFT U(31) #define HCR_RW_BIT (ULL(1) << HCR_RW_SHIFT) #define HCR_AMO_BIT (ULL(1) << 5) diff --git a/include/lib/cpus/aarch32/cpu_macros.S b/include/lib/cpus/aarch32/cpu_macros.S index 525e18caf..aa728b241 100644 --- a/include/lib/cpus/aarch32/cpu_macros.S +++ b/include/lib/cpus/aarch32/cpu_macros.S @@ -161,10 +161,9 @@ .endif /* - * Weakly-bound, optional errata status printing function for CPUs of + * Mandatory errata status printing function for CPUs of * this class. */ - .weak \_name\()_errata_report .word \_name\()_errata_report #ifdef IMAGE_BL32 diff --git a/include/lib/cpus/aarch64/cortex_a75.h b/include/lib/cpus/aarch64/cortex_a75.h index 493c7d472..f68f98f63 100644 --- a/include/lib/cpus/aarch64/cortex_a75.h +++ b/include/lib/cpus/aarch64/cortex_a75.h @@ -4,11 +4,13 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __CORTEX_A75_H__ -#define __CORTEX_A75_H__ +#ifndef CORTEX_A75_H +#define CORTEX_A75_H + +#include <utils_def.h> /* Cortex-A75 MIDR */ -#define CORTEX_A75_MIDR 0x410fd0a0 +#define CORTEX_A75_MIDR U(0x410fd0a0) /******************************************************************************* * CPU Extended Control register specific definitions. @@ -24,7 +26,7 @@ #define CORTEX_A75_CPUACTLR_EL1_DISABLE_LOAD_PASS_STORE (1 << 35) /* Definitions of register field mask in CORTEX_A75_CPUPWRCTLR_EL1 */ -#define CORTEX_A75_CORE_PWRDN_EN_MASK 0x1 +#define CORTEX_A75_CORE_PWRDN_EN_MASK U(0x1) #define CORTEX_A75_ACTLR_AMEN_BIT (U(1) << 4) @@ -50,4 +52,4 @@ void cortex_a75_amu_write_cpuamcntenset_el0(unsigned int mask); void cortex_a75_amu_write_cpuamcntenclr_el0(unsigned int mask); #endif /* __ASSEMBLY__ */ -#endif /* __CORTEX_A75_H__ */ +#endif /* CORTEX_A75_H */ diff --git a/include/lib/cpus/aarch64/cortex_ares.h b/include/lib/cpus/aarch64/cortex_ares.h index 84955b181..4f3e81296 100644 --- a/include/lib/cpus/aarch64/cortex_ares.h +++ b/include/lib/cpus/aarch64/cortex_ares.h @@ -4,11 +4,13 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __CORTEX_ARES_H__ -#define __CORTEX_ARES_H__ +#ifndef CORTEX_ARES_H +#define CORTEX_ARES_H + +#include <utils_def.h> /* Cortex-ARES MIDR for revision 0 */ -#define CORTEX_ARES_MIDR 0x410fd0c0 +#define CORTEX_ARES_MIDR U(0x410fd0c0) /******************************************************************************* * CPU Extended Control register specific definitions. @@ -17,7 +19,7 @@ #define CORTEX_ARES_CPUECTLR_EL1 S3_0_C15_C1_4 /* Definitions of register field mask in CORTEX_ARES_CPUPWRCTLR_EL1 */ -#define CORTEX_ARES_CORE_PWRDN_EN_MASK 0x1 +#define CORTEX_ARES_CORE_PWRDN_EN_MASK U(0x1) #define CORTEX_ARES_ACTLR_AMEN_BIT (U(1) << 4) @@ -30,4 +32,4 @@ #define CPUPOR_EL3 S3_6_C15_C8_2 #define CPUPMR_EL3 S3_6_C15_C8_3 -#endif /* __CORTEX_ARES_H__ */ +#endif /* CORTEX_ARES_H */ diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index 4672cbc06..14616ace4 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -183,10 +183,9 @@ .endif /* - * Weakly-bound, optional errata status printing function for CPUs of + * Mandatory errata status printing function for CPUs of * this class. */ - .weak \_name\()_errata_report .quad \_name\()_errata_report #ifdef IMAGE_BL31 diff --git a/include/lib/cpus/aarch64/cpuamu.h b/include/lib/cpus/aarch64/cpuamu.h index 960a52484..921abdbd4 100644 --- a/include/lib/cpus/aarch64/cpuamu.h +++ b/include/lib/cpus/aarch64/cpuamu.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __CPUAMU_H__ -#define __CPUAMU_H__ +#ifndef CPUAMU_H +#define CPUAMU_H /******************************************************************************* * CPU Activity Monitor Unit register specific definitions. @@ -32,8 +32,8 @@ #ifndef __ASSEMBLY__ #include <stdint.h> -uint64_t cpuamu_cnt_read(int idx); -void cpuamu_cnt_write(int idx, uint64_t val); +uint64_t cpuamu_cnt_read(unsigned int idx); +void cpuamu_cnt_write(unsigned int idx, uint64_t val); unsigned int cpuamu_read_cpuamcntenset_el0(void); unsigned int cpuamu_read_cpuamcntenclr_el0(void); void cpuamu_write_cpuamcntenset_el0(unsigned int mask); @@ -45,4 +45,4 @@ void cpuamu_context_restore(unsigned int nr_counters); #endif /* __ASSEMBLY__ */ -#endif /* __CPUAMU_H__ */ +#endif /* CPUAMU_H */ diff --git a/include/lib/cpus/errata_report.h b/include/lib/cpus/errata_report.h index d2138bf55..c97d4c247 100644 --- a/include/lib/cpus/errata_report.h +++ b/include/lib/cpus/errata_report.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __ERRATA_H__ -#define __ERRATA_H__ +#ifndef ERRATA_REPORT_H +#define ERRATA_REPORT_H #ifndef __ASSEMBLY__ @@ -30,5 +30,4 @@ int errata_needs_reporting(spinlock_t *lock, uint32_t *reported); #define ERRATA_APPLIES 1 #define ERRATA_MISSING 2 -#endif /* __ERRATA_H__ */ - +#endif /* ERRATA_REPORT_H */ diff --git a/include/lib/cpus/wa_cve_2017_5715.h b/include/lib/cpus/wa_cve_2017_5715.h index 0a65a5692..940fc659e 100644 --- a/include/lib/cpus/wa_cve_2017_5715.h +++ b/include/lib/cpus/wa_cve_2017_5715.h @@ -4,9 +4,9 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __WA_CVE_2017_5715_H__ -#define __WA_CVE_2017_5715_H__ +#ifndef WA_CVE_2017_5715_H +#define WA_CVE_2017_5715_H int check_wa_cve_2017_5715(void); -#endif /* __WA_CVE_2017_5715_H__ */ +#endif /* WA_CVE_2017_5715_H */ diff --git a/include/lib/cpus/wa_cve_2018_3639.h b/include/lib/cpus/wa_cve_2018_3639.h index 36546f70d..e37db377e 100644 --- a/include/lib/cpus/wa_cve_2018_3639.h +++ b/include/lib/cpus/wa_cve_2018_3639.h @@ -4,9 +4,9 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __WA_CVE_2018_3639_H__ -#define __WA_CVE_2018_3639_H__ +#ifndef WA_CVE_2018_3639_H +#define WA_CVE_2018_3639_H void *wa_cve_2018_3639_get_disable_ptr(void); -#endif /* __WA_CVE_2018_3639_H__ */ +#endif /* WA_CVE_2018_3639_H */ diff --git a/include/lib/el3_runtime/cpu_data.h b/include/lib/el3_runtime/cpu_data.h index 15d34ebf8..b6959509c 100644 --- a/include/lib/el3_runtime/cpu_data.h +++ b/include/lib/el3_runtime/cpu_data.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __CPU_DATA_H__ -#define __CPU_DATA_H__ +#ifndef CPU_DATA_H +#define CPU_DATA_H #include <ehf.h> #include <platform_def.h> /* CACHE_WRITEBACK_GRANULE required */ @@ -161,4 +161,4 @@ void init_cpu_ops(void); #endif /* __ASSEMBLY__ */ -#endif /* __CPU_DATA_H__ */ +#endif /* CPU_DATA_H */ diff --git a/include/lib/extensions/amu.h b/include/lib/extensions/amu.h index 46d5e1593..1836fe5ae 100644 --- a/include/lib/extensions/amu.h +++ b/include/lib/extensions/amu.h @@ -4,33 +4,35 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __AMU_H__ -#define __AMU_H__ +#ifndef AMU_H +#define AMU_H #include <cassert.h> #include <platform_def.h> +#include <stdbool.h> #include <stdint.h> +#include <utils_def.h> /* All group 0 counters */ -#define AMU_GROUP0_COUNTERS_MASK 0xf +#define AMU_GROUP0_COUNTERS_MASK U(0xf) #ifdef PLAT_AMU_GROUP1_COUNTERS_MASK #define AMU_GROUP1_COUNTERS_MASK PLAT_AMU_GROUP1_COUNTERS_MASK #else -#define AMU_GROUP1_COUNTERS_MASK 0 +#define AMU_GROUP1_COUNTERS_MASK U(0) #endif #ifdef PLAT_AMU_GROUP1_NR_COUNTERS #define AMU_GROUP1_NR_COUNTERS PLAT_AMU_GROUP1_NR_COUNTERS #else -#define AMU_GROUP1_NR_COUNTERS 0 +#define AMU_GROUP1_NR_COUNTERS U(0) #endif CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask); CASSERT(AMU_GROUP1_NR_COUNTERS <= 16, invalid_amu_group1_nr_counters); -int amu_supported(void); -void amu_enable(int el2_unused); +bool amu_supported(void); +void amu_enable(bool el2_unused); /* Group 0 configuration helpers */ uint64_t amu_group0_cnt_read(int idx); @@ -41,4 +43,4 @@ uint64_t amu_group1_cnt_read(int idx); void amu_group1_cnt_write(int idx, uint64_t val); void amu_group1_set_evtype(int idx, unsigned int val); -#endif /* __AMU_H__ */ +#endif /* AMU_H */ diff --git a/include/lib/extensions/amu_private.h b/include/lib/extensions/amu_private.h index 0c660bb83..ab4e6aaba 100644 --- a/include/lib/extensions/amu_private.h +++ b/include/lib/extensions/amu_private.h @@ -1,19 +1,19 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __AMU_PRIVATE_H__ -#define __AMU_PRIVATE_H__ +#ifndef AMU_PRIVATE_H +#define AMU_PRIVATE_H #include <stdint.h> uint64_t amu_group0_cnt_read_internal(int idx); -void amu_group0_cnt_write_internal(int idx, uint64_t); +void amu_group0_cnt_write_internal(int idx, uint64_t val); uint64_t amu_group1_cnt_read_internal(int idx); -void amu_group1_cnt_write_internal(int idx, uint64_t); +void amu_group1_cnt_write_internal(int idx, uint64_t val); void amu_group1_set_evtype_internal(int idx, unsigned int val); -#endif /* __AMU_PRIVATE_H__ */ +#endif /* AMU_PRIVATE_H */ diff --git a/include/lib/extensions/mpam.h b/include/lib/extensions/mpam.h index 571b96b65..ac8c00a43 100644 --- a/include/lib/extensions/mpam.h +++ b/include/lib/extensions/mpam.h @@ -10,6 +10,6 @@ #include <stdbool.h> bool mpam_supported(void); -void mpam_enable(int el2_unused); +void mpam_enable(bool el2_unused); #endif /* MPAM_H */ diff --git a/include/lib/extensions/spe.h b/include/lib/extensions/spe.h index b2b188ef5..d4b925fe4 100644 --- a/include/lib/extensions/spe.h +++ b/include/lib/extensions/spe.h @@ -4,11 +4,13 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __SPE_H__ -#define __SPE_H__ +#ifndef SPE_H +#define SPE_H -int spe_supported(void); -void spe_enable(int el2_unused); +#include <stdbool.h> + +bool spe_supported(void); +void spe_enable(bool el2_unused); void spe_disable(void); -#endif /* __SPE_H__ */ +#endif /* SPE_H */ diff --git a/include/lib/extensions/sve.h b/include/lib/extensions/sve.h index 9c7f37f26..83df1775e 100644 --- a/include/lib/extensions/sve.h +++ b/include/lib/extensions/sve.h @@ -4,10 +4,12 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __SVE_H__ -#define __SVE_H__ +#ifndef SVE_H +#define SVE_H -int sve_supported(void); -void sve_enable(int el2_unused); +#include <stdbool.h> -#endif /* __SVE_H__ */ +bool sve_supported(void); +void sve_enable(bool el2_unused); + +#endif /* SVE_H */ diff --git a/include/lib/libc/string.h b/include/lib/libc/string.h index 050f64380..3c8e3b65e 100644 --- a/include/lib/libc/string.h +++ b/include/lib/libc/string.h @@ -27,5 +27,6 @@ char *strchr(const char *s, int c); void *memset(void *dst, int val, size_t count); size_t strlen(const char *s); size_t strnlen(const char *s, size_t maxlen); +char *strrchr(const char *p, int ch); #endif /* STRING_H */ diff --git a/include/lib/libfdt/fdt.h b/include/lib/libfdt/fdt.h index c833dc1b7..74961f902 100644 --- a/include/lib/libfdt/fdt.h +++ b/include/lib/libfdt/fdt.h @@ -1,5 +1,5 @@ -#ifndef _FDT_H -#define _FDT_H +#ifndef FDT_H +#define FDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -52,16 +52,8 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * Portions copyright (c) 2016-2017, ARM Limited and Contributors. - * All rights reserved. - */ - #ifndef __ASSEMBLY__ -#include <libfdt_env.h> - - struct fdt_header { fdt32_t magic; /* magic word FDT_MAGIC */ fdt32_t totalsize; /* total size of DT block */ @@ -88,14 +80,14 @@ struct fdt_reserve_entry { struct fdt_node_header { fdt32_t tag; - char name[]; + char name[0]; }; struct fdt_property { fdt32_t tag; fdt32_t len; fdt32_t nameoff; - char data[]; + char data[0]; }; #endif /* !__ASSEMBLY */ @@ -116,4 +108,4 @@ struct fdt_property { #define FDT_V16_SIZE FDT_V3_SIZE #define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t)) -#endif /* _FDT_H */ +#endif /* FDT_H */ diff --git a/include/lib/libfdt/libfdt.h b/include/lib/libfdt/libfdt.h index f66237857..830b77e4b 100644 --- a/include/lib/libfdt/libfdt.h +++ b/include/lib/libfdt/libfdt.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_H -#define _LIBFDT_H +#ifndef LIBFDT_H +#define LIBFDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -51,22 +51,17 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * Portions copyright (c) 2016-2017, ARM Limited and Contributors. - * All rights reserved. - */ - #include <libfdt_env.h> #include <fdt.h> -#define FDT_FIRST_SUPPORTED_VERSION 0x10 +#define FDT_FIRST_SUPPORTED_VERSION 0x02 #define FDT_LAST_SUPPORTED_VERSION 0x11 /* Error codes: informative error codes */ #define FDT_ERR_NOTFOUND 1 /* FDT_ERR_NOTFOUND: The requested node or property does not exist */ #define FDT_ERR_EXISTS 2 - /* FDT_ERR_EXISTS: Attemped to create a node or property which + /* FDT_ERR_EXISTS: Attempted to create a node or property which * already exists */ #define FDT_ERR_NOSPACE 3 /* FDT_ERR_NOSPACE: Operation needed to expand the device @@ -84,8 +79,10 @@ * (e.g. missing a leading / for a function which requires an * absolute path) */ #define FDT_ERR_BADPHANDLE 6 - /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle - * value. phandle values of 0 and -1 are not permitted. */ + /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle. + * This can be caused either by an invalid phandle property + * length, or the phandle value was either 0 or -1, which are + * not permitted. */ #define FDT_ERR_BADSTATE 7 /* FDT_ERR_BADSTATE: Function was passed an incomplete device * tree created by the sequential-write functions, which is @@ -93,8 +90,9 @@ /* Error codes: codes for bad device tree blobs */ #define FDT_ERR_TRUNCATED 8 - /* FDT_ERR_TRUNCATED: Structure block of the given device tree - * ends without an FDT_END tag. */ + /* FDT_ERR_TRUNCATED: FDT or a sub-block is improperly + * terminated (overflows, goes outside allowed bounds, or + * isn't properly terminated). */ #define FDT_ERR_BADMAGIC 9 /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a * device tree at all - it is missing the flattened device @@ -131,13 +129,24 @@ * value. For example: a property expected to contain a string list * is not NUL-terminated within the length of its value. */ -#define FDT_ERR_MAX 15 +#define FDT_ERR_BADOVERLAY 16 + /* FDT_ERR_BADOVERLAY: The device tree overlay, while + * correctly structured, cannot be applied due to some + * unexpected or missing value, property or node. */ + +#define FDT_ERR_NOPHANDLES 17 + /* FDT_ERR_NOPHANDLES: The device tree doesn't have any + * phandle available anymore without causing an overflow */ + +#define FDT_ERR_MAX 17 /**********************************************************************/ /* Low-level functions (you probably don't need these) */ /**********************************************************************/ +#ifndef SWIG /* This function is not useful in Python */ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen); +#endif static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) { return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen); @@ -145,6 +154,29 @@ static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); +/* + * Alignment helpers: + * These helpers access words from a device tree blob. They're + * built to work even with unaligned pointers on platforms (ike + * ARM) that don't like unaligned loads and stores + */ + +static inline uint32_t fdt32_ld(const fdt32_t *p) +{ + fdt32_t v; + + memcpy(&v, p, sizeof(v)); + return fdt32_to_cpu(v); +} + +static inline uint64_t fdt64_ld(const fdt64_t *p) +{ + fdt64_t v; + + memcpy(&v, p, sizeof(v)); + return fdt64_to_cpu(v); +} + /**********************************************************************/ /* Traversal functions */ /**********************************************************************/ @@ -204,9 +236,8 @@ int fdt_next_subnode(const void *fdt, int offset); /**********************************************************************/ /* General functions */ /**********************************************************************/ - #define fdt_get_header(fdt, field) \ - (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) + (fdt32_ld(&((const struct fdt_header *)(fdt))->field)) #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) #define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct)) @@ -218,37 +249,50 @@ int fdt_next_subnode(const void *fdt, int offset); #define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings)) #define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct)) -#define __fdt_set_hdr(name) \ +#define fdt_set_hdr_(name) \ static inline void fdt_set_##name(void *fdt, uint32_t val) \ { \ struct fdt_header *fdth = (struct fdt_header *)fdt; \ fdth->name = cpu_to_fdt32(val); \ } -__fdt_set_hdr(magic) -__fdt_set_hdr(totalsize) -__fdt_set_hdr(off_dt_struct) -__fdt_set_hdr(off_dt_strings) -__fdt_set_hdr(off_mem_rsvmap) -__fdt_set_hdr(version) -__fdt_set_hdr(last_comp_version) -__fdt_set_hdr(boot_cpuid_phys) -__fdt_set_hdr(size_dt_strings) -__fdt_set_hdr(size_dt_struct) -#undef __fdt_set_hdr - -/** - * fdt_check_header - sanity check a device tree or possible device tree +fdt_set_hdr_(magic); +fdt_set_hdr_(totalsize); +fdt_set_hdr_(off_dt_struct); +fdt_set_hdr_(off_dt_strings); +fdt_set_hdr_(off_mem_rsvmap); +fdt_set_hdr_(version); +fdt_set_hdr_(last_comp_version); +fdt_set_hdr_(boot_cpuid_phys); +fdt_set_hdr_(size_dt_strings); +fdt_set_hdr_(size_dt_struct); +#undef fdt_set_hdr_ + +/** + * fdt_header_size - return the size of the tree's header + * @fdt: pointer to a flattened device tree + */ +size_t fdt_header_size_(uint32_t version); +static inline size_t fdt_header_size(const void *fdt) +{ + return fdt_header_size_(fdt_version(fdt)); +} + +/** + * fdt_check_header - sanity check a device tree header + * @fdt: pointer to data which might be a flattened device tree * * fdt_check_header() checks that the given buffer contains what - * appears to be a flattened device tree with sane information in its - * header. + * appears to be a flattened device tree, and that the header contains + * valid information (to the extent that can be determined from the + * header alone). * * returns: * 0, if the buffer appears to contain a valid device tree * -FDT_ERR_BADMAGIC, * -FDT_ERR_BADVERSION, - * -FDT_ERR_BADSTATE, standard meanings, as above + * -FDT_ERR_BADSTATE, + * -FDT_ERR_TRUNCATED, standard meanings, as above */ int fdt_check_header(const void *fdt); @@ -277,6 +321,24 @@ int fdt_move(const void *fdt, void *buf, int bufsize); /* Read-only functions */ /**********************************************************************/ +int fdt_check_full(const void *fdt, size_t bufsize); + +/** + * fdt_get_string - retrieve a string from the strings block of a device tree + * @fdt: pointer to the device tree blob + * @stroffset: offset of the string within the strings block (native endian) + * @lenp: optional pointer to return the string's length + * + * fdt_get_string() retrieves a pointer to a single string from the + * strings block of the device tree blob at fdt, and optionally also + * returns the string's length in *lenp. + * + * returns: + * a pointer to the string, on success + * NULL, if stroffset is out of bounds, or doesn't point to a valid string + */ +const char *fdt_get_string(const void *fdt, int stroffset, int *lenp); + /** * fdt_string - retrieve a string from the strings block of a device tree * @fdt: pointer to the device tree blob @@ -287,7 +349,7 @@ int fdt_move(const void *fdt, void *buf, int bufsize); * * returns: * a pointer to the string, on success - * NULL, if stroffset is out of bounds + * NULL, if stroffset is out of bounds, or doesn't point to a valid string */ const char *fdt_string(const void *fdt, int stroffset); @@ -348,8 +410,10 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size); * useful for finding subnodes based on a portion of a larger string, * such as a full path. */ +#ifndef SWIG /* Not available in Python */ int fdt_subnode_offset_namelen(const void *fdt, int parentoffset, const char *name, int namelen); +#endif /** * fdt_subnode_offset - find a subnode of a given node * @fdt: pointer to the device tree blob @@ -385,7 +449,9 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name); * Identical to fdt_path_offset(), but only consider the first namelen * characters of path as the path name. */ +#ifndef SWIG /* Not available in Python */ int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen); +#endif /** * fdt_path_offset - find a tree node by its full path @@ -516,6 +582,9 @@ int fdt_next_property_offset(const void *fdt, int offset); * offset. If lenp is non-NULL, the length of the property value is * also returned, in the integer pointed to by lenp. * + * Note that this code only works on device tree versions >= 16. fdt_getprop() + * works on all versions. + * * returns: * pointer to the structure representing the property * if lenp is non-NULL, *lenp contains the length of the property @@ -544,10 +613,12 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, * Identical to fdt_get_property(), but only examine the first namelen * characters of name for matching the property name. */ +#ifndef SWIG /* Not available in Python */ const struct fdt_property *fdt_get_property_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp); +#endif /** * fdt_get_property - find a given property in a given node @@ -618,8 +689,10 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, * -FDT_ERR_BADSTRUCTURE, * -FDT_ERR_TRUNCATED, standard meanings */ +#ifndef SWIG /* This function is not useful in Python */ const void *fdt_getprop_by_offset(const void *fdt, int offset, const char **namep, int *lenp); +#endif /** * fdt_getprop_namelen - get property value based on substring @@ -632,6 +705,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, * Identical to fdt_getprop(), but only examine the first namelen * characters of name for matching the property name. */ +#ifndef SWIG /* Not available in Python */ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp); static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset, @@ -641,6 +715,7 @@ static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset, return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name, namelen, lenp); } +#endif /** * fdt_getprop - retrieve the value of a given property @@ -701,11 +776,13 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); * Identical to fdt_get_alias(), but only examine the first namelen * characters of name for matching the alias name. */ +#ifndef SWIG /* Not available in Python */ const char *fdt_get_alias_namelen(const void *fdt, const char *name, int namelen); +#endif /** - * fdt_get_alias - retreive the path referenced by a given alias + * fdt_get_alias - retrieve the path referenced by a given alias * @fdt: pointer to the device tree blob * @name: name of the alias th look up * @@ -1068,7 +1145,7 @@ int fdt_address_cells(const void *fdt, int nodeoffset); * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 2, if the node has no #address-cells property + * 2, if the node has no #size-cells property * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #size-cells property * -FDT_ERR_BADMAGIC, @@ -1100,10 +1177,12 @@ int fdt_size_cells(const void *fdt, int nodeoffset); * of the name. It is useful when you want to manipulate only one value of * an array and you have a string that doesn't end with \0. */ +#ifndef SWIG /* Not available in Python */ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, const char *name, int namelen, uint32_t idx, const void *val, int len); +#endif /** * fdt_setprop_inplace - change a property's value, but not its size @@ -1133,8 +1212,10 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, * -FDT_ERR_BADSTRUCTURE, * -FDT_ERR_TRUNCATED, standard meanings */ +#ifndef SWIG /* Not available in Python */ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, const void *val, int len); +#endif /** * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property @@ -1287,10 +1368,29 @@ static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val) fdt64_t tmp = cpu_to_fdt64(val); return fdt_property(fdt, name, &tmp, sizeof(tmp)); } + +#ifndef SWIG /* Not available in Python */ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val) { return fdt_property_u32(fdt, name, val); } +#endif + +/** + * fdt_property_placeholder - add a new property and return a ptr to its value + * + * @fdt: pointer to the device tree blob + * @name: name of property to add + * @len: length of property value in bytes + * @valp: returns a pointer to where where the value should be placed + * + * returns: + * 0, on success + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_NOSPACE, standard meanings + */ +int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp); + #define fdt_property_string(fdt, name, str) \ fdt_property(fdt, name, str, strlen(str)+1) int fdt_end_node(void *fdt); @@ -1410,6 +1510,37 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, const void *val, int len); /** + * fdt_setprop_placeholder - allocate space for a property + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * @len: length of the property value + * @prop_data: return pointer to property data + * + * fdt_setprop_placeholer() allocates the named property in the given node. + * If the property exists it is resized. In either case a pointer to the + * property data is returned. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, + int len, void **prop_data); + +/** * fdt_setprop_u32 - set a property to a 32-bit integer * @fdt: pointer to the device tree blob * @nodeoffset: offset of the node whose property to change @@ -1521,6 +1652,36 @@ static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, #define fdt_setprop_string(fdt, nodeoffset, name, str) \ fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) + +/** + * fdt_setprop_empty - set a property to an empty value + * @fdt: pointer to the device tree blob + * @nodeoffset: offset of the node whose property to change + * @name: name of the property to change + * + * fdt_setprop_empty() sets the value of the named property in the + * given node to an empty (zero length) value, or creates a new empty + * property if it does not already exist. + * + * This function may insert or delete data from the blob, and will + * therefore change the offsets of some existing nodes. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to + * contain the new property value + * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_TRUNCATED, standard meanings + */ +#define fdt_setprop_empty(fdt, nodeoffset, name) \ + fdt_setprop((fdt), (nodeoffset), (name), NULL, 0) + /** * fdt_appendprop - append to or create a property * @fdt: pointer to the device tree blob @@ -1698,8 +1859,10 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name); * creating subnodes based on a portion of a larger string, such as a * full path. */ +#ifndef SWIG /* Not available in Python */ int fdt_add_subnode_namelen(void *fdt, int parentoffset, const char *name, int namelen); +#endif /** * fdt_add_subnode - creates a new node @@ -1757,10 +1920,41 @@ int fdt_add_subnode(void *fdt, int parentoffset, const char *name); */ int fdt_del_node(void *fdt, int nodeoffset); +/** + * fdt_overlay_apply - Applies a DT overlay on a base DT + * @fdt: pointer to the base device tree blob + * @fdto: pointer to the device tree overlay blob + * + * fdt_overlay_apply() will apply the given device tree overlay on the + * given base device tree. + * + * Expect the base device tree to be modified, even if the function + * returns an error. + * + * returns: + * 0, on success + * -FDT_ERR_NOSPACE, there's not enough space in the base device tree + * -FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or + * properties in the base DT + * -FDT_ERR_BADPHANDLE, + * -FDT_ERR_BADOVERLAY, + * -FDT_ERR_NOPHANDLES, + * -FDT_ERR_INTERNAL, + * -FDT_ERR_BADLAYOUT, + * -FDT_ERR_BADMAGIC, + * -FDT_ERR_BADOFFSET, + * -FDT_ERR_BADPATH, + * -FDT_ERR_BADVERSION, + * -FDT_ERR_BADSTRUCTURE, + * -FDT_ERR_BADSTATE, + * -FDT_ERR_TRUNCATED, standard meanings + */ +int fdt_overlay_apply(void *fdt, void *fdto); + /**********************************************************************/ /* Debugging / informational functions */ /**********************************************************************/ const char *fdt_strerror(int errval); -#endif /* _LIBFDT_H */ +#endif /* LIBFDT_H */ diff --git a/include/lib/libfdt/libfdt_env.h b/include/lib/libfdt/libfdt_env.h index 9dea97dff..eb2053845 100644 --- a/include/lib/libfdt/libfdt_env.h +++ b/include/lib/libfdt/libfdt_env.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_ENV_H -#define _LIBFDT_ENV_H +#ifndef LIBFDT_ENV_H +#define LIBFDT_ENV_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -54,19 +54,21 @@ #include <stddef.h> #include <stdint.h> +#include <stdlib.h> #include <string.h> +#include <limits.h> #ifdef __CHECKER__ -#define __force __attribute__((force)) -#define __bitwise __attribute__((bitwise)) +#define FDT_FORCE __attribute__((force)) +#define FDT_BITWISE __attribute__((bitwise)) #else -#define __force -#define __bitwise +#define FDT_FORCE +#define FDT_BITWISE #endif -typedef uint16_t __bitwise fdt16_t; -typedef uint32_t __bitwise fdt32_t; -typedef uint64_t __bitwise fdt64_t; +typedef uint16_t FDT_BITWISE fdt16_t; +typedef uint32_t FDT_BITWISE fdt32_t; +typedef uint64_t FDT_BITWISE fdt64_t; #define EXTRACT_BYTE(x, n) ((unsigned long long)((uint8_t *)&x)[n]) #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1)) @@ -79,33 +81,60 @@ typedef uint64_t __bitwise fdt64_t; static inline uint16_t fdt16_to_cpu(fdt16_t x) { - return (__force uint16_t)CPU_TO_FDT16(x); + return (FDT_FORCE uint16_t)CPU_TO_FDT16(x); } static inline fdt16_t cpu_to_fdt16(uint16_t x) { - return (__force fdt16_t)CPU_TO_FDT16(x); + return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x); } static inline uint32_t fdt32_to_cpu(fdt32_t x) { - return (__force uint32_t)CPU_TO_FDT32(x); + return (FDT_FORCE uint32_t)CPU_TO_FDT32(x); } static inline fdt32_t cpu_to_fdt32(uint32_t x) { - return (__force fdt32_t)CPU_TO_FDT32(x); + return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x); } static inline uint64_t fdt64_to_cpu(fdt64_t x) { - return (__force uint64_t)CPU_TO_FDT64(x); + return (FDT_FORCE uint64_t)CPU_TO_FDT64(x); } static inline fdt64_t cpu_to_fdt64(uint64_t x) { - return (__force fdt64_t)CPU_TO_FDT64(x); + return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x); } #undef CPU_TO_FDT64 #undef CPU_TO_FDT32 #undef CPU_TO_FDT16 #undef EXTRACT_BYTE -#endif /* _LIBFDT_ENV_H */ +#ifdef __APPLE__ +#include <AvailabilityMacros.h> + +/* strnlen() is not available on Mac OS < 10.7 */ +# if !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < \ + MAC_OS_X_VERSION_10_7) + +#define strnlen fdt_strnlen + +/* + * fdt_strnlen: returns the length of a string or max_count - which ever is + * smallest. + * Input 1 string: the string whose size is to be determined + * Input 2 max_count: the maximum value returned by this function + * Output: length of the string or max_count (the smallest of the two) + */ +static inline size_t fdt_strnlen(const char *string, size_t max_count) +{ + const char *p = memchr(string, 0, max_count); + return p ? p - string : max_count; +} + +#endif /* !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < + MAC_OS_X_VERSION_10_7) */ + +#endif /* __APPLE__ */ + +#endif /* LIBFDT_ENV_H */ diff --git a/include/lib/pmf/pmf.h b/include/lib/pmf/pmf.h index a3812fbf2..18ef0a559 100644 --- a/include/lib/pmf/pmf.h +++ b/include/lib/pmf/pmf.h @@ -9,17 +9,18 @@ #include <cassert.h> #include <pmf_helpers.h> +#include <utils_def.h> /* * Constants used for/by PMF services. */ -#define PMF_ARM_TIF_IMPL_ID 0x41 +#define PMF_ARM_TIF_IMPL_ID U(0x41) #define PMF_TID_SHIFT 0 -#define PMF_TID_MASK (0xFF << PMF_TID_SHIFT) +#define PMF_TID_MASK (U(0xFF) << PMF_TID_SHIFT) #define PMF_SVC_ID_SHIFT 10 -#define PMF_SVC_ID_MASK (0x3F << PMF_SVC_ID_SHIFT) +#define PMF_SVC_ID_MASK (U(0x3F) << PMF_SVC_ID_SHIFT) #define PMF_IMPL_ID_SHIFT 24 -#define PMF_IMPL_ID_MASK (0xFFU << PMF_IMPL_ID_SHIFT) +#define PMF_IMPL_ID_MASK (U(0xFF) << PMF_IMPL_ID_SHIFT) /* * Flags passed to PMF_REGISTER_SERVICE @@ -37,16 +38,16 @@ /* * Defines for PMF SMC function ids. */ -#define PMF_SMC_GET_TIMESTAMP_32 0x82000010u -#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010u +#define PMF_SMC_GET_TIMESTAMP_32 U(0x82000010) +#define PMF_SMC_GET_TIMESTAMP_64 U(0xC2000010) #define PMF_NUM_SMC_CALLS 2 /* * The macros below are used to identify * PMF calls from the SMC function ID. */ -#define PMF_FID_MASK 0xffe0u -#define PMF_FID_VALUE 0u +#define PMF_FID_MASK U(0xffe0) +#define PMF_FID_VALUE U(0) #define is_pmf_fid(_fid) (((_fid) & PMF_FID_MASK) == PMF_FID_VALUE) /* Following are the supported PMF service IDs */ diff --git a/include/lib/pmf/pmf_asm_macros.S b/include/lib/pmf/pmf_asm_macros.S index d58829eec..5e19e62f7 100644 --- a/include/lib/pmf/pmf_asm_macros.S +++ b/include/lib/pmf/pmf_asm_macros.S @@ -18,10 +18,12 @@ mov x9, x30 bl plat_my_core_pos mov x30, x9 - ldr x1, =__PERCPU_TIMESTAMP_SIZE__ + adr x2, __PMF_PERCPU_TIMESTAMP_END__ + adr x1, __PMF_TIMESTAMP_START__ + sub x1, x2, x1 mov x2, #(\_tid * PMF_TS_SIZE) madd x0, x0, x1, x2 - ldr x1, =pmf_ts_mem_\_name + adr x1, pmf_ts_mem_\_name add x0, x0, x1 .endm diff --git a/include/lib/pmf/pmf_helpers.h b/include/lib/pmf/pmf_helpers.h index b9757de07..c535b222d 100644 --- a/include/lib/pmf/pmf_helpers.h +++ b/include/lib/pmf/pmf_helpers.h @@ -11,7 +11,6 @@ #include <assert.h> #include <bl_common.h> #include <platform.h> -#include <pmf.h> #include <stddef.h> #include <stdint.h> diff --git a/include/lib/utils.h b/include/lib/utils.h index d46d8461d..f324a9909 100644 --- a/include/lib/utils.h +++ b/include/lib/utils.h @@ -67,6 +67,29 @@ void zero_normalmem(void *mem, u_register_t length); * zeroing. */ void zeromem(void *mem, u_register_t length); + +/* + * Utility function to return the address of a symbol. By default, the + * compiler generates adr/adrp instruction pair to return the reference + * to the symbol and this utility is used to override this compiler + * generated to code to use `ldr` instruction. + * + * This helps when Position Independent Executable needs to reference a symbol + * which is constant and does not depend on the execute address of the binary. + */ +#define DEFINE_LOAD_SYM_ADDR(_name) \ +static inline u_register_t load_addr_## _name(void) \ +{ \ + u_register_t v; \ + /* Create a void reference to silence compiler */ \ + (void) _name; \ + __asm__ volatile ("ldr %0, =" #_name : "=r" (v)); \ + return v; \ +} + +/* Helper to invoke the function defined by DEFINE_LOAD_SYM_ADDR() */ +#define LOAD_ADDR_OF(_name) (typeof(_name) *) load_addr_## _name() + #endif /* !(defined(__LINKER__) || defined(__ASSEMBLY__)) */ #endif /* __UTILS_H__ */ diff --git a/include/lib/xlat_tables/xlat_tables_compat.h b/include/lib/xlat_tables/xlat_tables_compat.h new file mode 100644 index 000000000..4650a8c6f --- /dev/null +++ b/include/lib/xlat_tables/xlat_tables_compat.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#if XLAT_TABLES_LIB_V2 +#include <xlat_tables_v2.h> +#else +#include <xlat_tables.h> +#endif diff --git a/include/plat/arm/board/common/v2m_def.h b/include/plat/arm/board/common/v2m_def.h index 02c349418..4a1d43c85 100644 --- a/include/plat/arm/board/common/v2m_def.h +++ b/include/plat/arm/board/common/v2m_def.h @@ -6,8 +6,7 @@ #ifndef V2M_DEF_H #define V2M_DEF_H -#include <arm_xlat_tables.h> - +#include <xlat_tables_compat.h> /* V2M motherboard system registers & offsets */ #define V2M_SYSREGS_BASE UL(0x1c010000) diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index d5f5c15a4..0f5b57f4f 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -53,9 +53,9 @@ #define ARM_DRAM_ID 2 /* The first 4KB of Trusted SRAM are used as shared memory */ -#define ARM_TRUSTED_SRAM_BASE 0x04000000 +#define ARM_TRUSTED_SRAM_BASE UL(0x04000000) #define ARM_SHARED_RAM_BASE ARM_TRUSTED_SRAM_BASE -#define ARM_SHARED_RAM_SIZE 0x00001000 /* 4 KB */ +#define ARM_SHARED_RAM_SIZE UL(0x00001000) /* 4 KB */ /* The remaining Trusted SRAM is used to load the BL images */ #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ @@ -68,7 +68,7 @@ * - SCP TZC DRAM: If present, DRAM reserved for SCP use * - AP TZC DRAM: The remaining TZC secured DRAM reserved for AP use */ -#define ARM_TZC_DRAM1_SIZE ULL(0x01000000) +#define ARM_TZC_DRAM1_SIZE UL(0x01000000) #define ARM_SCP_TZC_DRAM1_BASE (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - \ @@ -84,7 +84,7 @@ * placed here. */ #define ARM_EL3_TZC_DRAM1_BASE (ARM_SCP_TZC_DRAM1_BASE - ARM_EL3_TZC_DRAM1_SIZE) -#define ARM_EL3_TZC_DRAM1_SIZE ULL(0x00200000) /* 2 MB */ +#define ARM_EL3_TZC_DRAM1_SIZE UL(0x00200000) /* 2 MB */ #define ARM_EL3_TZC_DRAM1_END (ARM_EL3_TZC_DRAM1_BASE + \ ARM_EL3_TZC_DRAM1_SIZE - 1) @@ -122,7 +122,7 @@ #define ARM_OPTEE_PAGEABLE_LOAD_BASE (ARM_AP_TZC_DRAM1_BASE + \ ARM_AP_TZC_DRAM1_SIZE - \ ARM_OPTEE_PAGEABLE_LOAD_SIZE) -#define ARM_OPTEE_PAGEABLE_LOAD_SIZE 0x400000 +#define ARM_OPTEE_PAGEABLE_LOAD_SIZE UL(0x400000) #define ARM_OPTEE_PAGEABLE_LOAD_MEM MAP_REGION_FLAT( \ ARM_OPTEE_PAGEABLE_LOAD_BASE, \ ARM_OPTEE_PAGEABLE_LOAD_SIZE, \ @@ -144,12 +144,12 @@ #define ARM_NS_DRAM1_END (ARM_NS_DRAM1_BASE + \ ARM_NS_DRAM1_SIZE - 1) -#define ARM_DRAM1_BASE ULL(0x80000000) -#define ARM_DRAM1_SIZE ULL(0x80000000) +#define ARM_DRAM1_BASE UL(0x80000000) +#define ARM_DRAM1_SIZE UL(0x80000000) #define ARM_DRAM1_END (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - 1) -#define ARM_DRAM2_BASE ULL(0x880000000) +#define ARM_DRAM2_BASE UL(0x880000000) #define ARM_DRAM2_SIZE PLAT_ARM_DRAM2_SIZE #define ARM_DRAM2_END (ARM_DRAM2_BASE + \ ARM_DRAM2_SIZE - 1) @@ -293,16 +293,16 @@ ARM_BL_REGIONS) /* Memory mapped Generic timer interfaces */ -#define ARM_SYS_CNTCTL_BASE 0x2a430000 -#define ARM_SYS_CNTREAD_BASE 0x2a800000 -#define ARM_SYS_TIMCTL_BASE 0x2a810000 -#define ARM_SYS_CNT_BASE_S 0x2a820000 -#define ARM_SYS_CNT_BASE_NS 0x2a830000 +#define ARM_SYS_CNTCTL_BASE UL(0x2a430000) +#define ARM_SYS_CNTREAD_BASE UL(0x2a800000) +#define ARM_SYS_TIMCTL_BASE UL(0x2a810000) +#define ARM_SYS_CNT_BASE_S UL(0x2a820000) +#define ARM_SYS_CNT_BASE_NS UL(0x2a830000) #define ARM_CONSOLE_BAUDRATE 115200 /* Trusted Watchdog constants */ -#define ARM_SP805_TWDG_BASE 0x2a490000 +#define ARM_SP805_TWDG_BASE UL(0x2a490000) #define ARM_SP805_TWDG_CLK_HZ 32768 /* The TBBR document specifies a watchdog timeout of 256 seconds. SP805 * asserts reset after two consecutive countdowns (2 x 128 = 256 sec) */ @@ -344,7 +344,7 @@ * This is known only to the platform as it might have a combination of * integrated and external caches. */ -#define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) +#define CACHE_WRITEBACK_GRANULE (U(1) << ARM_CACHE_WRITEBACK_SHIFT) /* * To enable TB_FW_CONFIG to be loaded by BL1, define the corresponding base diff --git a/include/plat/arm/common/arm_sip_svc.h b/include/plat/arm/common/arm_sip_svc.h index 68375afae..3e25cbc6a 100644 --- a/include/plat/arm/common/arm_sip_svc.h +++ b/include/plat/arm/common/arm_sip_svc.h @@ -1,24 +1,26 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __ARM_SIP_SVC_H__ -#define __ARM_SIP_SVC_H__ +#ifndef ARM_SIP_SVC_H +#define ARM_SIP_SVC_H + +#include <utils_def.h> /* SMC function IDs for SiP Service queries */ -#define ARM_SIP_SVC_CALL_COUNT 0x8200ff00 -#define ARM_SIP_SVC_UID 0x8200ff01 -/* 0x8200ff02 is reserved */ -#define ARM_SIP_SVC_VERSION 0x8200ff03 +#define ARM_SIP_SVC_CALL_COUNT U(0x8200ff00) +#define ARM_SIP_SVC_UID U(0x8200ff01) +/* U(0x8200ff02) is reserved */ +#define ARM_SIP_SVC_VERSION U(0x8200ff03) /* Function ID for requesting state switch of lower EL */ -#define ARM_SIP_SVC_EXE_STATE_SWITCH 0x82000020 +#define ARM_SIP_SVC_EXE_STATE_SWITCH U(0x82000020) /* ARM SiP Service Calls version numbers */ -#define ARM_SIP_SVC_VERSION_MAJOR 0x0 -#define ARM_SIP_SVC_VERSION_MINOR 0x2 +#define ARM_SIP_SVC_VERSION_MAJOR U(0x0) +#define ARM_SIP_SVC_VERSION_MINOR U(0x2) -#endif /* __ARM_SIP_SVC_H__ */ +#endif /* ARM_SIP_SVC_H */ diff --git a/include/plat/arm/common/arm_xlat_tables.h b/include/plat/arm/common/arm_xlat_tables.h deleted file mode 100644 index 0923ad8a1..000000000 --- a/include/plat/arm/common/arm_xlat_tables.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#if ARM_XLAT_TABLES_LIB_V1 -#include <xlat_tables.h> -#else -#include <xlat_tables_v2.h> -#endif /* ARM_XLAT_TABLES_LIB_V1 */ diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index 848f4eea8..e7082d080 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -3,10 +3,9 @@ * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __PLAT_ARM_H__ -#define __PLAT_ARM_H__ +#ifndef PLAT_ARM_H +#define PLAT_ARM_H -#include <arm_xlat_tables.h> #include <bakery_lock.h> #include <cassert.h> #include <cpu_data.h> @@ -14,6 +13,7 @@ #include <spinlock.h> #include <tzc_common.h> #include <utils_def.h> +#include <xlat_tables_compat.h> /******************************************************************************* * Forward declarations @@ -25,7 +25,7 @@ struct bl_params; typedef struct arm_tzc_regions_info { unsigned long long base; unsigned long long end; - tzc_region_attributes_t sec_attr; + unsigned int sec_attr; unsigned int nsaid_permissions; } arm_tzc_regions_info_t; @@ -66,12 +66,6 @@ typedef struct arm_tzc_regions_info { <= MAX_MMAP_REGIONS, \ assert_max_mmap_regions); -/* - * Utility functions common to ARM standard platforms - */ -void arm_setup_page_tables(const mmap_region_t bl_regions[], - const mmap_region_t plat_regions[]); - void arm_setup_romlib(void); #if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32)) @@ -298,4 +292,4 @@ extern plat_psci_ops_t plat_arm_psci_pm_ops; extern const mmap_region_t plat_arm_mmap[]; extern const unsigned int arm_pm_idle_states[]; -#endif /* __PLAT_ARM_H__ */ +#endif /* PLAT_ARM_H */ diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h index 048c58a31..385331977 100644 --- a/include/plat/arm/css/common/css_def.h +++ b/include/plat/arm/css/common/css_def.h @@ -26,6 +26,11 @@ #define SSC_REG_BASE 0x2a420000 #define SSC_GPRETN (SSC_REG_BASE + 0x030) +/* System ID Registers Unit */ +#define SID_REG_BASE 0x2a4a0000 +#define SID_SYSTEM_ID_OFFSET 0x40 +#define SID_SYSTEM_CFG_OFFSET 0x70 + /* The slave_bootsecure controls access to GPU, DMC and CS. */ #define CSS_NIC400_SLAVE_BOOTSECURE 8 @@ -123,6 +128,8 @@ #define SSC_VERSION_DESIGNER_ID_MASK 0xff #define SSC_VERSION_PART_NUM_MASK 0xfff +#define SID_SYSTEM_ID_PART_NUM_MASK 0xfff + /* SSC debug configuration registers */ #define SSC_DBGCFG_SET 0x14 #define SSC_DBGCFG_CLR 0x18 |