diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/lib/cpus/aarch32/cpu_macros.S | 13 | ||||
-rw-r--r-- | include/lib/cpus/aarch64/cpu_macros.S | 14 | ||||
-rw-r--r-- | include/plat/arm/board/common/board_arm_def.h | 62 | ||||
-rw-r--r-- | include/plat/arm/board/common/board_css_def.h | 11 | ||||
-rw-r--r-- | include/plat/arm/common/arm_def.h | 7 |
5 files changed, 44 insertions, 63 deletions
diff --git a/include/lib/cpus/aarch32/cpu_macros.S b/include/lib/cpus/aarch32/cpu_macros.S index 7703be339..525e18caf 100644 --- a/include/lib/cpus/aarch32/cpu_macros.S +++ b/include/lib/cpus/aarch32/cpu_macros.S @@ -214,5 +214,18 @@ bl errata_print_msg .endm #endif + /* + * Helper macro that reads the part number of the current CPU and jumps + * to the given label if it matches the CPU MIDR provided. + * + * Clobbers: r0-r1 + */ + .macro jump_if_cpu_midr _cpu_midr, _label + ldcopr r0, MIDR + ubfx r0, r0, #MIDR_PN_SHIFT, #12 + ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK) + cmp r0, r1 + beq \_label + .endm #endif /* __CPU_MACROS_S__ */ diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index 026a48e32..4672cbc06 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -272,3 +272,17 @@ cmp \_reg, #1 beq \_label .endm + + /* + * Helper macro that reads the part number of the current + * CPU and jumps to the given label if it matches the CPU + * MIDR provided. + * + * Clobbers x0. + */ + .macro jump_if_cpu_midr _cpu_midr, _label + mrs x0, midr_el1 + ubfx x0, x0, MIDR_PN_SHIFT, #12 + cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK) + b.eq \_label + .endm diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h deleted file mode 100644 index a9272080b..000000000 --- a/include/plat/arm/board/common/board_arm_def.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef __BOARD_ARM_DEF_H__ -#define __BOARD_ARM_DEF_H__ - -#include <v2m_def.h> - -/* - * Required platform porting definitions common to all ARM - * development platforms - */ - -/* Size of cacheable stacks */ -#if defined(IMAGE_BL1) -#if TRUSTED_BOARD_BOOT -# define PLATFORM_STACK_SIZE 0x1000 -#else -# define PLATFORM_STACK_SIZE 0x440 -#endif -#elif defined(IMAGE_BL2) -# if TRUSTED_BOARD_BOOT -# define PLATFORM_STACK_SIZE 0x1000 -# else -# define PLATFORM_STACK_SIZE 0x400 -# endif -#elif defined(IMAGE_BL2U) -# define PLATFORM_STACK_SIZE 0x400 -#elif defined(IMAGE_BL31) -#if ENABLE_SPM -# define PLATFORM_STACK_SIZE 0x500 -#elif PLAT_XLAT_TABLES_DYNAMIC -# define PLATFORM_STACK_SIZE 0x800 -#else -# define PLATFORM_STACK_SIZE 0x400 -#endif -#elif defined(IMAGE_BL32) -# define PLATFORM_STACK_SIZE 0x440 -#endif - -#define MAX_IO_DEVICES 3 -#define MAX_IO_HANDLES 4 - -#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */ - -/* Reserve the last block of flash for PSCI MEM PROTECT flag */ -#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE -#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) - -#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE -#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) - -/* - * Map mem_protect flash region with read and write permissions - */ -#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ - V2M_FLASH_BLOCK_SIZE, \ - MT_DEVICE | MT_RW | MT_SECURE) - -#endif /* __BOARD_ARM_DEF_H__ */ diff --git a/include/plat/arm/board/common/board_css_def.h b/include/plat/arm/board/common/board_css_def.h index b0a6baf35..1a80e165b 100644 --- a/include/plat/arm/board/common/board_css_def.h +++ b/include/plat/arm/board/common/board_css_def.h @@ -40,6 +40,16 @@ #endif /* __ASSEMBLY__ */ +#define MAX_IO_DEVICES 3 +#define MAX_IO_HANDLES 4 + +/* Reserve the last block of flash for PSCI MEM PROTECT flag */ +#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE +#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) + +#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE +#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE) + /* * Required platform porting definitions common to all ARM CSS-based * development platforms @@ -63,6 +73,5 @@ #define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE #define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ - #endif /* __BOARD_CSS_DEF_H__ */ diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 8d81af960..d5f5c15a4 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -277,6 +277,13 @@ #endif /* + * Map mem_protect flash region with read and write permissions + */ +#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \ + V2M_FLASH_BLOCK_SIZE, \ + MT_DEVICE | MT_RW | MT_SECURE) + +/* * The max number of regions like RO(code), coherent and data required by * different BL stages which need to be mapped in the MMU. */ |