diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/aarch64/el3_common_macros.S | 8 | ||||
| -rw-r--r-- | include/drivers/arm/tzc_dmc500.h | 1 | ||||
| -rw-r--r-- | include/lib/cpus/aarch64/cpu_macros.S | 1 | ||||
| -rw-r--r-- | include/plat/arm/common/plat_arm.h | 43 | ||||
| -rw-r--r-- | include/plat/common/common_def.h | 10 |
5 files changed, 57 insertions, 6 deletions
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S index 4ebf77bbf..d5f527aa3 100644 --- a/include/common/aarch64/el3_common_macros.S +++ b/include/common/aarch64/el3_common_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -278,8 +278,8 @@ * an earlier boot loader stage. * ------------------------------------------------------------- */ - adr x0, __RW_START__ - adr x1, __RW_END__ + ldr x0, =__RW_START__ + ldr x1, =__RW_END__ sub x1, x1, x0 bl inv_dcache_range #endif @@ -294,7 +294,7 @@ bl zeromem #endif -#ifdef IMAGE_BL1 +#if defined(IMAGE_BL1) || (defined(IMAGE_BL2) && BL2_IN_XIP_MEM) ldr x0, =__DATA_RAM_START__ ldr x1, =__DATA_ROM_START__ ldr x2, =__DATA_SIZE__ diff --git a/include/drivers/arm/tzc_dmc500.h b/include/drivers/arm/tzc_dmc500.h index 2606d1bee..ff58a2794 100644 --- a/include/drivers/arm/tzc_dmc500.h +++ b/include/drivers/arm/tzc_dmc500.h @@ -130,6 +130,7 @@ typedef struct tzc_dmc500_driver_data { uintptr_t dmc_base[MAX_DMC_COUNT]; int dmc_count; + unsigned int sys_if_count; } tzc_dmc500_driver_data_t; void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data); diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S index 8f0a74f0a..bfe2449e9 100644 --- a/include/lib/cpus/aarch64/cpu_macros.S +++ b/include/lib/cpus/aarch64/cpu_macros.S @@ -230,6 +230,7 @@ CPU_OPS_SIZE = . /* Check whether errata applies */ mov x0, \_rev_var + /* Shall clobber: x0-x7 */ bl check_errata_\_id .ifeq \_chosen diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h index b0db8f08f..f79450ce9 100644 --- a/include/plat/arm/common/plat_arm.h +++ b/include/plat/arm/common/plat_arm.h @@ -11,6 +11,7 @@ #include <cassert.h> #include <cpu_data.h> #include <stdint.h> +#include <tzc_common.h> #include <utils_def.h> /******************************************************************************* @@ -21,6 +22,43 @@ struct meminfo; struct image_info; struct bl_params; +typedef struct arm_tzc_regions_info { + unsigned long long base; + unsigned long long end; + tzc_region_attributes_t sec_attr; + unsigned int nsaid_permissions; +} arm_tzc_regions_info_t; + +/******************************************************************************* + * Default mapping definition of the TrustZone Controller for ARM standard + * platforms. + * Configure: + * - Region 0 with no access; + * - Region 1 with secure access only; + * - the remaining DRAM regions access from the given Non-Secure masters. + ******************************************************************************/ +#if ENABLE_SPM +#define ARM_TZC_REGIONS_DEF \ + {ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \ + TZC_REGION_S_RDWR, 0}, \ + {ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \ + PLAT_ARM_TZC_NS_DEV_ACCESS}, \ + {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \ + PLAT_ARM_TZC_NS_DEV_ACCESS}, \ + {ARM_SP_IMAGE_NS_BUF_BASE, (ARM_SP_IMAGE_NS_BUF_BASE + \ + ARM_SP_IMAGE_NS_BUF_SIZE) - 1, TZC_REGION_S_NONE, \ + PLAT_ARM_TZC_NS_DEV_ACCESS} + +#else +#define ARM_TZC_REGIONS_DEF \ + {ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \ + TZC_REGION_S_RDWR, 0}, \ + {ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS, \ + PLAT_ARM_TZC_NS_DEV_ACCESS}, \ + {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \ + PLAT_ARM_TZC_NS_DEV_ACCESS} +#endif + #define ARM_CASSERT_MMAP \ CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \ <= MAX_MMAP_REGIONS, \ @@ -110,9 +148,10 @@ void arm_setup_page_tables(uintptr_t total_base, void arm_io_setup(void); /* Security utility functions */ -void arm_tzc400_setup(void); +void arm_tzc400_setup(const arm_tzc_regions_info_t *tzc_regions); struct tzc_dmc500_driver_data; -void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data); +void arm_tzc_dmc500_setup(struct tzc_dmc500_driver_data *plat_driver_data, + const arm_tzc_regions_info_t *tzc_regions); /* Systimer utility function */ void arm_configure_sys_timer(void); diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h index 84923b9a7..827d416f3 100644 --- a/include/plat/common/common_def.h +++ b/include/plat/common/common_def.h @@ -78,9 +78,19 @@ #define BL1_CODE_END BL_CODE_END #define BL1_RO_DATA_BASE BL_RO_DATA_BASE #define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE) +#if BL2_IN_XIP_MEM +#define BL2_CODE_END BL_CODE_END +#define BL2_RO_DATA_BASE BL_RO_DATA_BASE +#define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE) +#endif /* BL2_IN_XIP_MEM */ #else #define BL_RO_DATA_BASE 0 #define BL_RO_DATA_END 0 #define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE) +#if BL2_IN_XIP_MEM +#define BL2_RO_DATA_BASE 0 +#define BL2_RO_DATA_END 0 +#define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE) +#endif /* BL2_IN_XIP_MEM */ #endif /* SEPARATE_CODE_AND_RODATA */ #endif /* __COMMON_DEF_H__ */ |