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-rw-r--r--include/lib/cpus/aarch64/cortex_a75.h12
-rw-r--r--include/lib/cpus/aarch64/cortex_ares.h12
-rw-r--r--include/lib/cpus/aarch64/cpuamu.h10
-rw-r--r--include/lib/cpus/errata_report.h7
-rw-r--r--include/lib/cpus/wa_cve_2017_5715.h6
-rw-r--r--include/lib/cpus/wa_cve_2018_3639.h6
-rw-r--r--include/lib/el3_runtime/cpu_data.h6
-rw-r--r--include/lib/extensions/amu.h18
-rw-r--r--include/lib/extensions/amu_private.h12
-rw-r--r--include/lib/extensions/mpam.h2
-rw-r--r--include/lib/extensions/spe.h12
-rw-r--r--include/lib/extensions/sve.h12
-rw-r--r--include/lib/pmf/pmf.h17
-rw-r--r--include/lib/pmf/pmf_helpers.h1
-rw-r--r--include/plat/arm/common/arm_sip_svc.h24
-rw-r--r--include/plat/arm/common/plat_arm.h6
16 files changed, 87 insertions, 76 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a75.h b/include/lib/cpus/aarch64/cortex_a75.h
index 493c7d472..f68f98f63 100644
--- a/include/lib/cpus/aarch64/cortex_a75.h
+++ b/include/lib/cpus/aarch64/cortex_a75.h
@@ -4,11 +4,13 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_A75_H__
-#define __CORTEX_A75_H__
+#ifndef CORTEX_A75_H
+#define CORTEX_A75_H
+
+#include <utils_def.h>
/* Cortex-A75 MIDR */
-#define CORTEX_A75_MIDR 0x410fd0a0
+#define CORTEX_A75_MIDR U(0x410fd0a0)
/*******************************************************************************
* CPU Extended Control register specific definitions.
@@ -24,7 +26,7 @@
#define CORTEX_A75_CPUACTLR_EL1_DISABLE_LOAD_PASS_STORE (1 << 35)
/* Definitions of register field mask in CORTEX_A75_CPUPWRCTLR_EL1 */
-#define CORTEX_A75_CORE_PWRDN_EN_MASK 0x1
+#define CORTEX_A75_CORE_PWRDN_EN_MASK U(0x1)
#define CORTEX_A75_ACTLR_AMEN_BIT (U(1) << 4)
@@ -50,4 +52,4 @@ void cortex_a75_amu_write_cpuamcntenset_el0(unsigned int mask);
void cortex_a75_amu_write_cpuamcntenclr_el0(unsigned int mask);
#endif /* __ASSEMBLY__ */
-#endif /* __CORTEX_A75_H__ */
+#endif /* CORTEX_A75_H */
diff --git a/include/lib/cpus/aarch64/cortex_ares.h b/include/lib/cpus/aarch64/cortex_ares.h
index 84955b181..4f3e81296 100644
--- a/include/lib/cpus/aarch64/cortex_ares.h
+++ b/include/lib/cpus/aarch64/cortex_ares.h
@@ -4,11 +4,13 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CORTEX_ARES_H__
-#define __CORTEX_ARES_H__
+#ifndef CORTEX_ARES_H
+#define CORTEX_ARES_H
+
+#include <utils_def.h>
/* Cortex-ARES MIDR for revision 0 */
-#define CORTEX_ARES_MIDR 0x410fd0c0
+#define CORTEX_ARES_MIDR U(0x410fd0c0)
/*******************************************************************************
* CPU Extended Control register specific definitions.
@@ -17,7 +19,7 @@
#define CORTEX_ARES_CPUECTLR_EL1 S3_0_C15_C1_4
/* Definitions of register field mask in CORTEX_ARES_CPUPWRCTLR_EL1 */
-#define CORTEX_ARES_CORE_PWRDN_EN_MASK 0x1
+#define CORTEX_ARES_CORE_PWRDN_EN_MASK U(0x1)
#define CORTEX_ARES_ACTLR_AMEN_BIT (U(1) << 4)
@@ -30,4 +32,4 @@
#define CPUPOR_EL3 S3_6_C15_C8_2
#define CPUPMR_EL3 S3_6_C15_C8_3
-#endif /* __CORTEX_ARES_H__ */
+#endif /* CORTEX_ARES_H */
diff --git a/include/lib/cpus/aarch64/cpuamu.h b/include/lib/cpus/aarch64/cpuamu.h
index 960a52484..921abdbd4 100644
--- a/include/lib/cpus/aarch64/cpuamu.h
+++ b/include/lib/cpus/aarch64/cpuamu.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CPUAMU_H__
-#define __CPUAMU_H__
+#ifndef CPUAMU_H
+#define CPUAMU_H
/*******************************************************************************
* CPU Activity Monitor Unit register specific definitions.
@@ -32,8 +32,8 @@
#ifndef __ASSEMBLY__
#include <stdint.h>
-uint64_t cpuamu_cnt_read(int idx);
-void cpuamu_cnt_write(int idx, uint64_t val);
+uint64_t cpuamu_cnt_read(unsigned int idx);
+void cpuamu_cnt_write(unsigned int idx, uint64_t val);
unsigned int cpuamu_read_cpuamcntenset_el0(void);
unsigned int cpuamu_read_cpuamcntenclr_el0(void);
void cpuamu_write_cpuamcntenset_el0(unsigned int mask);
@@ -45,4 +45,4 @@ void cpuamu_context_restore(unsigned int nr_counters);
#endif /* __ASSEMBLY__ */
-#endif /* __CPUAMU_H__ */
+#endif /* CPUAMU_H */
diff --git a/include/lib/cpus/errata_report.h b/include/lib/cpus/errata_report.h
index d2138bf55..c97d4c247 100644
--- a/include/lib/cpus/errata_report.h
+++ b/include/lib/cpus/errata_report.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ERRATA_H__
-#define __ERRATA_H__
+#ifndef ERRATA_REPORT_H
+#define ERRATA_REPORT_H
#ifndef __ASSEMBLY__
@@ -30,5 +30,4 @@ int errata_needs_reporting(spinlock_t *lock, uint32_t *reported);
#define ERRATA_APPLIES 1
#define ERRATA_MISSING 2
-#endif /* __ERRATA_H__ */
-
+#endif /* ERRATA_REPORT_H */
diff --git a/include/lib/cpus/wa_cve_2017_5715.h b/include/lib/cpus/wa_cve_2017_5715.h
index 0a65a5692..940fc659e 100644
--- a/include/lib/cpus/wa_cve_2017_5715.h
+++ b/include/lib/cpus/wa_cve_2017_5715.h
@@ -4,9 +4,9 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __WA_CVE_2017_5715_H__
-#define __WA_CVE_2017_5715_H__
+#ifndef WA_CVE_2017_5715_H
+#define WA_CVE_2017_5715_H
int check_wa_cve_2017_5715(void);
-#endif /* __WA_CVE_2017_5715_H__ */
+#endif /* WA_CVE_2017_5715_H */
diff --git a/include/lib/cpus/wa_cve_2018_3639.h b/include/lib/cpus/wa_cve_2018_3639.h
index 36546f70d..e37db377e 100644
--- a/include/lib/cpus/wa_cve_2018_3639.h
+++ b/include/lib/cpus/wa_cve_2018_3639.h
@@ -4,9 +4,9 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __WA_CVE_2018_3639_H__
-#define __WA_CVE_2018_3639_H__
+#ifndef WA_CVE_2018_3639_H
+#define WA_CVE_2018_3639_H
void *wa_cve_2018_3639_get_disable_ptr(void);
-#endif /* __WA_CVE_2018_3639_H__ */
+#endif /* WA_CVE_2018_3639_H */
diff --git a/include/lib/el3_runtime/cpu_data.h b/include/lib/el3_runtime/cpu_data.h
index 15d34ebf8..b6959509c 100644
--- a/include/lib/el3_runtime/cpu_data.h
+++ b/include/lib/el3_runtime/cpu_data.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __CPU_DATA_H__
-#define __CPU_DATA_H__
+#ifndef CPU_DATA_H
+#define CPU_DATA_H
#include <ehf.h>
#include <platform_def.h> /* CACHE_WRITEBACK_GRANULE required */
@@ -161,4 +161,4 @@ void init_cpu_ops(void);
#endif /* __ASSEMBLY__ */
-#endif /* __CPU_DATA_H__ */
+#endif /* CPU_DATA_H */
diff --git a/include/lib/extensions/amu.h b/include/lib/extensions/amu.h
index 46d5e1593..1836fe5ae 100644
--- a/include/lib/extensions/amu.h
+++ b/include/lib/extensions/amu.h
@@ -4,33 +4,35 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AMU_H__
-#define __AMU_H__
+#ifndef AMU_H
+#define AMU_H
#include <cassert.h>
#include <platform_def.h>
+#include <stdbool.h>
#include <stdint.h>
+#include <utils_def.h>
/* All group 0 counters */
-#define AMU_GROUP0_COUNTERS_MASK 0xf
+#define AMU_GROUP0_COUNTERS_MASK U(0xf)
#ifdef PLAT_AMU_GROUP1_COUNTERS_MASK
#define AMU_GROUP1_COUNTERS_MASK PLAT_AMU_GROUP1_COUNTERS_MASK
#else
-#define AMU_GROUP1_COUNTERS_MASK 0
+#define AMU_GROUP1_COUNTERS_MASK U(0)
#endif
#ifdef PLAT_AMU_GROUP1_NR_COUNTERS
#define AMU_GROUP1_NR_COUNTERS PLAT_AMU_GROUP1_NR_COUNTERS
#else
-#define AMU_GROUP1_NR_COUNTERS 0
+#define AMU_GROUP1_NR_COUNTERS U(0)
#endif
CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
CASSERT(AMU_GROUP1_NR_COUNTERS <= 16, invalid_amu_group1_nr_counters);
-int amu_supported(void);
-void amu_enable(int el2_unused);
+bool amu_supported(void);
+void amu_enable(bool el2_unused);
/* Group 0 configuration helpers */
uint64_t amu_group0_cnt_read(int idx);
@@ -41,4 +43,4 @@ uint64_t amu_group1_cnt_read(int idx);
void amu_group1_cnt_write(int idx, uint64_t val);
void amu_group1_set_evtype(int idx, unsigned int val);
-#endif /* __AMU_H__ */
+#endif /* AMU_H */
diff --git a/include/lib/extensions/amu_private.h b/include/lib/extensions/amu_private.h
index 0c660bb83..ab4e6aaba 100644
--- a/include/lib/extensions/amu_private.h
+++ b/include/lib/extensions/amu_private.h
@@ -1,19 +1,19 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __AMU_PRIVATE_H__
-#define __AMU_PRIVATE_H__
+#ifndef AMU_PRIVATE_H
+#define AMU_PRIVATE_H
#include <stdint.h>
uint64_t amu_group0_cnt_read_internal(int idx);
-void amu_group0_cnt_write_internal(int idx, uint64_t);
+void amu_group0_cnt_write_internal(int idx, uint64_t val);
uint64_t amu_group1_cnt_read_internal(int idx);
-void amu_group1_cnt_write_internal(int idx, uint64_t);
+void amu_group1_cnt_write_internal(int idx, uint64_t val);
void amu_group1_set_evtype_internal(int idx, unsigned int val);
-#endif /* __AMU_PRIVATE_H__ */
+#endif /* AMU_PRIVATE_H */
diff --git a/include/lib/extensions/mpam.h b/include/lib/extensions/mpam.h
index 571b96b65..ac8c00a43 100644
--- a/include/lib/extensions/mpam.h
+++ b/include/lib/extensions/mpam.h
@@ -10,6 +10,6 @@
#include <stdbool.h>
bool mpam_supported(void);
-void mpam_enable(int el2_unused);
+void mpam_enable(bool el2_unused);
#endif /* MPAM_H */
diff --git a/include/lib/extensions/spe.h b/include/lib/extensions/spe.h
index b2b188ef5..d4b925fe4 100644
--- a/include/lib/extensions/spe.h
+++ b/include/lib/extensions/spe.h
@@ -4,11 +4,13 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SPE_H__
-#define __SPE_H__
+#ifndef SPE_H
+#define SPE_H
-int spe_supported(void);
-void spe_enable(int el2_unused);
+#include <stdbool.h>
+
+bool spe_supported(void);
+void spe_enable(bool el2_unused);
void spe_disable(void);
-#endif /* __SPE_H__ */
+#endif /* SPE_H */
diff --git a/include/lib/extensions/sve.h b/include/lib/extensions/sve.h
index 9c7f37f26..83df1775e 100644
--- a/include/lib/extensions/sve.h
+++ b/include/lib/extensions/sve.h
@@ -4,10 +4,12 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __SVE_H__
-#define __SVE_H__
+#ifndef SVE_H
+#define SVE_H
-int sve_supported(void);
-void sve_enable(int el2_unused);
+#include <stdbool.h>
-#endif /* __SVE_H__ */
+bool sve_supported(void);
+void sve_enable(bool el2_unused);
+
+#endif /* SVE_H */
diff --git a/include/lib/pmf/pmf.h b/include/lib/pmf/pmf.h
index a3812fbf2..18ef0a559 100644
--- a/include/lib/pmf/pmf.h
+++ b/include/lib/pmf/pmf.h
@@ -9,17 +9,18 @@
#include <cassert.h>
#include <pmf_helpers.h>
+#include <utils_def.h>
/*
* Constants used for/by PMF services.
*/
-#define PMF_ARM_TIF_IMPL_ID 0x41
+#define PMF_ARM_TIF_IMPL_ID U(0x41)
#define PMF_TID_SHIFT 0
-#define PMF_TID_MASK (0xFF << PMF_TID_SHIFT)
+#define PMF_TID_MASK (U(0xFF) << PMF_TID_SHIFT)
#define PMF_SVC_ID_SHIFT 10
-#define PMF_SVC_ID_MASK (0x3F << PMF_SVC_ID_SHIFT)
+#define PMF_SVC_ID_MASK (U(0x3F) << PMF_SVC_ID_SHIFT)
#define PMF_IMPL_ID_SHIFT 24
-#define PMF_IMPL_ID_MASK (0xFFU << PMF_IMPL_ID_SHIFT)
+#define PMF_IMPL_ID_MASK (U(0xFF) << PMF_IMPL_ID_SHIFT)
/*
* Flags passed to PMF_REGISTER_SERVICE
@@ -37,16 +38,16 @@
/*
* Defines for PMF SMC function ids.
*/
-#define PMF_SMC_GET_TIMESTAMP_32 0x82000010u
-#define PMF_SMC_GET_TIMESTAMP_64 0xC2000010u
+#define PMF_SMC_GET_TIMESTAMP_32 U(0x82000010)
+#define PMF_SMC_GET_TIMESTAMP_64 U(0xC2000010)
#define PMF_NUM_SMC_CALLS 2
/*
* The macros below are used to identify
* PMF calls from the SMC function ID.
*/
-#define PMF_FID_MASK 0xffe0u
-#define PMF_FID_VALUE 0u
+#define PMF_FID_MASK U(0xffe0)
+#define PMF_FID_VALUE U(0)
#define is_pmf_fid(_fid) (((_fid) & PMF_FID_MASK) == PMF_FID_VALUE)
/* Following are the supported PMF service IDs */
diff --git a/include/lib/pmf/pmf_helpers.h b/include/lib/pmf/pmf_helpers.h
index b9757de07..c535b222d 100644
--- a/include/lib/pmf/pmf_helpers.h
+++ b/include/lib/pmf/pmf_helpers.h
@@ -11,7 +11,6 @@
#include <assert.h>
#include <bl_common.h>
#include <platform.h>
-#include <pmf.h>
#include <stddef.h>
#include <stdint.h>
diff --git a/include/plat/arm/common/arm_sip_svc.h b/include/plat/arm/common/arm_sip_svc.h
index 68375afae..3e25cbc6a 100644
--- a/include/plat/arm/common/arm_sip_svc.h
+++ b/include/plat/arm/common/arm_sip_svc.h
@@ -1,24 +1,26 @@
/*
- * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __ARM_SIP_SVC_H__
-#define __ARM_SIP_SVC_H__
+#ifndef ARM_SIP_SVC_H
+#define ARM_SIP_SVC_H
+
+#include <utils_def.h>
/* SMC function IDs for SiP Service queries */
-#define ARM_SIP_SVC_CALL_COUNT 0x8200ff00
-#define ARM_SIP_SVC_UID 0x8200ff01
-/* 0x8200ff02 is reserved */
-#define ARM_SIP_SVC_VERSION 0x8200ff03
+#define ARM_SIP_SVC_CALL_COUNT U(0x8200ff00)
+#define ARM_SIP_SVC_UID U(0x8200ff01)
+/* U(0x8200ff02) is reserved */
+#define ARM_SIP_SVC_VERSION U(0x8200ff03)
/* Function ID for requesting state switch of lower EL */
-#define ARM_SIP_SVC_EXE_STATE_SWITCH 0x82000020
+#define ARM_SIP_SVC_EXE_STATE_SWITCH U(0x82000020)
/* ARM SiP Service Calls version numbers */
-#define ARM_SIP_SVC_VERSION_MAJOR 0x0
-#define ARM_SIP_SVC_VERSION_MINOR 0x2
+#define ARM_SIP_SVC_VERSION_MAJOR U(0x0)
+#define ARM_SIP_SVC_VERSION_MINOR U(0x2)
-#endif /* __ARM_SIP_SVC_H__ */
+#endif /* ARM_SIP_SVC_H */
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index bdcb14415..e7082d080 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -3,8 +3,8 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __PLAT_ARM_H__
-#define __PLAT_ARM_H__
+#ifndef PLAT_ARM_H
+#define PLAT_ARM_H
#include <bakery_lock.h>
#include <cassert.h>
@@ -292,4 +292,4 @@ extern plat_psci_ops_t plat_arm_psci_pm_ops;
extern const mmap_region_t plat_arm_mmap[];
extern const unsigned int arm_pm_idle_states[];
-#endif /* __PLAT_ARM_H__ */
+#endif /* PLAT_ARM_H */
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-15 18:52:50 +0000