diff options
Diffstat (limited to 'docs')
-rw-r--r-- | docs/firmware-design.rst | 6 | ||||
-rw-r--r-- | docs/plat/meson-gxbb.rst | 26 | ||||
-rw-r--r-- | docs/plat/rpi3.rst | 16 | ||||
-rw-r--r-- | docs/plat/stm32mp1.rst | 16 | ||||
-rw-r--r-- | docs/porting-guide.rst | 44 | ||||
-rw-r--r-- | docs/user-guide.rst | 4 |
6 files changed, 86 insertions, 26 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst index 7cc74855d..051b92bba 100644 --- a/docs/firmware-design.rst +++ b/docs/firmware-design.rst @@ -2532,6 +2532,12 @@ This Architecture Extension is targeted when ``ARM_ARCH_MAJOR`` == 8 and translation table entries for a given stage of translation for a particular translation regime. +Armv8.3-A +~~~~~~~~~ + +- Pointer Authentication features of Armv8.3-A are unconditionally enabled so + that lower ELs are allowed to use them without causing a trap to EL3. + Armv7-A ~~~~~~~ diff --git a/docs/plat/meson-gxbb.rst b/docs/plat/meson-gxbb.rst new file mode 100644 index 000000000..f909e9933 --- /dev/null +++ b/docs/plat/meson-gxbb.rst @@ -0,0 +1,26 @@ +Trusted Firmware-A for Amlogic Meson S905 (GXBB) +================================================ + +The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at +1.5Ghz. It also contains a Cortex-M3 used as SCP. + +This port is a minimal implementation of BL31 capable of booting mainline U-Boot +and Linux: + +- SCPI support. +- Basic PSCI support (CPU_ON, CPU_OFF, SYSTEM_RESET, SYSTEM_OFF). Note that CPU0 + can't be turned off, so there is a workaround to hide this from the caller. +- GICv2 driver set up. +- Basic SIP services (read efuse data, enable/disable JTAG). + +In order to build it: + +:: + + CROSS_COMPILE=aarch64-linux-gnu- make DEBUG=1 PLAT=gxbb bl31 + +This port has been tested in a ODROID-C2. After building it, follow the +instructions in the `U-Boot repository`_, replacing the mentioned **bl31.bin** +by the one built from this port. + +.. _U-Boot repository: https://github.com/u-boot/u-boot/blob/master/board/amlogic/odroid-c2/README diff --git a/docs/plat/rpi3.rst b/docs/plat/rpi3.rst index fbf753b09..db475646b 100644 --- a/docs/plat/rpi3.rst +++ b/docs/plat/rpi3.rst @@ -133,9 +133,12 @@ secure platform! 0x40000000 +-----------------+ The area between **0x10000000** and **0x11000000** has to be manually protected -so that the kernel doesn't use it. That is done by adding ``memmap=16M$256M`` to -the command line passed to the kernel. See the `Setup SD card`_ instructions to -see how to do it. +so that the kernel doesn't use it. The current port tries to modify the live DTB +to add a memreserve region that reserves the previously mentioned area. + +If this is not possible, the user may manually add ``memmap=16M$256M`` to the +command line passed to the kernel in ``cmdline.txt``. See the `Setup SD card`_ +instructions to see how to do it. This system is strongly discouraged. The last 16 MiB of DRAM can only be accessed by the VideoCore, that has different mappings than the Arm cores in which the I/O addresses don't overlap @@ -384,14 +387,9 @@ untouched). They have been tested with the image available in 2018-03-13. bootloader will look for a file called ``armstub8.bin`` and load it at address **0x0** instead of a predefined one. -4. Open ``cmdline.txt`` and add ``memmap=16M$256M`` to prevent the kernel from - using the memory needed by TF-A. If you want to enable the serial port - "Mini UART", make sure that this file also contains +4. To enable the serial port "Mini UART" in Linux, open ``cmdline.txt`` and add ``console=serial0,115200 console=tty1``. - Note that the 16 MiB reserved this way won't be available for Linux, the same - way as the memory reserved in DRAM for the GPU isn't available. - 5. Open ``config.txt`` and add the following lines at the end (``enable_uart=1`` is only needed to enable debugging through the Mini UART): diff --git a/docs/plat/stm32mp1.rst b/docs/plat/stm32mp1.rst index 9e731a419..f8379b4eb 100644 --- a/docs/plat/stm32mp1.rst +++ b/docs/plat/stm32mp1.rst @@ -76,7 +76,23 @@ To build: .. code:: bash make CROSS_COMPILE=arm-linux-gnueabihf- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 AARCH32_SP=sp_min + cd <u-boot_directory> + make stm32mp15_basic_defconfig + make DEVICE_TREE=stm32mp157c_ev1 all + ./tools/mkimage -T stm32image -a 0xC0100000 -e 0xC0100000 -d u-boot.bin u-boot.stm32 The following build options are supported: - ``ENABLE_STACK_PROTECTOR``: To enable the stack protection. + + +Populate SD-card +---------------- + +The SD-card has to be formated with GPT. +It should contain at least those partitions: + +- fsbl: to copy the tf-a-stm32mp157c-ev1.stm32 binary +- ssbl: to copy the u-boot.stm32 binary + +Usually, two copies of fsbl are used (fsbl1 and fsbl2) instead of one partition fsbl. diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst index 1667ccec8..bef4af656 100644 --- a/docs/porting-guide.rst +++ b/docs/porting-guide.rst @@ -2554,8 +2554,13 @@ NOTE: This section assumes that your platform is enabling the MULTI_CONSOLE_API flag in its platform.mk. Not using this flag is deprecated for new platforms. BL31 implements a crash reporting mechanism which prints the various registers -of the CPU to enable quick crash analysis and debugging. By default, the -definitions in ``plat/common/aarch64/platform\_helpers.S`` will cause the crash +of the CPU to enable quick crash analysis and debugging. This mechanism relies +on the platform implementating ``plat_crash_console_init``, +``plat_crash_console_putc`` and ``plat_crash_console_flush``. + +The file ``plat/common/aarch64/crash_console_helpers.S`` contains sample +implementation of all of them. Platforms may include this file to their +makefiles in order to benefit from them. By default, they will cause the crash output to be routed over the normal console infrastructure and get printed on consoles configured to output in crash state. ``console_set_scope()`` can be used to control whether a console is used for crash output. @@ -2565,8 +2570,12 @@ normal boot console can be set up), platforms may want to control crash output more explicitly. For these, the following functions can be overridden by platform code. They are executed outside of a C environment and without a stack. -Function : plat\_crash\_console\_init -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +If this behaviour is not desirable, the platform may implement functions that +redirect the prints to the console driver (``console_xxx_core_init``, etc). Most +platforms (including Arm platforms) do this and they can be used as an example. + +Function : plat\_crash\_console\_init [mandatory] +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ :: @@ -2577,9 +2586,10 @@ This API is used by the crash reporting mechanism to initialize the crash console. It must only use the general purpose registers x0 through x7 to do the initialization and returns 1 on success. -If you are trying to debug crashes before the console driver would normally get -registered, you can use this to register a driver from assembly with hardcoded -parameters. For example, you could register the 16550 driver like this: +When using the sample implementation, if you are trying to debug crashes before +the console driver would normally get registered, you can use this to register a +driver from assembly with hardcoded parameters. For example, you could register +the 16550 driver like this: :: @@ -2595,11 +2605,11 @@ parameters. For example, you could register the 16550 driver like this: b console_16550_register /* tail call, returns 1 on success */ endfunc plat_crash_console_init -If you're trying to debug crashes in BL1, you can call the console_xxx_core_init -function exported by some console drivers from here. +If you're trying to debug crashes in BL1, you can call the +``console_xxx_core_init`` function exported by some console drivers from here. -Function : plat\_crash\_console\_putc -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Function : plat\_crash\_console\_putc [mandatory] +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ :: @@ -2612,13 +2622,13 @@ x2 to do its work. The parameter and the return value are in general purpose register x0. If you have registered a normal console driver in ``plat_crash_console_init``, -you can keep the default implementation here (which calls ``console_putc()``). +you can keep the sample implementation here (which calls ``console_putc()``). -If you're trying to debug crashes in BL1, you can call the console_xxx_core_putc -function exported by some console drivers from here. +If you're trying to debug crashes in BL1, you can call the +``console_xxx_core_putc`` function exported by some console drivers from here. -Function : plat\_crash\_console\_flush -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Function : plat\_crash\_console\_flush [mandatory] +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ :: @@ -2631,7 +2641,7 @@ registers x0 through x5 to do its work. The return value is 0 on successful completion; otherwise the return value is -1. If you have registered a normal console driver in ``plat_crash_console_init``, -you can keep the default implementation here (which calls ``console_flush()``). +you can keep the sample implementation here (which calls ``console_flush()``). If you're trying to debug crashes in BL1, you can call the console_xx_core_flush function exported by some console drivers from here. diff --git a/docs/user-guide.rst b/docs/user-guide.rst index f4ef85d2a..52cb45c09 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -371,6 +371,10 @@ Common build options partitioning in EL3, however. Platform initialisation code should configure and use partitions in EL3 as required. This option defaults to ``0``. +- ``ENABLE_PIE``: Boolean option to enable Position Independent Executable(PIE) + support within generic code in TF-A. This option is currently only supported + in BL31. Default is 0. + - ``ENABLE_PMF``: Boolean option to enable support for optional Performance Measurement Framework(PMF). Default is 0. |