diff options
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/components/secure-partition-manager-design.rst | 4 | ||||
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 5 | ||||
| -rw-r--r-- | docs/getting_started/build-options.rst | 7 | ||||
| -rw-r--r-- | docs/plat/xilinx-versal.rst | 8 |
4 files changed, 21 insertions, 3 deletions
diff --git a/docs/components/secure-partition-manager-design.rst b/docs/components/secure-partition-manager-design.rst index 9aba95450..52b1c03e8 100644 --- a/docs/components/secure-partition-manager-design.rst +++ b/docs/components/secure-partition-manager-design.rst @@ -119,7 +119,7 @@ Interface). This will be referred to as the *Standalone MM Secure Partition* in the rest of this document. To enable SPM support in TF-A, the source code must be compiled with the build -flag ``ENABLE_SPM=1``, along with ``EL3_EXCEPTION_HANDLING=1``. On Arm +flag ``SPM_MM=1``, along with ``EL3_EXCEPTION_HANDLING=1``. On Arm platforms the build option ``ARM_BL31_IN_DRAM`` must be set to 1. Also, the location of the binary that contains the BL32 image (``BL32=path/to/image.bin``) must be specified. @@ -133,7 +133,7 @@ image in the FIP: .. code:: shell BL32=path/to/standalone/mm/sp BL33=path/to/bl33.bin \ - make PLAT=fvp ENABLE_SPM=1 ARM_BL31_IN_DRAM=1 fip all + make PLAT=fvp SPM_MM=1 EL3_EXCEPTION_HANDLING=1 ARM_BL31_IN_DRAM=1 all fip Describing Secure Partition resources ------------------------------------- diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 7fa027f42..f3096b418 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -324,6 +324,11 @@ architecture that can be enabled by the platform as desired. as recommended in section "4.7 Non-Temporal Loads/Stores" of the `Cortex-A57 Software Optimization Guide`_. +- ``NEOVERSE_N1_EXTERNAL_LLC``: This flag indicates that an external last + level cache(LLC) is present in the system, and that the DataSource field + on the master CHI interface indicates when data is returned from the LLC. + This is used to control how the LL_CACHE* PMU events count. + -------------- *Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved.* diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst index d7bb0449e..b702c34de 100644 --- a/docs/getting_started/build-options.rst +++ b/docs/getting_started/build-options.rst @@ -213,7 +213,7 @@ Common build options - ``ENABLE_PIE``: Boolean option to enable Position Independent Executable(PIE) support within generic code in TF-A. This option is currently only supported - in BL31. Default is 0. + in BL2_AT_EL3, BL31, and BL32 (TSP). Default is 0. - ``ENABLE_PMF``: Boolean option to enable support for optional Performance Measurement Framework(PMF). Default is 0. @@ -387,6 +387,11 @@ Common build options All log output up to and including the selected log level is compiled into the build. The default value is 40 in debug builds and 20 in release builds. +- ``MEASURED_BOOT``: Boolean flag to include support for the Measured Boot + feature. If this flag is enabled ``TRUSTED_BOARD_BOOT`` must be set. + This option defaults to 0 and is an experimental feature in the stage of + development. + - ``NON_TRUSTED_WORLD_KEY``: This option is used when ``GENERATE_COT=1``. It specifies the file that contains the Non-Trusted World private key in PEM format. If ``SAVE_KEYS=1``, this file name will be used to save the key. diff --git a/docs/plat/xilinx-versal.rst b/docs/plat/xilinx-versal.rst index 95c89a8b2..57a363bc9 100644 --- a/docs/plat/xilinx-versal.rst +++ b/docs/plat/xilinx-versal.rst @@ -33,3 +33,11 @@ Xilinx Versal platform specific build options * `VERSAL_PLATFORM`: Select the platform. Options: - `versal_virt` : Versal Virtual platform + +# PLM->TF-A Parameter Passing +------------------------------ +The PLM populates a data structure with image information for the TF-A. The TF-A +uses that data to hand off to the loaded images. The address of the handoff +data structure is passed in the ```PMC_GLOBAL_GLOB_GEN_STORAGE4``` register. +The register is free to be used by other software once the TF-A is bringing up +further firmware images. |