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Diffstat (limited to 'docs/user-guide.rst')
| -rw-r--r-- | docs/user-guide.rst | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/docs/user-guide.rst b/docs/user-guide.rst index ed5ba1842..9e23711aa 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -617,6 +617,9 @@ Common build options interrupts to TSP allowing it to save its context and hand over synchronously to EL3 via an SMC. + Note: when ``EL3_EXCEPTION_HANDLING`` is ``1``, ``TSP_NS_INTR_ASYNC_PREEMPT`` + must also be set to ``1``. + - ``USE_COHERENT_MEM``: This flag determines whether to include the coherent memory region in the BL memory map or not (see "Use of Coherent memory in Trusted Firmware" section in `Firmware Design`_). It can take the value 1 @@ -752,6 +755,9 @@ ARM FVP platform specific build options - ``FVP_CCN`` : The CCN driver is selected. This is the default if ``FVP_CLUSTER_COUNT`` > 2. +- ``FVP_MAX_CPUS_PER_CLUSTER``: Sets the maximum number of CPUs implemented in + a single cluster. This option defaults to 4. + - ``FVP_MAX_PE_PER_CPU``: Sets the maximum number of PEs implemented on any CPU in the system. This option defaults to 1. Note that the build option ``ARM_PLAT_MT`` doesn't have any effect on FVP platforms. @@ -1579,6 +1585,7 @@ The following ``Foundation_Platform`` parameters should be used to boot Linux wi <path-to>/Foundation_Platform \ --cores=4 \ + --arm-v8.0 \ --secure-memory \ --visualization \ --gicv3 \ @@ -1597,6 +1604,12 @@ Notes: and enable the GICv3 device in the model. Note that without this option, the Foundation FVP defaults to legacy (Versatile Express) memory map which is not supported by ARM Trusted Firmware. +- In order for the Arm Trusted Firmware to run correctly on the Foundation + Model the architecture versions must match. The Foundation FVP defaults to + the highest v8.x version it supports but the default build for Arm Trusted + Firmware is for v8.0. To avoid issues either start the Foundation Model to + use v8.0 architecture using the ``--arm-v8.0`` option or build Arm Trusted + Firmware with an appropriate value for ``ARM_ARCH_MINOR``. Running on the AEMv8 Base FVP with reset to BL1 entrypoint ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -1867,7 +1880,7 @@ wakeup interrupt from RTC. -------------- -*Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.* +*Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.* .. _Linaro: `Linaro Release Notes`_ .. _Linaro Release: `Linaro Release Notes`_ |