diff options
Diffstat (limited to 'docs/firmware-design.rst')
| -rw-r--r-- | docs/firmware-design.rst | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/docs/firmware-design.rst b/docs/firmware-design.rst index 299654fc2..266de2795 100644 --- a/docs/firmware-design.rst +++ b/docs/firmware-design.rst @@ -1282,9 +1282,9 @@ interrupt configuration during the driver initialisation. Secure interrupt configuration are specified in an array of secure interrupt properties. In this scheme, in both GICv2 and GICv3 driver data structures, the ``interrupt_props`` member points to an array of interrupt properties. Each -element of the array specifies the interrupt number and its configuration, viz. -priority, group, configuration. Each element of the array shall be populated by -the macro ``INTR_PROP_DESC()``. The macro takes the following arguments: +element of the array specifies the interrupt number and its attributes +(priority, group, configuration). Each element of the array shall be populated +by the macro ``INTR_PROP_DESC()``. The macro takes the following arguments: - 10-bit interrupt number, @@ -1439,7 +1439,7 @@ C run time. Therefore it must follow AAPCS, and must not use stack. CPU drivers that apply errata workaround can optionally implement an assembly function that report the status of errata workarounds pertaining to that CPU. -For a driver that registers the CPU, for example, ``cpux`` via. ``declare_cpu_ops`` +For a driver that registers the CPU, for example, ``cpux`` via ``declare_cpu_ops`` macro, the errata reporting function, if it exists, must be named ``cpux_errata_report``. This function will always be called with MMU enabled; it must follow AAPCS and may use stack. @@ -2558,8 +2558,18 @@ Armv8.2-A Armv8.3-A ~~~~~~~~~ -- Pointer Authentication features of Armv8.3-A are unconditionally enabled so - that lower ELs are allowed to use them without causing a trap to EL3. +- Pointer authentication features of Armv8.3-A are unconditionally enabled in + the Non-secure world so that lower ELs are allowed to use them without + causing a trap to EL3. + + In order to enable the Secure world to use it, ``CTX_INCLUDE_PAUTH_REGS`` + must be set to 1. This will add all pointer authentication system registers + to the context that is saved when doing a world switch. + + The Trusted Firmware itself has support for pointer authentication at runtime + that can be enabled by setting both options ``ENABLE_PAUTH`` and + ``CTX_INCLUDE_PAUTH_REGS`` to 1. This enables pointer authentication in BL1, + BL2, BL31, and the TSP if it is used. Armv7-A ~~~~~~~ |