diff options
Diffstat (limited to 'bl32/tsp')
| -rw-r--r-- | bl32/tsp/aarch64/tsp_exceptions.S | 66 |
1 files changed, 23 insertions, 43 deletions
diff --git a/bl32/tsp/aarch64/tsp_exceptions.S b/bl32/tsp/aarch64/tsp_exceptions.S index edcfb718d..20e40dfb0 100644 --- a/bl32/tsp/aarch64/tsp_exceptions.S +++ b/bl32/tsp/aarch64/tsp_exceptions.S @@ -28,10 +28,10 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#include <bl_common.h> #include <arch.h> -#include <tsp.h> #include <asm_macros.S> +#include <bl_common.h> +#include <tsp.h> /* ---------------------------------------------------- @@ -98,110 +98,90 @@ interrupt_exit_\label: * TSP exception handlers. * ----------------------------------------------------- */ - .section .vectors, "ax"; .align 11 - - .align 7 -tsp_exceptions: +vector_base tsp_exceptions /* ----------------------------------------------------- - * Current EL with _sp_el0 : 0x0 - 0x180. No exceptions + * Current EL with _sp_el0 : 0x0 - 0x200. No exceptions * are expected and treated as irrecoverable errors. * ----------------------------------------------------- */ -sync_exception_sp_el0: +vector_entry sync_exception_sp_el0 bl plat_panic_handler check_vector_size sync_exception_sp_el0 - .align 7 - -irq_sp_el0: +vector_entry irq_sp_el0 bl plat_panic_handler check_vector_size irq_sp_el0 - .align 7 -fiq_sp_el0: +vector_entry fiq_sp_el0 bl plat_panic_handler check_vector_size fiq_sp_el0 - .align 7 -serror_sp_el0: +vector_entry serror_sp_el0 bl plat_panic_handler check_vector_size serror_sp_el0 /* ----------------------------------------------------- - * Current EL with SPx: 0x200 - 0x380. Only IRQs/FIQs + * Current EL with SPx: 0x200 - 0x400. Only IRQs/FIQs * are expected and handled * ----------------------------------------------------- */ - .align 7 -sync_exception_sp_elx: +vector_entry sync_exception_sp_elx bl plat_panic_handler check_vector_size sync_exception_sp_elx - .align 7 -irq_sp_elx: +vector_entry irq_sp_elx handle_tsp_interrupt irq_sp_elx check_vector_size irq_sp_elx - .align 7 -fiq_sp_elx: +vector_entry fiq_sp_elx handle_tsp_interrupt fiq_sp_elx check_vector_size fiq_sp_elx - .align 7 -serror_sp_elx: +vector_entry serror_sp_elx bl plat_panic_handler check_vector_size serror_sp_elx /* ----------------------------------------------------- - * Lower EL using AArch64 : 0x400 - 0x580. No exceptions + * Lower EL using AArch64 : 0x400 - 0x600. No exceptions * are handled since TSP does not implement a lower EL * ----------------------------------------------------- */ - .align 7 -sync_exception_aarch64: +vector_entry sync_exception_aarch64 bl plat_panic_handler check_vector_size sync_exception_aarch64 - .align 7 -irq_aarch64: +vector_entry irq_aarch64 bl plat_panic_handler check_vector_size irq_aarch64 - .align 7 -fiq_aarch64: +vector_entry fiq_aarch64 bl plat_panic_handler check_vector_size fiq_aarch64 - .align 7 -serror_aarch64: +vector_entry serror_aarch64 bl plat_panic_handler check_vector_size serror_aarch64 /* ----------------------------------------------------- - * Lower EL using AArch32 : 0x600 - 0x780. No exceptions + * Lower EL using AArch32 : 0x600 - 0x800. No exceptions * handled since the TSP does not implement a lower EL. * ----------------------------------------------------- */ - .align 7 -sync_exception_aarch32: +vector_entry sync_exception_aarch32 bl plat_panic_handler check_vector_size sync_exception_aarch32 - .align 7 -irq_aarch32: +vector_entry irq_aarch32 bl plat_panic_handler check_vector_size irq_aarch32 - .align 7 -fiq_aarch32: +vector_entry fiq_aarch32 bl plat_panic_handler check_vector_size fiq_aarch32 - .align 7 -serror_aarch32: +vector_entry serror_aarch32 bl plat_panic_handler check_vector_size serror_aarch32 - .align 7 |