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-rw-r--r--include/lib/cpus/aarch32/cpu_macros.S13
-rw-r--r--include/lib/cpus/aarch64/cpu_macros.S14
-rw-r--r--include/plat/arm/board/common/board_arm_def.h62
-rw-r--r--include/plat/arm/board/common/board_css_def.h11
-rw-r--r--include/plat/arm/common/arm_def.h7
-rw-r--r--plat/arm/board/common/board_css.mk9
-rw-r--r--plat/arm/board/fvp/include/platform_def.h42
-rw-r--r--plat/arm/board/juno/aarch32/juno_helpers.S16
-rw-r--r--plat/arm/board/juno/aarch64/juno_helpers.S14
-rw-r--r--plat/arm/board/juno/include/platform_def.h30
-rw-r--r--plat/arm/board/juno/juno_common.c (renamed from plat/arm/board/common/board_css_common.c)0
-rw-r--r--plat/arm/board/juno/platform.mk5
-rw-r--r--plat/arm/css/sgi/aarch64/sgi_helper.S16
-rw-r--r--plat/arm/css/sgi/include/platform_def.h32
-rw-r--r--plat/arm/css/sgm/aarch64/css_sgm_helpers.S16
-rw-r--r--plat/arm/css/sgm/include/sgm_base_platform_def.h27
16 files changed, 177 insertions, 137 deletions
diff --git a/include/lib/cpus/aarch32/cpu_macros.S b/include/lib/cpus/aarch32/cpu_macros.S
index 7703be339..525e18caf 100644
--- a/include/lib/cpus/aarch32/cpu_macros.S
+++ b/include/lib/cpus/aarch32/cpu_macros.S
@@ -214,5 +214,18 @@
bl errata_print_msg
.endm
#endif
+ /*
+ * Helper macro that reads the part number of the current CPU and jumps
+ * to the given label if it matches the CPU MIDR provided.
+ *
+ * Clobbers: r0-r1
+ */
+ .macro jump_if_cpu_midr _cpu_midr, _label
+ ldcopr r0, MIDR
+ ubfx r0, r0, #MIDR_PN_SHIFT, #12
+ ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
+ cmp r0, r1
+ beq \_label
+ .endm
#endif /* __CPU_MACROS_S__ */
diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S
index 026a48e32..4672cbc06 100644
--- a/include/lib/cpus/aarch64/cpu_macros.S
+++ b/include/lib/cpus/aarch64/cpu_macros.S
@@ -272,3 +272,17 @@
cmp \_reg, #1
beq \_label
.endm
+
+ /*
+ * Helper macro that reads the part number of the current
+ * CPU and jumps to the given label if it matches the CPU
+ * MIDR provided.
+ *
+ * Clobbers x0.
+ */
+ .macro jump_if_cpu_midr _cpu_midr, _label
+ mrs x0, midr_el1
+ ubfx x0, x0, MIDR_PN_SHIFT, #12
+ cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
+ b.eq \_label
+ .endm
diff --git a/include/plat/arm/board/common/board_arm_def.h b/include/plat/arm/board/common/board_arm_def.h
deleted file mode 100644
index a9272080b..000000000
--- a/include/plat/arm/board/common/board_arm_def.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef __BOARD_ARM_DEF_H__
-#define __BOARD_ARM_DEF_H__
-
-#include <v2m_def.h>
-
-/*
- * Required platform porting definitions common to all ARM
- * development platforms
- */
-
-/* Size of cacheable stacks */
-#if defined(IMAGE_BL1)
-#if TRUSTED_BOARD_BOOT
-# define PLATFORM_STACK_SIZE 0x1000
-#else
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-#elif defined(IMAGE_BL2)
-# if TRUSTED_BOARD_BOOT
-# define PLATFORM_STACK_SIZE 0x1000
-# else
-# define PLATFORM_STACK_SIZE 0x400
-# endif
-#elif defined(IMAGE_BL2U)
-# define PLATFORM_STACK_SIZE 0x400
-#elif defined(IMAGE_BL31)
-#if ENABLE_SPM
-# define PLATFORM_STACK_SIZE 0x500
-#elif PLAT_XLAT_TABLES_DYNAMIC
-# define PLATFORM_STACK_SIZE 0x800
-#else
-# define PLATFORM_STACK_SIZE 0x400
-#endif
-#elif defined(IMAGE_BL32)
-# define PLATFORM_STACK_SIZE 0x440
-#endif
-
-#define MAX_IO_DEVICES 3
-#define MAX_IO_HANDLES 4
-
-#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
-
-/* Reserve the last block of flash for PSCI MEM PROTECT flag */
-#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE
-#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
-#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
-
-/*
- * Map mem_protect flash region with read and write permissions
- */
-#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \
- V2M_FLASH_BLOCK_SIZE, \
- MT_DEVICE | MT_RW | MT_SECURE)
-
-#endif /* __BOARD_ARM_DEF_H__ */
diff --git a/include/plat/arm/board/common/board_css_def.h b/include/plat/arm/board/common/board_css_def.h
index b0a6baf35..1a80e165b 100644
--- a/include/plat/arm/board/common/board_css_def.h
+++ b/include/plat/arm/board/common/board_css_def.h
@@ -40,6 +40,16 @@
#endif /* __ASSEMBLY__ */
+#define MAX_IO_DEVICES 3
+#define MAX_IO_HANDLES 4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
/*
* Required platform porting definitions common to all ARM CSS-based
* development platforms
@@ -63,6 +73,5 @@
#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE
#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
-
#endif /* __BOARD_CSS_DEF_H__ */
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 8d81af960..d5f5c15a4 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -277,6 +277,13 @@
#endif
/*
+ * Map mem_protect flash region with read and write permissions
+ */
+#define ARM_V2M_MAP_MEM_PROTECT MAP_REGION_FLAT(PLAT_ARM_MEM_PROT_ADDR, \
+ V2M_FLASH_BLOCK_SIZE, \
+ MT_DEVICE | MT_RW | MT_SECURE)
+
+/*
* The max number of regions like RO(code), coherent and data required by
* different BL stages which need to be mapped in the MMU.
*/
diff --git a/plat/arm/board/common/board_css.mk b/plat/arm/board/common/board_css.mk
deleted file mode 100644
index 5ac213ace..000000000
--- a/plat/arm/board/common/board_css.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-PLAT_BL_COMMON_SOURCES += plat/arm/board/common/board_css_common.c
-
-include plat/arm/board/common/board_common.mk
diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index 8f1a0cda9..ed1a30265 100644
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -20,7 +20,6 @@
#include <arm_def.h>
#include <arm_spm_def.h>
-#include <board_arm_def.h>
#include <common_def.h>
#include <tzc400.h>
#include <utils_def.h>
@@ -45,6 +44,8 @@
*/
#define PLAT_ARM_CLUSTER_COUNT FVP_CLUSTER_COUNT
+#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
+
#define PLAT_ARM_TRUSTED_ROM_BASE 0x00000000
#define PLAT_ARM_TRUSTED_ROM_SIZE 0x04000000 /* 64 MB */
@@ -134,6 +135,45 @@
#endif
/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+# define PLATFORM_STACK_SIZE 0x500
+# elif PLAT_XLAT_TABLES_DYNAMIC
+# define PLATFORM_STACK_SIZE 0x800
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+#define MAX_IO_DEVICES 3
+#define MAX_IO_HANDLES 4
+
+/* Reserve the last block of flash for PSCI MEM PROTECT flag */
+#define PLAT_ARM_FIP_BASE V2M_FLASH0_BASE
+#define PLAT_ARM_FIP_MAX_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
+#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
+
+/*
* PL011 related constants
*/
#define PLAT_ARM_BOOT_UART_BASE V2M_IOFPGA_UART0_BASE
diff --git a/plat/arm/board/juno/aarch32/juno_helpers.S b/plat/arm/board/juno/aarch32/juno_helpers.S
index 824002aed..1bc4e309a 100644
--- a/plat/arm/board/juno/aarch32/juno_helpers.S
+++ b/plat/arm/board/juno/aarch32/juno_helpers.S
@@ -10,6 +10,7 @@
#include <cortex_a53.h>
#include <cortex_a57.h>
#include <cortex_a72.h>
+#include <cpu_macros.S>
#include <v2m_def.h>
#include "../juno_def.h"
@@ -34,21 +35,6 @@
.endm
/* --------------------------------------------------------------------
- * Helper macro that reads the part number of the current CPU and jumps
- * to the given label if it matches the CPU MIDR provided.
- *
- * Clobbers r0.
- * --------------------------------------------------------------------
- */
- .macro jump_if_cpu_midr _cpu_midr, _label
- ldcopr r0, MIDR
- ubfx r0, r0, #MIDR_PN_SHIFT, #12
- ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
- cmp r0, r1
- beq \_label
- .endm
-
- /* --------------------------------------------------------------------
* Platform reset handler for Juno R0.
*
* Juno R0 has the following topology:
diff --git a/plat/arm/board/juno/aarch64/juno_helpers.S b/plat/arm/board/juno/aarch64/juno_helpers.S
index 29c2c0a52..edcfc7449 100644
--- a/plat/arm/board/juno/aarch64/juno_helpers.S
+++ b/plat/arm/board/juno/aarch64/juno_helpers.S
@@ -40,20 +40,6 @@
.endm
/* --------------------------------------------------------------------
- * Helper macro that reads the part number of the current CPU and jumps
- * to the given label if it matches the CPU MIDR provided.
- *
- * Clobbers x0.
- * --------------------------------------------------------------------
- */
- .macro jump_if_cpu_midr _cpu_midr, _label
- mrs x0, midr_el1
- ubfx x0, x0, MIDR_PN_SHIFT, #12
- cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
- b.eq \_label
- .endm
-
- /* --------------------------------------------------------------------
* Platform reset handler for Juno R0.
*
* Juno R0 has the following topology:
diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h
index ed78b4610..0e5c6d9ac 100644
--- a/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@ -20,7 +20,6 @@
#include <arm_def.h>
-#include <board_arm_def.h>
#include <board_css_def.h>
#include <common_def.h>
#include <css_def.h>
@@ -53,6 +52,8 @@
*/
#define PLAT_ARM_CLUSTER_COUNT JUNO_CLUSTER_COUNT
+#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
+
/* Use the bypass address */
#define PLAT_ARM_TRUSTED_ROM_BASE V2M_FLASH0_BASE + BL1_ROM_BYPASS_OFFSET
@@ -163,6 +164,33 @@
#endif
/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if PLAT_XLAT_TABLES_DYNAMIC
+# define PLATFORM_STACK_SIZE 0x800
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+/*
* Since free SRAM space is scant, enable the ASSERTION message size
* optimization by fixing the PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO (40).
*/
diff --git a/plat/arm/board/common/board_css_common.c b/plat/arm/board/juno/juno_common.c
index 40b1a275a..40b1a275a 100644
--- a/plat/arm/board/common/board_css_common.c
+++ b/plat/arm/board/juno/juno_common.c
diff --git a/plat/arm/board/juno/platform.mk b/plat/arm/board/juno/platform.mk
index e2ec3c1c8..f28139ddc 100644
--- a/plat/arm/board/juno/platform.mk
+++ b/plat/arm/board/juno/platform.mk
@@ -29,7 +29,8 @@ CSS_USE_SCMI_SDS_DRIVER := 1
PLAT_INCLUDES := -Iplat/arm/board/juno/include \
-Iplat/arm/css/drivers/sds
-PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S
+PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
+ plat/arm/board/juno/juno_common.c
# Flag to enable support for AArch32 state on JUNO
JUNO_AARCH32_EL3_RUNTIME := 0
@@ -123,7 +124,7 @@ SKIP_A57_L1_FLUSH_PWR_DWN := 1
# Do not enable SVE
ENABLE_SVE_FOR_NS := 0
-include plat/arm/board/common/board_css.mk
+include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk
include plat/arm/soc/common/soc_css.mk
include plat/arm/css/common/css_common.mk
diff --git a/plat/arm/css/sgi/aarch64/sgi_helper.S b/plat/arm/css/sgi/aarch64/sgi_helper.S
index dd0fc5bbd..27bae43cf 100644
--- a/plat/arm/css/sgi/aarch64/sgi_helper.S
+++ b/plat/arm/css/sgi/aarch64/sgi_helper.S
@@ -8,6 +8,7 @@
#include <asm_macros.S>
#include <platform_def.h>
#include <cortex_a75.h>
+#include <cpu_macros.S>
.globl plat_arm_calc_core_pos
.globl plat_reset_handler
@@ -48,21 +49,6 @@ func plat_arm_calc_core_pos
ret
endfunc plat_arm_calc_core_pos
- /* ------------------------------------------------------
- * Helper macro that reads the part number of the current
- * CPU and jumps to the given label if it matches the CPU
- * MIDR provided.
- *
- * Clobbers x0.
- * -----------------------------------------------------
- */
- .macro jump_if_cpu_midr _cpu_midr, _label
- mrs x0, midr_el1
- ubfx x0, x0, MIDR_PN_SHIFT, #12
- cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
- b.eq \_label
- .endm
-
/* -----------------------------------------------------
* void plat_reset_handler(void);
*
diff --git a/plat/arm/css/sgi/include/platform_def.h b/plat/arm/css/sgi/include/platform_def.h
index b87bded8f..629749056 100644
--- a/plat/arm/css/sgi/include/platform_def.h
+++ b/plat/arm/css/sgi/include/platform_def.h
@@ -9,12 +9,12 @@
#include <arm_def.h>
#include <arm_spm_def.h>
-#include <board_arm_def.h>
#include <board_css_def.h>
#include <common_def.h>
#include <css_def.h>
#include <soc_css_def.h>
#include <utils_def.h>
+#include <v2m_def.h>
#include <xlat_tables_defs.h>
#define CSS_SGI_MAX_CPUS_PER_CLUSTER 4
@@ -26,6 +26,8 @@
CSS_SGI_MAX_CPUS_PER_CLUSTER * \
CSS_SGI_MAX_PE_PER_CPU)
+#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
+
/*
* PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
* plat_arm_mmap array defined for each BL stage.
@@ -86,6 +88,34 @@
*/
#define PLAT_ARM_MAX_BL31_SIZE 0x3B000
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# if ENABLE_SPM
+# define PLATFORM_STACK_SIZE 0x500
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
+
#define PLAT_ARM_NSTIMER_FRAME_ID 0
#define PLAT_CSS_MHU_BASE 0x45000000
diff --git a/plat/arm/css/sgm/aarch64/css_sgm_helpers.S b/plat/arm/css/sgm/aarch64/css_sgm_helpers.S
index d9b3df68d..32ca1bbc2 100644
--- a/plat/arm/css/sgm/aarch64/css_sgm_helpers.S
+++ b/plat/arm/css/sgm/aarch64/css_sgm_helpers.S
@@ -9,6 +9,7 @@
#include <platform_def.h>
#include <cortex_a75.h>
#include <cortex_a55.h>
+#include <cpu_macros.S>
.globl plat_arm_calc_core_pos
.globl plat_reset_handler
@@ -50,21 +51,6 @@ func plat_arm_calc_core_pos
ret
endfunc plat_arm_calc_core_pos
- /* ------------------------------------------------------
- * Helper macro that reads the part number of the current
- * CPU and jumps to the given label if it matches the CPU
- * MIDR provided.
- *
- * Clobbers x0.
- * -----------------------------------------------------
- */
- .macro jump_if_cpu_midr _cpu_midr, _label
- mrs x0, midr_el1
- ubfx x0, x0, MIDR_PN_SHIFT, #12
- cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
- b.eq \_label
- .endm
-
/* -----------------------------------------------------
* void plat_reset_handler(void);
*
diff --git a/plat/arm/css/sgm/include/sgm_base_platform_def.h b/plat/arm/css/sgm/include/sgm_base_platform_def.h
index 7d35bd5e3..eaba619af 100644
--- a/plat/arm/css/sgm/include/sgm_base_platform_def.h
+++ b/plat/arm/css/sgm/include/sgm_base_platform_def.h
@@ -8,13 +8,13 @@
#define __SGM_BASE_PLATFORM_DEF_H__
#include <arm_def.h>
-#include <board_arm_def.h>
#include <board_css_def.h>
#include <common_def.h>
#include <css_def.h>
#include <soc_css_def.h>
#include <tzc400.h>
#include <tzc_common.h>
+#include <v2m_def.h>
/* CPU topology */
#define PLAT_ARM_CLUSTER_COUNT 1
@@ -82,6 +82,8 @@
* platforms
*************************************************************************/
+#define PLAT_ARM_TRUSTED_SRAM_SIZE 0x00040000 /* 256 KB */
+
/* MHU related constants */
#define PLAT_CSS_MHU_BASE 0x2b1f0000
@@ -204,6 +206,29 @@
*/
#define PLAT_ARM_MAX_BL31_SIZE 0x3B000
+/*
+ * Size of cacheable stacks
+ */
+#if defined(IMAGE_BL1)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x440
+# endif
+#elif defined(IMAGE_BL2)
+# if TRUSTED_BOARD_BOOT
+# define PLATFORM_STACK_SIZE 0x1000
+# else
+# define PLATFORM_STACK_SIZE 0x400
+# endif
+#elif defined(IMAGE_BL2U)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL31)
+# define PLATFORM_STACK_SIZE 0x400
+#elif defined(IMAGE_BL32)
+# define PLATFORM_STACK_SIZE 0x440
+#endif
+
/*******************************************************************************
* Memprotect definitions
******************************************************************************/