diff options
86 files changed, 530 insertions, 577 deletions
@@ -1067,14 +1067,6 @@ ifneq ($(findstring clang,$(notdir $(CC))),) else CPPFLAGS += -Wno-error=deprecated-declarations -Wno-error=cpp endif -# __ASSEMBLY__ is deprecated in favor of the compiler-builtin __ASSEMBLER__. -ASFLAGS += -D__ASSEMBLY__ -# AARCH32/AARCH64 macros are deprecated in favor of the compiler-builtin __aarch64__. -ifeq (${ARCH},aarch32) - $(eval $(call add_define,AARCH32)) -else - $(eval $(call add_define,AARCH64)) -endif endif # !ERROR_DEPRECATED $(eval $(call MAKE_LIB_DIRS)) diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index 9e0596f1f..f202c7ada 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -22,14 +22,14 @@ MEMORY { SECTIONS { . = BL32_BASE; - ASSERT(. == ALIGN(PAGE_SIZE), - "BL32_BASE address is not aligned on a page boundary.") + ASSERT(. == ALIGN(PAGE_SIZE), + "BL32_BASE address is not aligned on a page boundary.") #if SEPARATE_CODE_AND_RODATA .text . : { __TEXT_START__ = .; *entrypoint.o(.text*) - *(.text*) + *(SORT_BY_ALIGNMENT(.text*)) *(.vectors) . = ALIGN(PAGE_SIZE); __TEXT_END__ = .; @@ -46,7 +46,7 @@ SECTIONS .rodata . : { __RODATA_START__ = .; - *(.rodata*) + *(SORT_BY_ALIGNMENT(.rodata*)) RODATA_COMMON @@ -61,8 +61,8 @@ SECTIONS ro . : { __RO_START__ = .; *entrypoint.o(.text*) - *(.text*) - *(.rodata*) + *(SORT_BY_ALIGNMENT(.text*)) + *(SORT_BY_ALIGNMENT(.rodata*)) RODATA_COMMON @@ -76,7 +76,7 @@ SECTIONS /* * Memory page(s) mapped to this section will be marked as * read-only, executable. No RW data from the next section must - * creep in. Ensure the rest of the current memory block is unused. + * creep in. Ensure the rest of the current memory page is unused. */ . = ALIGN(PAGE_SIZE); __RO_END__ = .; @@ -134,10 +134,12 @@ SECTIONS #endif /* - * Define a linker symbol to mark end of the RW memory area for this + * Define a linker symbol to mark the end of the RW memory area for this * image. */ __RW_END__ = .; - __BL32_END__ = .; + __BL32_END__ = .; + + ASSERT(. <= BL32_LIMIT, "BL32 image has exceeded its limit.") } diff --git a/common/backtrace/backtrace.c b/common/backtrace/backtrace.c index a07c066ce..25e2c707b 100644 --- a/common/backtrace/backtrace.c +++ b/common/backtrace/backtrace.c @@ -261,7 +261,7 @@ void backtrace(const char *cookie) struct frame_record *fr = __builtin_frame_address(0U); /* Printing the backtrace may crash the system, flush before starting */ - (void)console_flush(); + console_flush(); fr = adjust_frame_record(fr); diff --git a/docs/about/release-information.rst b/docs/about/release-information.rst index f3167fb25..55c8bdaf4 100644 --- a/docs/about/release-information.rst +++ b/docs/about/release-information.rst @@ -42,7 +42,9 @@ depending on project requirement and partner feedback. +-----------------+---------------------------+------------------------------+ | v2.3 | 4th week of Apr '20 | 1st week of Apr '20 | +-----------------+---------------------------+------------------------------+ -| v2.4 | 4th week of Oct '20 | 1st week of Oct '20 | +| v2.4 | 2nd week of Nov '20 | 4th week of Oct '20 | ++-----------------+---------------------------+------------------------------+ +| v2.5 | 2nd week of May '21 | 4th week of Apr '21 | +-----------------+---------------------------+------------------------------+ Removal of Deprecated Interfaces @@ -57,9 +59,7 @@ Release version after which it will be removed. | | Date | after | | | | | Release | | +================================+=============+=========+=========================================================+ -| ``AARCH32``/``AARCH64`` macros | Oct '19 | v2.3 | Deprecated in favor of ``__aarch64__`` | -+--------------------------------+-------------+---------+---------------------------------------------------------+ -| ``__ASSEMBLY__`` macro | Oct '19 | v2.3 | Deprecated in favor of ``__ASSEMBLER__`` | +| | | | | +--------------------------------+-------------+---------+---------------------------------------------------------+ -------------- diff --git a/docs/getting_started/porting-guide.rst b/docs/getting_started/porting-guide.rst index f3316164b..19e26e4ea 100644 --- a/docs/getting_started/porting-guide.rst +++ b/docs/getting_started/porting-guide.rst @@ -2724,12 +2724,11 @@ Function : plat_crash_console_flush [mandatory] :: Argument : void - Return : int + Return : void This API is used by the crash reporting mechanism to force write of all buffered data on the designated crash console. It should only use general purpose -registers x0 through x5 to do its work. The return value is 0 on successful -completion; otherwise the return value is -1. +registers x0 through x5 to do its work. .. _External Abort handling and RAS Support: diff --git a/docs/plat/stm32mp1.rst b/docs/plat/stm32mp1.rst index 263867c25..f597460db 100644 --- a/docs/plat/stm32mp1.rst +++ b/docs/plat/stm32mp1.rst @@ -8,6 +8,23 @@ The STM32MP1 chip also embeds a Cortex-M4. More information can be found on `STM32MP1 Series`_ page. +STM32MP1 Versions +----------------- +The STM32MP1 series is available in 3 different lines which are pin-to-pin compatible: + +- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD +- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD +- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz + +Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option: + +- A Basic + Cortex-A7 @ 650 MHz +- C Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz +- D Basic + Cortex-A7 @ 800 MHz +- F Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz + +The `STM32MP1 part number codification`_ page gives more information about part numbers. + Design ------ The STM32MP1 resets in the ROM code of the Cortex-A7. @@ -129,3 +146,4 @@ OP-TEE artifacts go into separate partitions as follows: .. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html +.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification diff --git a/drivers/amlogic/console/aarch64/meson_console.S b/drivers/amlogic/console/aarch64/meson_console.S index 39c2545e7..6d0a2d62e 100644 --- a/drivers/amlogic/console/aarch64/meson_console.S +++ b/drivers/amlogic/console/aarch64/meson_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -224,11 +224,11 @@ func console_meson_core_getc endfunc console_meson_core_getc /* --------------------------------------------- - * int console_meson_flush(console_t *console) + * void console_meson_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ @@ -242,11 +242,11 @@ func console_meson_flush endfunc console_meson_flush /* --------------------------------------------- - * int console_meson_core_flush(uintptr_t base_addr) + * void console_meson_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ @@ -258,6 +258,5 @@ func console_meson_core_flush /* Wait until the transmit FIFO is empty */ 1: ldr w1, [x0, #MESON_STATUS_OFFSET] tbz w1, #MESON_STATUS_TX_EMPTY_BIT, 1b - mov w0, #0 ret endfunc console_meson_core_flush diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c index 4b21b920a..939d09718 100644 --- a/drivers/arm/gic/v2/gicv2_main.c +++ b/drivers/arm/gic/v2/gicv2_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -296,8 +296,8 @@ void gicv2_set_pe_target_mask(unsigned int proc_num) assert(driver_data != NULL); assert(driver_data->gicd_base != 0U); assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < GICV2_MAX_TARGET_PE); + assert(proc_num < driver_data->target_masks_num); /* Return if the target mask is already populated */ if (driver_data->target_masks[proc_num] != 0U) @@ -422,7 +422,8 @@ void gicv2_raise_sgi(int sgi_num, int proc_num) unsigned int sgir_val, target; assert(driver_data != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); + assert(proc_num >= 0); + assert(proc_num < (int)GICV2_MAX_TARGET_PE); assert(driver_data->gicd_base != 0U); /* @@ -430,7 +431,7 @@ void gicv2_raise_sgi(int sgi_num, int proc_num) * should be valid. */ assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < (int)driver_data->target_masks_num); /* Don't raise SGI if the mask hasn't been populated */ target = driver_data->target_masks[proc_num]; @@ -466,8 +467,9 @@ void gicv2_set_spi_routing(unsigned int id, int proc_num) * should be valid. */ assert(driver_data->target_masks != NULL); - assert((unsigned int)proc_num < GICV2_MAX_TARGET_PE); - assert((unsigned int)proc_num < driver_data->target_masks_num); + assert(proc_num < (int)GICV2_MAX_TARGET_PE); + assert(driver_data->target_masks_num < INT_MAX); + assert(proc_num < (int)driver_data->target_masks_num); if (proc_num < 0) { /* Target all PEs */ diff --git a/drivers/arm/pl011/aarch32/pl011_console.S b/drivers/arm/pl011/aarch32/pl011_console.S index 93045f03d..9caeb0c69 100644 --- a/drivers/arm/pl011/aarch32/pl011_console.S +++ b/drivers/arm/pl011/aarch32/pl011_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -222,17 +222,19 @@ func console_pl011_getc endfunc console_pl011_getc /* --------------------------------------------- - * int console_core_flush(uintptr_t base_addr) + * void console_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - console base address - * Out : return -1 on error else return 0. + * Out : void * Clobber list : r0, r1 * --------------------------------------------- */ func console_pl011_core_flush +#if ENABLE_ASSERTIONS cmp r0, #0 - beq flush_error + ASM_ASSERT(ne) +#endif /* ENABLE_ASSERTIONS */ 1: /* Loop while the transmit FIFO is busy */ @@ -240,19 +242,15 @@ func console_pl011_core_flush tst r1, #PL011_UARTFR_BUSY bne 1b - mov r0, #0 - bx lr -flush_error: - mov r0, #-1 bx lr endfunc console_pl011_core_flush /* --------------------------------------------- - * int console_pl011_flush(console_t *console) + * void console_pl011_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void * Clobber list: r0, r1 * --------------------------------------------- */ diff --git a/drivers/arm/pl011/aarch64/pl011_console.S b/drivers/arm/pl011/aarch64/pl011_console.S index 3a2a3cdb4..861d2ed22 100644 --- a/drivers/arm/pl011/aarch64/pl011_console.S +++ b/drivers/arm/pl011/aarch64/pl011_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -208,11 +208,11 @@ func console_pl011_getc endfunc console_pl011_getc /* --------------------------------------------- - * int console_pl011_core_flush(uintptr_t base_addr) + * void console_pl011_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ @@ -225,17 +225,15 @@ func console_pl011_core_flush /* Loop until the transmit FIFO is empty */ ldr w1, [x0, #UARTFR] tbnz w1, #PL011_UARTFR_BUSY_BIT, 1b - - mov w0, #0 ret endfunc console_pl011_core_flush /* --------------------------------------------- - * int console_pl011_flush(console_t *console) + * void console_pl011_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/drivers/cadence/uart/aarch64/cdns_console.S b/drivers/cadence/uart/aarch64/cdns_console.S index 8e5d6a1aa..d1995e3e6 100644 --- a/drivers/cadence/uart/aarch64/cdns_console.S +++ b/drivers/cadence/uart/aarch64/cdns_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -184,11 +184,11 @@ func console_cdns_getc endfunc console_cdns_getc /* --------------------------------------------- - * int console_cdns_core_flush(uintptr_t base_addr) + * void console_cdns_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void * Clobber list : x0, x1 * --------------------------------------------- */ @@ -198,16 +198,15 @@ func console_cdns_core_flush ASM_ASSERT(ne) #endif /* ENABLE_ASSERTIONS */ /* Placeholder */ - mov w0, #0 ret endfunc console_cdns_core_flush /* --------------------------------------------- - * int console_cdns_flush(console_t *console) + * void console_cdns_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/drivers/console/aarch32/skeleton_console.S b/drivers/console/aarch32/skeleton_console.S index c594f7edf..a9e13ec44 100644 --- a/drivers/console/aarch32/skeleton_console.S +++ b/drivers/console/aarch32/skeleton_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -149,7 +149,7 @@ endfunc console_xxx_getc * Function to force a write of all buffered * data that hasn't been output. * In : r0 - pointer to console_xxx_t struct - * Out: r0 - 0 on success, < 0 on error + * Out: void * Clobber list : r0, r1, r2, r3, r4, r5 * --------------------------------------------- */ @@ -166,11 +166,5 @@ func console_xxx_flush * all data has been flushed or there was an unrecoverable error. */ - mov r0, #0 - bx lr - - /* Jump here if an unrecoverable error has been encountered. */ -flush_error: - mov r0, #-1 bx lr endfunc console_xxx_flush diff --git a/drivers/console/aarch64/skeleton_console.S b/drivers/console/aarch64/skeleton_console.S index 9a8586775..7ea2eec9f 100644 --- a/drivers/console/aarch64/skeleton_console.S +++ b/drivers/console/aarch64/skeleton_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -145,11 +145,11 @@ getc_error: endfunc console_xxx_getc /* --------------------------------------------- - * int console_xxx_flush(console_xxx_t *console) + * void console_xxx_flush(console_xxx_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_xxx_t struct - * Out: w0 - 0 on success, < 0 on error + * Out: void * Clobber list : x0, x1, x2, x3, x4, x5 * --------------------------------------------- */ @@ -166,11 +166,5 @@ func console_xxx_flush * all data has been flushed or there was an unrecoverable error. */ - mov w0, #0 - ret - - /* Jump here if an unrecoverable error has been encountered. */ -flush_error: - mov w0, #-1 ret endfunc console_xxx_flush diff --git a/drivers/console/multi_console.c b/drivers/console/multi_console.c index 0665f202f..08b8e9fb1 100644 --- a/drivers/console/multi_console.c +++ b/drivers/console/multi_console.c @@ -119,17 +119,12 @@ int console_getc(void) return err; } -int console_flush(void) +void console_flush(void) { - int err = ERROR_NO_VALID_CONSOLE; console_t *console; for (console = console_list; console != NULL; console = console->next) if ((console->flags & console_state) && (console->flush != NULL)) { - int ret = console->flush(console); - if ((err == ERROR_NO_VALID_CONSOLE) || (ret < err)) - err = ret; + console->flush(console); } - - return err; } diff --git a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S index a4a7bf8f3..db07e6c0b 100644 --- a/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S +++ b/drivers/coreboot/cbmem_console/aarch64/cbmem_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -82,20 +82,17 @@ putc_write_back: endfunc console_cbmc_putc /* ----------------------------------------------- - * int console_cbmc_flush(console_cbmc_t *console) + * void console_cbmc_flush(console_cbmc_t *console) * Flushes the CBMEM console by flushing the * console buffer from the CPU's data cache. * In: x0 - pointer to console_cbmc_t struct - * Out: x0 - 0 for success - * Clobber list: x0, x1, x2, x3, x5 + * Out: void + * Clobber list: x0, x1, x2, x3 * ----------------------------------------------- */ func console_cbmc_flush - mov x5, x30 ldr x1, [x0, #CONSOLE_T_CBMC_SIZE] ldr x0, [x0, #CONSOLE_T_BASE] add x1, x1, #8 /* add size of console header */ - bl clean_dcache_range /* (clobbers x2 and x3) */ - mov x0, #0 - ret x5 + b clean_dcache_range /* (clobbers x2 and x3) */ endfunc console_cbmc_flush diff --git a/drivers/imx/uart/imx_uart.c b/drivers/imx/uart/imx_uart.c index 2c9652d19..dfe2e92b9 100644 --- a/drivers/imx/uart/imx_uart.c +++ b/drivers/imx/uart/imx_uart.c @@ -171,12 +171,11 @@ int console_imx_uart_core_getc(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - console base address - * Out : return -1 on error else return 0. + * Out : void * Clobber list : r0, r1 * --------------------------------------------- */ -int console_imx_uart_core_flush(uintptr_t base_addr) +void console_imx_uart_core_flush(uintptr_t base_addr) { - return 0; } diff --git a/drivers/marvell/uart/a3700_console.S b/drivers/marvell/uart/a3700_console.S index ecd494ca7..d184a2d24 100644 --- a/drivers/marvell/uart/a3700_console.S +++ b/drivers/marvell/uart/a3700_console.S @@ -223,25 +223,24 @@ func console_a3700_getc endfunc console_a3700_getc /* --------------------------------------------- - * int console_a3700_core_flush(uintptr_t base_addr) + * void console_a3700_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ func console_a3700_core_flush - mov w0, #0 ret endfunc console_a3700_core_flush /* --------------------------------------------- - * int console_a3700_flush(console_t *console) + * void console_a3700_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/drivers/renesas/rcar/console/rcar_console.S b/drivers/renesas/rcar/console/rcar_console.S index 4d006b703..29baa67a4 100644 --- a/drivers/renesas/rcar/console/rcar_console.S +++ b/drivers/renesas/rcar/console/rcar_console.S @@ -82,15 +82,12 @@ func console_rcar_putc endfunc console_rcar_putc /* --------------------------------------------- - * int console_rcar_flush(void) + * void console_rcar_flush(void) * Function to force a write of all buffered - * data that hasn't been output. It returns 0 - * upon successful completion, otherwise it - * returns -1. + * data that hasn't been output. It returns void * Clobber list : x0, x1 * --------------------------------------------- */ func console_rcar_flush - mov w0, #0 ret endfunc console_rcar_flush diff --git a/drivers/renesas/rcar/scif/scif.S b/drivers/renesas/rcar/scif/scif.S index 064aba471..ae26cc402 100644 --- a/drivers/renesas/rcar/scif/scif.S +++ b/drivers/renesas/rcar/scif/scif.S @@ -305,11 +305,9 @@ func console_rcar_putc endfunc console_rcar_putc /* --------------------------------------------- - * int console_rcar_flush(void) + * void console_rcar_flush(void) * Function to force a write of all buffered - * data that hasn't been output. It returns 0 - * upon successful completion, otherwise it - * returns -1. + * data that hasn't been output. It returns void * Clobber list : x0, x1 * --------------------------------------------- */ @@ -327,6 +325,5 @@ func console_rcar_flush and w1, w1, #~(SCSCR_TE_EN + SCSCR_RE_EN) strh w1, [x0, #SCIF_SCSCR] - mov w0, #0 ret endfunc console_rcar_flush diff --git a/drivers/st/clk/stm32mp1_clk.c b/drivers/st/clk/stm32mp1_clk.c index f8bc5a217..564bd8798 100644 --- a/drivers/st/clk/stm32mp1_clk.c +++ b/drivers/st/clk/stm32mp1_clk.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved + * Copyright (C) 2018-2020, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ @@ -1664,28 +1664,26 @@ static void stm32mp1_set_rtcsrc(unsigned int clksrc, bool lse_css) static void stm32mp1_stgen_config(void) { - uintptr_t stgen; uint32_t cntfid0; unsigned long rate; unsigned long long counter; - stgen = fdt_get_stgen_base(); - cntfid0 = mmio_read_32(stgen + CNTFID_OFF); + cntfid0 = mmio_read_32(STGEN_BASE + CNTFID_OFF); rate = get_clock_rate(stm32mp1_clk_get_parent(STGEN_K)); if (cntfid0 == rate) { return; } - mmio_clrbits_32(stgen + CNTCR_OFF, CNTCR_EN); - counter = (unsigned long long)mmio_read_32(stgen + CNTCVL_OFF); - counter |= ((unsigned long long)mmio_read_32(stgen + CNTCVU_OFF)) << 32; + mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN); + counter = (unsigned long long)mmio_read_32(STGEN_BASE + CNTCVL_OFF); + counter |= ((unsigned long long)mmio_read_32(STGEN_BASE + CNTCVU_OFF)) << 32; counter = (counter * rate / cntfid0); - mmio_write_32(stgen + CNTCVL_OFF, (uint32_t)counter); - mmio_write_32(stgen + CNTCVU_OFF, (uint32_t)(counter >> 32)); - mmio_write_32(stgen + CNTFID_OFF, rate); - mmio_setbits_32(stgen + CNTCR_OFF, CNTCR_EN); + mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)counter); + mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(counter >> 32)); + mmio_write_32(STGEN_BASE + CNTFID_OFF, rate); + mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN); write_cntfrq((u_register_t)rate); @@ -1695,20 +1693,17 @@ static void stm32mp1_stgen_config(void) void stm32mp1_stgen_increment(unsigned long long offset_in_ms) { - uintptr_t stgen; unsigned long long cnt; - stgen = fdt_get_stgen_base(); + cnt = ((unsigned long long)mmio_read_32(STGEN_BASE + CNTCVU_OFF) << 32) | + mmio_read_32(STGEN_BASE + CNTCVL_OFF); - cnt = ((unsigned long long)mmio_read_32(stgen + CNTCVU_OFF) << 32) | - mmio_read_32(stgen + CNTCVL_OFF); + cnt += (offset_in_ms * mmio_read_32(STGEN_BASE + CNTFID_OFF)) / 1000U; - cnt += (offset_in_ms * mmio_read_32(stgen + CNTFID_OFF)) / 1000U; - - mmio_clrbits_32(stgen + CNTCR_OFF, CNTCR_EN); - mmio_write_32(stgen + CNTCVL_OFF, (uint32_t)cnt); - mmio_write_32(stgen + CNTCVU_OFF, (uint32_t)(cnt >> 32)); - mmio_setbits_32(stgen + CNTCR_OFF, CNTCR_EN); + mmio_clrbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN); + mmio_write_32(STGEN_BASE + CNTCVL_OFF, (uint32_t)cnt); + mmio_write_32(STGEN_BASE + CNTCVU_OFF, (uint32_t)(cnt >> 32)); + mmio_setbits_32(STGEN_BASE + CNTCR_OFF, CNTCR_EN); } static void stm32mp1_pkcs_config(uint32_t pkcs) diff --git a/drivers/st/clk/stm32mp_clkfunc.c b/drivers/st/clk/stm32mp_clkfunc.c index e87ab1ba7..8333f6dfb 100644 --- a/drivers/st/clk/stm32mp_clkfunc.c +++ b/drivers/st/clk/stm32mp_clkfunc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved + * Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,8 +14,6 @@ #include <drivers/st/stm32_gpio.h> #include <drivers/st/stm32mp_clkfunc.h> -#define DT_STGEN_COMPAT "st,stm32-stgen" - /* * Get the frequency of an oscillator from its name in device tree. * @param name: oscillator name @@ -169,33 +167,6 @@ int fdt_get_rcc_node(void *fdt) } /* - * Get the RCC base address from the device tree - * @return: RCC address or 0 on error - */ -uint32_t fdt_rcc_read_addr(void) -{ - int node; - void *fdt; - const fdt32_t *cuint; - - if (fdt_get_address(&fdt) == 0) { - return 0; - } - - node = fdt_get_rcc_node(fdt); - if (node < 0) { - return 0; - } - - cuint = fdt_getprop(fdt, node, "reg", NULL); - if (cuint == NULL) { - return 0; - } - - return fdt32_to_cpu(*cuint); -} - -/* * Read a series of parameters in rcc-clk section in device tree * @param prop_name: Name of the RCC property to be read * @param array: the array to store the property parameters @@ -299,33 +270,6 @@ bool fdt_get_rcc_secure_status(void) } /* - * Get the stgen base address. - * @return: address of stgen on success, and NULL value on failure. - */ -uintptr_t fdt_get_stgen_base(void) -{ - int node; - const fdt32_t *cuint; - void *fdt; - - if (fdt_get_address(&fdt) == 0) { - return 0; - } - - node = fdt_node_offset_by_compatible(fdt, -1, DT_STGEN_COMPAT); - if (node < 0) { - return 0; - } - - cuint = fdt_getprop(fdt, node, "reg", NULL); - if (cuint == NULL) { - return 0; - } - - return fdt32_to_cpu(*cuint); -} - -/* * Get the clock ID of the given node in device tree. * @param node: node offset * @return: Clock ID on success, and a negative FDT/ERRNO error code on failure. diff --git a/drivers/st/fmc/stm32_fmc2_nand.c b/drivers/st/fmc/stm32_fmc2_nand.c index 5eee4f3b9..a58a243ad 100644 --- a/drivers/st/fmc/stm32_fmc2_nand.c +++ b/drivers/st/fmc/stm32_fmc2_nand.c @@ -26,8 +26,10 @@ #define TIMEOUT_US_1_MS 1000U /* FMC2 Compatibility */ -#define DT_FMC2_COMPAT "st,stm32mp15-fmc2" +#define DT_FMC2_EBI_COMPAT "st,stm32mp1-fmc2-ebi" +#define DT_FMC2_NFC_COMPAT "st,stm32mp1-fmc2-nfc" #define MAX_CS 2U +#define MAX_BANK 5U /* FMC2 Controller Registers */ #define FMC2_BCR1 0x00U @@ -793,23 +795,26 @@ static const struct nand_ctrl_ops ctrl_ops = { int stm32_fmc2_init(void) { - int fmc_node; - int fmc_subnode = 0; + int fmc_ebi_node; + int fmc_nfc_node; + int fmc_flash_node = 0; int nchips = 0; unsigned int i; void *fdt = NULL; const fdt32_t *cuint; struct dt_node_info info; + uintptr_t bank_address[MAX_BANK] = { 0, 0, 0, 0, 0 }; + uint8_t bank_assigned = 0; + uint8_t bank; int ret; if (fdt_get_address(&fdt) == 0) { return -FDT_ERR_NOTFOUND; } - fmc_node = dt_get_node(&info, -1, DT_FMC2_COMPAT); - if (fmc_node == -FDT_ERR_NOTFOUND) { - WARN("No FMC2 node found\n"); - return fmc_node; + fmc_ebi_node = dt_get_node(&info, -1, DT_FMC2_EBI_COMPAT); + if (fmc_ebi_node < 0) { + return fmc_ebi_node; } if (info.status == DT_DISABLED) { @@ -825,27 +830,69 @@ int stm32_fmc2_init(void) stm32_fmc2.clock_id = (unsigned long)info.clock; stm32_fmc2.reset_id = (unsigned int)info.reset; - cuint = fdt_getprop(fdt, fmc_node, "reg", NULL); + cuint = fdt_getprop(fdt, fmc_ebi_node, "ranges", NULL); if (cuint == NULL) { return -FDT_ERR_BADVALUE; } - cuint += 2; - - for (i = 0U; i < MAX_CS; i++) { - stm32_fmc2.cs[i].data_base = fdt32_to_cpu(*cuint); - stm32_fmc2.cs[i].cmd_base = fdt32_to_cpu(*(cuint + 2)); - stm32_fmc2.cs[i].addr_base = fdt32_to_cpu(*(cuint + 4)); - cuint += 6; + for (i = 0U; i < MAX_BANK; i++) { + bank = fdt32_to_cpu(*cuint); + if ((bank >= MAX_BANK) || ((bank_assigned & BIT(bank)) != 0U)) { + return -FDT_ERR_BADVALUE; + } + bank_assigned |= BIT(bank); + bank_address[bank] = fdt32_to_cpu(*(cuint + 2)); + cuint += 4; } /* Pinctrl initialization */ - if (dt_set_pinctrl_config(fmc_node) != 0) { + if (dt_set_pinctrl_config(fmc_ebi_node) != 0) { return -FDT_ERR_BADVALUE; } + /* Parse NFC controller node */ + fmc_nfc_node = fdt_node_offset_by_compatible(fdt, fmc_ebi_node, + DT_FMC2_NFC_COMPAT); + if (fmc_nfc_node < 0) { + return fmc_nfc_node; + } + + if (fdt_get_status(fmc_nfc_node) == DT_DISABLED) { + return -FDT_ERR_NOTFOUND; + } + + cuint = fdt_getprop(fdt, fmc_nfc_node, "reg", NULL); + if (cuint == NULL) { + return -FDT_ERR_BADVALUE; + } + + for (i = 0U; i < MAX_CS; i++) { + bank = fdt32_to_cpu(*cuint); + if (bank >= MAX_BANK) { + return -FDT_ERR_BADVALUE; + } + stm32_fmc2.cs[i].data_base = fdt32_to_cpu(*(cuint + 1)) + + bank_address[bank]; + + bank = fdt32_to_cpu(*(cuint + 3)); + if (bank >= MAX_BANK) { + return -FDT_ERR_BADVALUE; + } + stm32_fmc2.cs[i].cmd_base = fdt32_to_cpu(*(cuint + 4)) + + bank_address[bank]; + + bank = fdt32_to_cpu(*(cuint + 6)); + if (bank >= MAX_BANK) { + return -FDT_ERR_BADVALUE; + } + stm32_fmc2.cs[i].addr_base = fdt32_to_cpu(*(cuint + 7)) + + bank_address[bank]; + + cuint += 9; + } + /* Parse flash nodes */ - fdt_for_each_subnode(fmc_subnode, fdt, fmc_node) { + fdt_for_each_subnode(fmc_flash_node, fdt, fmc_nfc_node) { nchips++; } @@ -854,14 +901,19 @@ int stm32_fmc2_init(void) return -FDT_ERR_BADVALUE; } - fdt_for_each_subnode(fmc_subnode, fdt, fmc_node) { + fdt_for_each_subnode(fmc_flash_node, fdt, fmc_nfc_node) { /* Get chip select */ - cuint = fdt_getprop(fdt, fmc_subnode, "reg", NULL); + cuint = fdt_getprop(fdt, fmc_flash_node, "reg", NULL); if (cuint == NULL) { WARN("Chip select not well defined\n"); return -FDT_ERR_BADVALUE; } + stm32_fmc2.cs_sel = fdt32_to_cpu(*cuint); + if (stm32_fmc2.cs_sel >= MAX_CS) { + return -FDT_ERR_BADVALUE; + } + VERBOSE("NAND CS %i\n", stm32_fmc2.cs_sel); } diff --git a/drivers/st/uart/aarch32/stm32_console.S b/drivers/st/uart/aarch32/stm32_console.S index 0ed37d1bd..686b18b96 100644 --- a/drivers/st/uart/aarch32/stm32_console.S +++ b/drivers/st/uart/aarch32/stm32_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -193,37 +193,35 @@ func console_stm32_core_getc endfunc console_stm32_core_getc /* --------------------------------------------------------------- - * int console_core_flush(uintptr_t base_addr) + * void console_core_flush(uintptr_t base_addr) * * Function to force a write of all buffered data that hasn't been * output. * * In : r0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0, r1 * --------------------------------------------------------------- */ func console_stm32_core_flush +#if ENABLE_ASSERTIONS cmp r0, #0 - beq flush_error + ASM_ASSERT(ne) +#endif /* ENABLE_ASSERTIONS */ /* Check Transmit Data Register Empty */ txe_loop_3: ldr r1, [r0, #USART_ISR] tst r1, #USART_ISR_TXE beq txe_loop_3 - mov r0, #0 - bx lr -flush_error: - mov r0, #-1 bx lr endfunc console_stm32_core_flush /* ------------------------------------------------------ - * int console_stm32_flush(console_t *console) + * void console_stm32_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list: r0, r1 * ------------------------------------------------------ */ diff --git a/drivers/ti/uart/aarch32/16550_console.S b/drivers/ti/uart/aarch32/16550_console.S index bc0b3ab1c..0429f8702 100644 --- a/drivers/ti/uart/aarch32/16550_console.S +++ b/drivers/ti/uart/aarch32/16550_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -232,11 +232,11 @@ func console_16550_getc endfunc console_16550_getc /* --------------------------------------------- - * int console_16550_core_flush(uintptr_t base_addr) + * void console_16550_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0, r1 * --------------------------------------------- */ @@ -252,16 +252,15 @@ func console_16550_core_flush cmp r1, #(UARTLSR_TEMT | UARTLSR_THRE) bne 1b - mov r0, #0 bx lr endfunc console_16550_core_flush /* --------------------------------------------- - * int console_16550_flush(console_t *console) + * void console_16550_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : r0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void * Clobber list : r0, r1 * --------------------------------------------- */ diff --git a/drivers/ti/uart/aarch64/16550_console.S b/drivers/ti/uart/aarch64/16550_console.S index 064022798..cb2151253 100644 --- a/drivers/ti/uart/aarch64/16550_console.S +++ b/drivers/ti/uart/aarch64/16550_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -225,11 +225,11 @@ func console_16550_getc endfunc console_16550_getc /* --------------------------------------------- - * int console_16550_core_flush(uintptr_t base_addr) + * void console_16550_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ @@ -245,16 +245,15 @@ func console_16550_core_flush cmp w1, #(UARTLSR_TEMT | UARTLSR_THRE) b.ne 1b - mov w0, #0 ret endfunc console_16550_core_flush /* --------------------------------------------- - * int console_16550_flush(console_t *console) + * void console_16550_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/fdts/stm32mp151.dtsi b/fdts/stm32mp151.dtsi index 2eb4a3943..8f175a649 100644 --- a/fdts/stm32mp151.dtsi +++ b/fdts/stm32mp151.dtsi @@ -264,19 +264,34 @@ status = "disabled"; }; - fmc: nand-controller@58002000 { - compatible = "st,stm32mp15-fmc2"; - reg = <0x58002000 0x1000>, - <0x80000000 0x1000>, - <0x88010000 0x1000>, - <0x88020000 0x1000>, - <0x81000000 0x1000>, - <0x89010000 0x1000>, - <0x89020000 0x1000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + fmc: memory-controller@58002000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; clocks = <&rcc FMC_K>; resets = <&rcc FMC_R>; status = "disabled"; + + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + + nand-controller@4,0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; qspi: spi@58003000 { diff --git a/fdts/stm32mp157c-ev1.dts b/fdts/stm32mp157c-ev1.dts index 50c0b939b..c5d12e3b2 100644 --- a/fdts/stm32mp157c-ev1.dts +++ b/fdts/stm32mp157c-ev1.dts @@ -24,11 +24,16 @@ pinctrl-names = "default"; pinctrl-0 = <&fmc_pins_a>; status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - nand: nand@0 { - reg = <0>; + nand-controller@4,0 { + status = "okay"; + + nand@0 { + reg = <0>; + nand-on-flash-bbt; + #address-cells = <1>; + #size-cells = <1>; + }; }; }; diff --git a/include/common/debug.h b/include/common/debug.h index 9aef15b51..ed0e8bf97 100644 --- a/include/common/debug.h +++ b/include/common/debug.h @@ -101,7 +101,7 @@ void __dead2 do_panic(void); #define panic() \ do { \ backtrace(__func__); \ - (void)console_flush(); \ + console_flush(); \ do_panic(); \ } while (false) diff --git a/include/drivers/console.h b/include/drivers/console.h index 761816ac7..99bf96041 100644 --- a/include/drivers/console.h +++ b/include/drivers/console.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -43,7 +43,7 @@ typedef struct console { u_register_t flags; int (*const putc)(int character, struct console *console); int (*const getc)(struct console *console); - int (*const flush)(struct console *console); + void (*const flush)(struct console *console); uintptr_t base; /* Additional private driver data may follow here. */ } console_t; @@ -76,7 +76,7 @@ int console_putc(int c); /* Read a character (blocking) from any console registered for current state. */ int console_getc(void); /* Flush all consoles registered for the current state. */ -int console_flush(void); +void console_flush(void); #endif /* __ASSEMBLER__ */ diff --git a/include/drivers/marvell/cache_llc.h b/include/drivers/marvell/cache_llc.h index d6dd65382..72111b374 100644 --- a/include/drivers/marvell/cache_llc.h +++ b/include/drivers/marvell/cache_llc.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018 Marvell International Ltd. + * Copyright (C) 2018-2020 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses @@ -57,6 +57,6 @@ int llc_sram_enable(int ap_index, int size); void llc_sram_disable(int ap_index); int llc_sram_test(int ap_index, int size, char *msg); #endif /* LLC_SRAM */ -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* CACHE_LLC_H */ diff --git a/include/drivers/st/stm32mp_clkfunc.h b/include/drivers/st/stm32mp_clkfunc.h index 0902f445d..c7e0b6e6f 100644 --- a/include/drivers/st/stm32mp_clkfunc.h +++ b/include/drivers/st/stm32mp_clkfunc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved + * Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,14 +20,12 @@ uint32_t fdt_osc_read_uint32_default(enum stm32mp_osc_id osc_id, uint32_t dflt_value); int fdt_get_rcc_node(void *fdt); -uint32_t fdt_rcc_read_addr(void); int fdt_rcc_read_uint32_array(const char *prop_name, uint32_t count, uint32_t *array); int fdt_rcc_subnode_offset(const char *name); const fdt32_t *fdt_rcc_read_prop(const char *prop_name, int *lenp); bool fdt_get_rcc_secure_status(void); -uintptr_t fdt_get_stgen_base(void); int fdt_get_clock_id(int node); #endif /* STM32MP_CLKFUNC_H */ diff --git a/include/lib/coreboot.h b/include/lib/coreboot.h index dda3173a2..0aa65791d 100644 --- a/include/lib/coreboot.h +++ b/include/lib/coreboot.h @@ -39,7 +39,7 @@ typedef enum { CB_MEM_TABLE = 16, } coreboot_memory_t; -coreboot_memory_t coreboot_get_memory_type(uintptr_t address); +coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size); void coreboot_table_setup(void *base); #endif /* COREBOOT_H */ diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index 2c1a180c8..ebcc85577 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -111,7 +111,7 @@ uintptr_t plat_get_my_stack(void); void plat_report_exception(unsigned int exception_type); int plat_crash_console_init(void); int plat_crash_console_putc(int c); -int plat_crash_console_flush(void); +void plat_crash_console_flush(void); void plat_error_handler(int err) __dead2; void plat_panic_handler(void) __dead2; const char *plat_log_get_prefix(unsigned int log_level); diff --git a/lib/coreboot/coreboot_table.c b/lib/coreboot/coreboot_table.c index c4cd1d752..fb31ef1e0 100644 --- a/lib/coreboot/coreboot_table.c +++ b/lib/coreboot/coreboot_table.c @@ -89,7 +89,7 @@ static void setup_cbmem_console(uintptr_t baseaddr) CONSOLE_FLAG_CRASH); } -coreboot_memory_t coreboot_get_memory_type(uintptr_t address) +coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size) { int i; @@ -98,9 +98,11 @@ coreboot_memory_t coreboot_get_memory_type(uintptr_t address) if (range->type == CB_MEM_NONE) break; /* end of table reached */ - if (address >= range->start && - address - range->start < range->size) + if ((start >= range->start) && + (start - range->start < range->size) && + (size <= range->size - (start - range->start))) { return range->type; + } } return CB_MEM_NONE; diff --git a/lib/libc/assert.c b/lib/libc/assert.c index 49f59db16..ff987b3be 100644 --- a/lib/libc/assert.c +++ b/lib/libc/assert.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -23,7 +23,7 @@ void __dead2 __assert(const char *file, unsigned int line, { printf("ASSERT: %s:%d:%s\n", file, line, assertion); backtrace("assert"); - (void)console_flush(); + console_flush(); plat_panic_handler(); } #elif PLAT_LOG_LEVEL_ASSERT >= LOG_LEVEL_INFO @@ -31,14 +31,14 @@ void __dead2 __assert(const char *file, unsigned int line) { printf("ASSERT: %s:%d\n", file, line); backtrace("assert"); - (void)console_flush(); + console_flush(); plat_panic_handler(); } #else void __dead2 __assert(void) { backtrace("assert"); - (void)console_flush(); + console_flush(); plat_panic_handler(); } #endif diff --git a/lib/psci/psci_system_off.c b/lib/psci/psci_system_off.c index 141d69ef2..002392cad 100644 --- a/lib/psci/psci_system_off.c +++ b/lib/psci/psci_system_off.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -25,7 +25,7 @@ void __dead2 psci_system_off(void) psci_spd_pm->svc_system_off(); } - (void) console_flush(); + console_flush(); /* Call the platform specific hook */ psci_plat_pm_ops->system_off(); @@ -44,7 +44,7 @@ void __dead2 psci_system_reset(void) psci_spd_pm->svc_system_reset(); } - (void) console_flush(); + console_flush(); /* Call the platform specific hook */ psci_plat_pm_ops->system_reset(); @@ -77,7 +77,7 @@ u_register_t psci_system_reset2(uint32_t reset_type, u_register_t cookie) if ((psci_spd_pm != NULL) && (psci_spd_pm->svc_system_reset != NULL)) { psci_spd_pm->svc_system_reset(); } - (void) console_flush(); + console_flush(); return (u_register_t) psci_plat_pm_ops->system_reset2((int) is_vendor, reset_type, diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index 7220a5d76..bc4982d64 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2016-2020, ARM Limited. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -150,6 +150,10 @@ GICV2_G0_FOR_EL3 := 0 # by lower ELs. HANDLE_EA_EL3_FIRST := 0 +# Secure hash algorithm flag, accepts 3 values: sha256, sha384 and sha512. +# The default value is sha256. +HASH_ALG := sha256 + # Whether system coherency is managed in hardware, without explicit software # operations. HW_ASSISTED_COHERENCY := 0 diff --git a/plat/amlogic/common/aarch64/aml_helpers.S b/plat/amlogic/common/aarch64/aml_helpers.S index 39bff0833..159c7d17f 100644 --- a/plat/amlogic/common/aarch64/aml_helpers.S +++ b/plat/amlogic/common/aarch64/aml_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -78,8 +78,8 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() - * Out : return -1 on error else return 0. + * void plat_crash_console_flush() + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/arm/board/fvp/fvp_console.c b/plat/arm/board/fvp/fvp_console.c index 928b47bf1..1a6cd4202 100644 --- a/plat/arm/board/fvp/fvp_console.c +++ b/plat/arm/board/fvp/fvp_console.c @@ -49,6 +49,6 @@ void arm_console_runtime_init(void) void arm_console_runtime_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&fvp_runtime_console); } diff --git a/plat/arm/board/fvp/fvp_err.c b/plat/arm/board/fvp/fvp_err.c index 62ac882b0..c9b20905f 100644 --- a/plat/arm/board/fvp/fvp_err.c +++ b/plat/arm/board/fvp/fvp_err.c @@ -37,7 +37,7 @@ __dead2 void plat_arm_error_handler(int err) break; } - (void)console_flush(); + console_flush(); /* Setup the watchdog to reset the system as soon as possible */ sp805_refresh(ARM_SP805_TWDG_BASE, 1U); diff --git a/plat/arm/common/aarch32/arm_helpers.S b/plat/arm/common/aarch32/arm_helpers.S index badddd3a9..1da2d4cad 100644 --- a/plat/arm/common/aarch32/arm_helpers.S +++ b/plat/arm/common/aarch32/arm_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -64,10 +64,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0 * --------------------------------------------- */ diff --git a/plat/arm/common/aarch64/arm_helpers.S b/plat/arm/common/aarch64/arm_helpers.S index 06720589a..b47078173 100644 --- a/plat/arm/common/aarch64/arm_helpers.S +++ b/plat/arm/common/aarch64/arm_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -66,10 +66,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0 * --------------------------------------------- */ diff --git a/plat/arm/common/arm_console.c b/plat/arm/common/arm_console.c index c2281c42d..af5f11e46 100644 --- a/plat/arm/common/arm_console.c +++ b/plat/arm/common/arm_console.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -43,7 +43,7 @@ void __init arm_console_boot_init(void) void arm_console_boot_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&arm_boot_console); } @@ -62,5 +62,5 @@ void arm_console_runtime_init(void) void arm_console_runtime_end(void) { - (void)console_flush(); + console_flush(); } diff --git a/plat/brcm/board/common/bcm_console.c b/plat/brcm/board/common/bcm_console.c index d484a6f63..5f2009403 100644 --- a/plat/brcm/board/common/bcm_console.c +++ b/plat/brcm/board/common/bcm_console.c @@ -39,7 +39,7 @@ void bcm_console_boot_init(void) void bcm_console_boot_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&bcm_boot_console); } @@ -59,7 +59,7 @@ void bcm_console_runtime_init(void) void bcm_console_runtime_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&bcm_runtime_console); } diff --git a/plat/brcm/board/stingray/aarch64/plat_helpers.S b/plat/brcm/board/stingray/aarch64/plat_helpers.S index 609553248..9a2039daf 100644 --- a/plat/brcm/board/stingray/aarch64/plat_helpers.S +++ b/plat/brcm/board/stingray/aarch64/plat_helpers.S @@ -182,7 +182,7 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush(void) + * void plat_crash_console_flush(void) * Function to flush crash console * Clobber list : x0, x1 * --------------------------------------------- diff --git a/plat/brcm/board/stingray/src/brcm_pm_ops.c b/plat/brcm/board/stingray/src/brcm_pm_ops.c index 090fbca53..03a604c15 100644 --- a/plat/brcm/board/stingray/src/brcm_pm_ops.c +++ b/plat/brcm/board/stingray/src/brcm_pm_ops.c @@ -323,7 +323,7 @@ static int brcm_validate_ns_entrypoint(uintptr_t entrypoint) if ((entrypoint >= BRCM_NS_DRAM1_BASE) && (entrypoint < (BRCM_NS_DRAM1_BASE + BRCM_NS_DRAM1_SIZE))) return PSCI_E_SUCCESS; -#ifndef AARCH32 +#ifdef __aarch64__ if ((entrypoint >= BRCM_DRAM2_BASE) && (entrypoint < (BRCM_DRAM2_BASE + BRCM_DRAM2_SIZE))) return PSCI_E_SUCCESS; diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c index b8a4d012e..ba4c366a9 100644 --- a/plat/common/aarch64/plat_common.c +++ b/plat/common/aarch64/plat_common.c @@ -96,7 +96,7 @@ void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie, #if HANDLE_EA_EL3_FIRST /* Skip backtrace for lower EL */ if (level != MODE_EL3) { - (void)console_flush(); + console_flush(); do_panic(); } #endif diff --git a/plat/hisilicon/hikey/aarch64/hikey_helpers.S b/plat/hisilicon/hikey/aarch64/hikey_helpers.S index 1752d3bb9..82a404ad3 100644 --- a/plat/hisilicon/hikey/aarch64/hikey_helpers.S +++ b/plat/hisilicon/hikey/aarch64/hikey_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -62,10 +62,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S index 606f2d0f9..5381369bc 100644 --- a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S +++ b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -66,10 +66,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/hisilicon/poplar/aarch64/poplar_helpers.S b/plat/hisilicon/poplar/aarch64/poplar_helpers.S index 928dbefcc..063ee6494 100644 --- a/plat/hisilicon/poplar/aarch64/poplar_helpers.S +++ b/plat/hisilicon/poplar/aarch64/poplar_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -65,10 +65,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0 * --------------------------------------------- */ diff --git a/plat/imx/common/imx_uart_console.S b/plat/imx/common/imx_uart_console.S index 0cb4fb870..ceeb3a76c 100644 --- a/plat/imx/common/imx_uart_console.S +++ b/plat/imx/common/imx_uart_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -84,6 +84,5 @@ getc_error: endfunc console_imx_uart_getc func console_imx_uart_flush - mov x0, #0 ret endfunc console_imx_uart_flush diff --git a/plat/imx/common/lpuart_console.S b/plat/imx/common/lpuart_console.S index 98b358807..ff01e3551 100644 --- a/plat/imx/common/lpuart_console.S +++ b/plat/imx/common/lpuart_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -72,6 +72,5 @@ getc_error: endfunc console_lpuart_getc func console_lpuart_flush - mov x0, #0 ret endfunc console_lpuart_flush diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk index 8f857d1e6..814d9c663 100644 --- a/plat/intel/soc/agilex/platform.mk +++ b/plat/intel/soc/agilex/platform.mk @@ -10,16 +10,20 @@ PLAT_INCLUDES := \ -Iplat/intel/soc/common/drivers/ \ -Iplat/intel/soc/common/include/ +# Include GICv2 driver files +include drivers/arm/gic/v2/gicv2.mk +AGX_GICv2_SOURCES := \ + ${GICV2_SOURCES} \ + plat/common/plat_gicv2.c + + PLAT_BL_COMMON_SOURCES := \ - drivers/arm/gic/common/gic_common.c \ - drivers/arm/gic/v2/gicv2_main.c \ - drivers/arm/gic/v2/gicv2_helpers.c \ + ${AGX_GICv2_SOURCES} \ drivers/delay_timer/delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \ drivers/ti/uart/aarch64/16550_console.S \ lib/xlat_tables/aarch64/xlat_tables.c \ lib/xlat_tables/xlat_tables_common.c \ - plat/common/plat_gicv2.c \ plat/intel/soc/common/aarch64/platform_common.c \ plat/intel/soc/common/aarch64/plat_helpers.S diff --git a/plat/intel/soc/stratix10/platform.mk b/plat/intel/soc/stratix10/platform.mk index 112317b7b..3bd6af9ce 100644 --- a/plat/intel/soc/stratix10/platform.mk +++ b/plat/intel/soc/stratix10/platform.mk @@ -10,16 +10,20 @@ PLAT_INCLUDES := \ -Iplat/intel/soc/common/drivers/ \ -Iplat/intel/soc/common/include/ +# Include GICv2 driver files +include drivers/arm/gic/v2/gicv2.mk +AGX_GICv2_SOURCES := \ + ${GICV2_SOURCES} \ + plat/common/plat_gicv2.c + + PLAT_BL_COMMON_SOURCES := \ - drivers/arm/gic/common/gic_common.c \ - drivers/arm/gic/v2/gicv2_main.c \ - drivers/arm/gic/v2/gicv2_helpers.c \ + ${AGX_GICv2_SOURCES} \ drivers/delay_timer/delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \ drivers/ti/uart/aarch64/16550_console.S \ lib/xlat_tables/aarch64/xlat_tables.c \ lib/xlat_tables/xlat_tables_common.c \ - plat/common/plat_gicv2.c \ plat/intel/soc/common/aarch64/platform_common.c \ plat/intel/soc/common/aarch64/plat_helpers.S diff --git a/plat/layerscape/common/aarch64/ls_console.S b/plat/layerscape/common/aarch64/ls_console.S index c1bd3f731..fb8267bc0 100644 --- a/plat/layerscape/common/aarch64/ls_console.S +++ b/plat/layerscape/common/aarch64/ls_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -214,11 +214,11 @@ func console_ls_16550_getc endfunc console_ls_16550_getc /* --------------------------------------------- - * int console_ls_16550_core_flush(uintptr_t base_addr) + * void console_ls_16550_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void * Clobber list : x0, x1 * --------------------------------------------- */ @@ -234,16 +234,15 @@ func console_ls_16550_core_flush cmp w1, #(UARTLSR_TEMT | UARTLSR_THRE) b.ne 1b - mov w0, #0 ret endfunc console_ls_16550_core_flush /* --------------------------------------------- - * int console_ls_16550_flush(console_t *console) + * void console_ls_16550_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/marvell/armada/common/aarch64/marvell_helpers.S b/plat/marvell/armada/common/aarch64/marvell_helpers.S index 4ddc73db5..b798f17c5 100644 --- a/plat/marvell/armada/common/aarch64/marvell_helpers.S +++ b/plat/marvell/armada/common/aarch64/marvell_helpers.S @@ -1,4 +1,5 @@ /* + * Copyright (c) 2020, ARM Limited. All rights reserved. * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause @@ -90,10 +91,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0 * --------------------------------------------- */ diff --git a/plat/marvell/armada/common/marvell_console.c b/plat/marvell/armada/common/marvell_console.c index 17166618a..c84b004be 100644 --- a/plat/marvell/armada/common/marvell_console.c +++ b/plat/marvell/armada/common/marvell_console.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -49,7 +49,7 @@ void marvell_console_boot_init(void) void marvell_console_boot_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&marvell_boot_console); } @@ -70,7 +70,7 @@ void marvell_console_runtime_init(void) void marvell_console_runtime_end(void) { - (void)console_flush(); + console_flush(); (void)console_unregister(&marvell_runtime_console); } diff --git a/plat/mediatek/common/drivers/uart/8250_console.S b/plat/mediatek/common/drivers/uart/8250_console.S index 94a6c02ab..7a946f9a3 100644 --- a/plat/mediatek/common/drivers/uart/8250_console.S +++ b/plat/mediatek/common/drivers/uart/8250_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -149,16 +149,15 @@ getc_error: endfunc console_core_getc /* --------------------------------------------- - * int console_core_flush(uintptr_t base_addr) + * void console_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ func console_core_flush /* Placeholder */ - mov w0, #0 ret endfunc console_core_flush diff --git a/plat/mediatek/mt6795/aarch64/plat_helpers.S b/plat/mediatek/mt6795/aarch64/plat_helpers.S index 94f9eaef9..aaddb2bba 100644 --- a/plat/mediatek/mt6795/aarch64/plat_helpers.S +++ b/plat/mediatek/mt6795/aarch64/plat_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -123,10 +123,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush(int c) + * void plat_crash_console_flush(int c) * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c index 27dd3a290..ec34a850d 100644 --- a/plat/nvidia/tegra/common/tegra_pm.c +++ b/plat/nvidia/tegra/common/tegra_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -138,7 +138,7 @@ static __dead2 void tegra_pwr_domain_power_down_wfi(const psci_power_state_t if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == PSTATE_ID_SOC_POWERDN) { INFO("%s: complete. Entering System Suspend...\n", __func__); - (void)console_flush(); + console_flush(); console_switch_state(0); } diff --git a/plat/nvidia/tegra/drivers/spe/shared_console.S b/plat/nvidia/tegra/drivers/spe/shared_console.S index 9196c1cd1..d1b18dd44 100644 --- a/plat/nvidia/tegra/drivers/spe/shared_console.S +++ b/plat/nvidia/tegra/drivers/spe/shared_console.S @@ -1,10 +1,11 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <asm_macros.S> +#include <assert_macros.S> #include <console_macros.S> #define CONSOLE_NUM_BYTES_SHIFT 24 @@ -151,33 +152,32 @@ func console_spe_getc endfunc console_spe_getc /* ------------------------------------------------- - * int console_spe_core_flush(uintptr_t base_addr) + * void console_spe_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * ------------------------------------------------- */ func console_spe_core_flush - cbz x0, flush_error +#if ENABLE_ASSERTIONS + cmp x0, #0 + ASM_ASSERT(ne) +#endif /* ENABLE_ASSERTIONS */ /* flush console */ mov w1, #(CONSOLE_RING_DOORBELL | CONSOLE_FLUSH_DATA_TO_PORT) str w1, [x0] - mov w0, #0 - ret -flush_error: - mov w0, #-1 ret endfunc console_spe_core_flush /* --------------------------------------------- - * int console_spe_flush(console_t *console) + * void console_spe_flush(console_t *console) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - pointer to console_t structure - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/nvidia/tegra/include/drivers/memctrl_v2.h b/plat/nvidia/tegra/include/drivers/memctrl_v2.h index 1e153063a..9af3027ea 100644 --- a/plat/nvidia/tegra/include/drivers/memctrl_v2.h +++ b/plat/nvidia/tegra/include/drivers/memctrl_v2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -26,7 +26,7 @@ #define MC_SMMU_BYPASS_CONFIG_SETTINGS (MC_SMMU_BYPASS_CONFIG_WRITE_ACCESS_BIT | \ MC_SMMU_CTRL_TBU_BYPASS_SPL_STREAMID) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include <assert.h> @@ -53,9 +53,9 @@ typedef struct mc_regs { .val = 0xFFFFFFFFU, \ } -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ #include <lib/mmio.h> diff --git a/plat/nvidia/tegra/include/t186/tegra_mc_def.h b/plat/nvidia/tegra/include/t186/tegra_mc_def.h index 398453eb9..fa447725b 100644 --- a/plat/nvidia/tegra/include/t186/tegra_mc_def.h +++ b/plat/nvidia/tegra/include/t186/tegra_mc_def.h @@ -282,7 +282,7 @@ #define MC_CLIENT_HOTRESET_CTRL1_SCE_FLUSH_ENB (1U << 24) #define MC_CLIENT_HOTRESET_STATUS1 0x974U -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /******************************************************************************* * Structure to hold the transaction override settings to use to override @@ -393,6 +393,6 @@ typedef struct mc_streamid_security_cfg { MC_TXN_OVERRIDE_CONFIG_CGID_##so_dev_axi_id); \ } while (0) -#endif /* __ASSEMBLY__ */ +#endif /* __ASSEMBLER__ */ #endif /* TEGRA_MC_DEF_H */ diff --git a/plat/qemu/common/aarch32/plat_helpers.S b/plat/qemu/common/aarch32/plat_helpers.S index 15e860b42..5e346d585 100644 --- a/plat/qemu/common/aarch32/plat_helpers.S +++ b/plat/qemu/common/aarch32/plat_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -125,10 +125,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush(int c) + * void plat_crash_console_flush(int c) * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/qemu/common/aarch64/plat_helpers.S b/plat/qemu/common/aarch64/plat_helpers.S index dbcdc2d39..b54617385 100644 --- a/plat/qemu/common/aarch64/plat_helpers.S +++ b/plat/qemu/common/aarch64/plat_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -121,10 +121,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush(int c) + * void plat_crash_console_flush(int c) * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/qti/common/inc/qti_board_def.h b/plat/qti/common/inc/qti_board_def.h index 4c84661b7..c95e4c0c3 100644 --- a/plat/qti/common/inc/qti_board_def.h +++ b/plat/qti/common/inc/qti_board_def.h @@ -12,6 +12,14 @@ * development platforms */ +/* + * Defines used to retrieve QTI SOC Version + */ +#define JEDEC_QTI_BKID U(0x0) +#define JEDEC_QTI_MFID U(0x70) +#define QTI_SOC_CONTINUATION_SHIFT U(24) +#define QTI_SOC_IDENTIFICATION_SHIFT U(16) + /* Size of cacheable stacks */ #define PLATFORM_STACK_SIZE 0x1000 diff --git a/plat/qti/common/src/qti_common.c b/plat/qti/common/src/qti_common.c index ff0fa3060..9355eb774 100644 --- a/plat/qti/common/src/qti_common.c +++ b/plat/qti/common/src/qti_common.c @@ -11,7 +11,10 @@ #include <stdint.h> #include <common/debug.h> +#include <lib/mmio.h> +#include <lib/smccc.h> #include <lib/xlat_tables/xlat_tables_v2.h> +#include <services/arm_arch_svc.h> #include <platform_def.h> #include <qti_plat.h> @@ -146,3 +149,46 @@ int qti_mmap_remove_dynamic_region(uintptr_t base_va, size_t size) qti_align_mem_region(base_va, size, &base_va, &size); return mmap_remove_dynamic_region(base_va, size); } + +/* + * This function returns soc version which mainly consist of below fields + * + * soc_version[30:24] = JEP-106 continuation code for the SiP + * soc_version[23:16] = JEP-106 identification code with parity bit for the SiP + * soc_version[0:15] = Implementation defined SoC ID + */ +int32_t plat_get_soc_version(void) +{ + uint32_t soc_version = (QTI_SOC_VERSION & QTI_SOC_VERSION_MASK); + uint32_t jep106az_code = (JEDEC_QTI_BKID << QTI_SOC_CONTINUATION_SHIFT) + | (JEDEC_QTI_MFID << QTI_SOC_IDENTIFICATION_SHIFT); + return (int32_t)(jep106az_code | (soc_version)); +} + +/* + * This function returns soc revision in below format + * + * soc_revision[0:30] = SOC revision of specific SOC + */ +int32_t plat_get_soc_revision(void) +{ + return mmio_read_32(QTI_SOC_REVISION_REG) & QTI_SOC_REVISION_MASK; +} + +/***************************************************************************** + * plat_smccc_feature_available() - This function checks whether SMCCC feature + * is availabile for the platform or not. + * @fid: SMCCC function id + * + * Return SMC_ARCH_CALL_SUCCESS if SMCCC feature is available and + * SMC_ARCH_CALL_NOT_SUPPORTED otherwise. + *****************************************************************************/ +int32_t plat_smccc_feature_available(u_register_t fid) +{ + switch (fid) { + case SMCCC_ARCH_SOC_ID: + return SMC_ARCH_CALL_SUCCESS; + default: + return SMC_ARCH_CALL_NOT_SUPPORTED; + } +} diff --git a/plat/qti/common/src/qti_syscall.c b/plat/qti/common/src/qti_syscall.c index 27c48959f..a7601b657 100644 --- a/plat/qti/common/src/qti_syscall.c +++ b/plat/qti/common/src/qti_syscall.c @@ -27,7 +27,7 @@ */ #define QTI_SIP_SVC_CALL_COUNT_ID U(0x0200ff00) #define QTI_SIP_SVC_UID_ID U(0x0200ff01) -/* 0x8200ff02 is reserved */ +/* 0x8200ff02 is reserved*/ #define QTI_SIP_SVC_VERSION_ID U(0x0200ff03) /* @@ -97,37 +97,52 @@ bool qti_mem_assign_validate_param(memprot_info_t *mem_info, || (src_vm_list_cnt >= QTI_VM_LAST) || (dst_vm_list_cnt == 0) || (dst_vm_list_cnt >= QTI_VM_LAST) || (u_num_mappings == 0) || u_num_mappings > QTI_VM_MAX_LIST_SIZE) { + ERROR("vm count is 0 or more then QTI_VM_LAST or empty list\n"); + ERROR("source_vm_list %p dest_vm_list %p mem_info %p src_vm_list_cnt %u dst_vm_list_cnt %u u_num_mappings %u\n", + source_vm_list, dest_vm_list, mem_info, + (unsigned int)src_vm_list_cnt, + (unsigned int)dst_vm_list_cnt, + (unsigned int)u_num_mappings); return false; } for (i = 0; i < u_num_mappings; i++) { if ((mem_info[i].mem_addr & (SIZE4K - 1)) + || (mem_info[i].mem_size == 0) || (mem_info[i].mem_size & (SIZE4K - 1))) { + ERROR("mem_info passed buffer 0x%x or size 0x%x is not 4k aligned\n", + (unsigned int)mem_info[i].mem_addr, + (unsigned int)mem_info[i].mem_size); return false; } if ((mem_info[i].mem_addr + mem_info[i].mem_size) < mem_info[i].mem_addr) { + ERROR("overflow in mem_addr 0x%x add mem_size 0x%x\n", + (unsigned int)mem_info[i].mem_addr, + (unsigned int)mem_info[i].mem_size); return false; } - if (coreboot_get_memory_type(mem_info[i].mem_addr) != - CB_MEM_RAM) { + coreboot_memory_t mem_type = coreboot_get_memory_type( + mem_info[i].mem_addr, + mem_info[i].mem_size); + if (mem_type != CB_MEM_RAM && mem_type != CB_MEM_RESERVED) { + ERROR("memory region not in CB MEM RAM or RESERVED area: region start 0x%x size 0x%x\n", + (unsigned int)mem_info[i].mem_addr, + (unsigned int)mem_info[i].mem_size); return false; } - - if (coreboot_get_memory_type - (mem_info[i].mem_addr + mem_info[i].mem_size) != - CB_MEM_RAM) { - return false; - } - } for (i = 0; i < src_vm_list_cnt; i++) { if (source_vm_list[i] >= QTI_VM_LAST) { + ERROR("source_vm_list[%d] 0x%x is more then QTI_VM_LAST\n", + i, (unsigned int)source_vm_list[i]); return false; } } for (i = 0; i < dst_vm_list_cnt; i++) { if (dest_vm_list[i].dst_vm >= QTI_VM_LAST) { + ERROR("dest_vm_list[%d] 0x%x is more then QTI_VM_LAST\n", + i, (unsigned int)dest_vm_list[i].dst_vm); return false; } } @@ -150,6 +165,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, } /* Validate input arg count & retrieve arg3-6 from NS Buffer. */ if ((x1 != QTI_SIP_SVC_MEM_ASSIGN_PARAM_ID) || (x5 == 0x0)) { + ERROR("invalid mem_assign param id or no mapping info\n"); goto unmap_return; } @@ -160,6 +176,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, SMC_32) ? (sizeof(uint32_t) * 4) : (sizeof(uint64_t) * 4); if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size, (MT_NS | MT_RO_DATA)) != 0) { + ERROR("map failed for params NS Buffer %x %x\n", + (unsigned int)dyn_map_start, (unsigned int)dyn_map_size); goto unmap_return; } /* Retrieve indirect args. */ @@ -174,6 +192,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, } /* Un-Map NS Buffer. */ if (qti_mmap_remove_dynamic_region(dyn_map_start, dyn_map_size) != 0) { + ERROR("unmap failed for params NS Buffer %x %x\n", + (unsigned int)dyn_map_start, (unsigned int)dyn_map_size); goto unmap_return; } @@ -191,6 +211,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, if (qti_mmap_add_dynamic_region(dyn_map_start, dyn_map_size, (MT_NS | MT_RO_DATA)) != 0) { + ERROR("map failed for params NS Buffer2 %x %x\n", + (unsigned int)dyn_map_start, (unsigned int)dyn_map_size); goto unmap_return; } memprot_info_t *mem_info_p = (memprot_info_t *) x2; @@ -205,6 +227,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, source_vm_list_p, src_vm_list_cnt, dest_vm_list_p, dst_vm_list_cnt) != true) { + ERROR("Param validation failed\n"); goto unmap_return; } @@ -219,8 +242,7 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, for (int i = 0; i < dst_vm_list_cnt; i++) { dest_vm_list[i].dst_vm = dest_vm_list_p[i].dst_vm; - dest_vm_list[i].dst_vm_perm = - dest_vm_list_p[i].dst_vm_perm; + dest_vm_list[i].dst_vm_perm = dest_vm_list_p[i].dst_vm_perm; dest_vm_list[i].ctx = dest_vm_list_p[i].ctx; dest_vm_list[i].ctx_size = dest_vm_list_p[i].ctx_size; } @@ -233,6 +255,8 @@ static uintptr_t qti_sip_mem_assign(void *handle, uint32_t smc_cc, /* Un-Map NS Buffers. */ if (qti_mmap_remove_dynamic_region(dyn_map_start, dyn_map_size) != 0) { + ERROR("unmap failed for params NS Buffer %x %x\n", + (unsigned int)dyn_map_start, (unsigned int)dyn_map_size); goto unmap_return; } /* Invoke API lib api. */ diff --git a/plat/qti/qtiseclib/inc/qtiseclib_cb_interface.h b/plat/qti/qtiseclib/inc/qtiseclib_cb_interface.h index 2252557a0..deef41c5b 100644 --- a/plat/qti/qtiseclib/inc/qtiseclib_cb_interface.h +++ b/plat/qti/qtiseclib/inc/qtiseclib_cb_interface.h @@ -44,7 +44,7 @@ void qtiseclib_cb_switch_console_to_crash_state(void); void qtiseclib_cb_udelay(uint32_t usec); -int qtiseclib_cb_console_flush(void); +void qtiseclib_cb_console_flush(void); #if QTI_SDI_BUILD int qtiseclib_cb_mmap_remove_dynamic_region(uintptr_t base_va, size_t size); diff --git a/plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h b/plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h index c695c190d..3ecee2022 100644 --- a/plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h +++ b/plat/qti/qtiseclib/inc/sc7180/qtiseclib_defs_plat.h @@ -13,12 +13,6 @@ #define BL31_BASE 0x80b00000 #define BL31_SIZE 0x00100000 -/*----------------------------------------------------------------------------*/ -/* AOP CMD DB address space for mapping */ -/*----------------------------------------------------------------------------*/ -#define QTI_AOP_CMD_DB_BASE 0x80820000 -#define QTI_AOP_CMD_DB_SIZE 0x00020000 - /* Chipset specific secure interrupt number/ID defs. */ #define QTISECLIB_INT_ID_SEC_WDOG_BARK (0x204) #define QTISECLIB_INT_ID_NON_SEC_WDOG_BITE (0x21) diff --git a/plat/qti/qtiseclib/src/qtiseclib_cb_interface.c b/plat/qti/qtiseclib/src/qtiseclib_cb_interface.c index 331a104b2..bb552c66b 100644 --- a/plat/qti/qtiseclib/src/qtiseclib_cb_interface.c +++ b/plat/qti/qtiseclib/src/qtiseclib_cb_interface.c @@ -121,7 +121,7 @@ void qtiseclib_cb_udelay(uint32_t usec) udelay(usec); } -int qtiseclib_cb_console_flush(void) +void qtiseclib_cb_console_flush(void) { return console_flush(); } diff --git a/plat/qti/sc7180/inc/platform_def.h b/plat/qti/sc7180/inc/platform_def.h index 17e1310b0..b0798a63f 100644 --- a/plat/qti/sc7180/inc/platform_def.h +++ b/plat/qti/sc7180/inc/platform_def.h @@ -178,5 +178,17 @@ /*----------------------------------------------------------------------------*/ #define QTI_PS_HOLD_REG 0x0C264000 /*----------------------------------------------------------------------------*/ +/* AOP CMD DB address space for mapping */ +/*----------------------------------------------------------------------------*/ +#define QTI_AOP_CMD_DB_BASE 0x80820000 +#define QTI_AOP_CMD_DB_SIZE 0x00020000 +/*----------------------------------------------------------------------------*/ +/* SOC hw version register */ +/*----------------------------------------------------------------------------*/ +#define QTI_SOC_VERSION U(0x7180) +#define QTI_SOC_VERSION_MASK U(0xFFFF) +#define QTI_SOC_REVISION_REG 0x1FC8000 +#define QTI_SOC_REVISION_MASK U(0xFFFF) +/*----------------------------------------------------------------------------*/ #endif /* PLATFORM_DEF_H */ diff --git a/plat/renesas/rcar/aarch64/plat_helpers.S b/plat/renesas/rcar/aarch64/plat_helpers.S index 138d98807..ec21f2510 100644 --- a/plat/renesas/rcar/aarch64/plat_helpers.S +++ b/plat/renesas/rcar/aarch64/plat_helpers.S @@ -295,7 +295,7 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * --------------------------------------------- */ func plat_crash_console_flush diff --git a/plat/rpi/common/aarch64/plat_helpers.S b/plat/rpi/common/aarch64/plat_helpers.S index e21233a1d..f045e2113 100644 --- a/plat/rpi/common/aarch64/plat_helpers.S +++ b/plat/rpi/common/aarch64/plat_helpers.S @@ -183,10 +183,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/socionext/synquacer/sq_helpers.S b/plat/socionext/synquacer/sq_helpers.S index 558aa15f6..7a2d97b33 100644 --- a/plat/socionext/synquacer/sq_helpers.S +++ b/plat/socionext/synquacer/sq_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -98,10 +98,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* - * int plat_crash_console_flush(int c) + * void plat_crash_console_flush(int c) * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 */ func plat_crash_console_flush diff --git a/plat/socionext/uniphier/uniphier_console.S b/plat/socionext/uniphier/uniphier_console.S index f3dde0cc1..48927f414 100644 --- a/plat/socionext/uniphier/uniphier_console.S +++ b/plat/socionext/uniphier/uniphier_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -61,6 +61,5 @@ func uniphier_console_flush 0: ldr w1, [x0, #UNIPHIER_UART_LSR] tbz w1, #UNIPHIER_UART_LSR_TEMT_BIT, 0b - mov w0, #0 ret endfunc uniphier_console_flush diff --git a/plat/socionext/uniphier/uniphier_console_setup.c b/plat/socionext/uniphier/uniphier_console_setup.c index e2ae8bf28..9fda26e93 100644 --- a/plat/socionext/uniphier/uniphier_console_setup.c +++ b/plat/socionext/uniphier/uniphier_console_setup.c @@ -20,7 +20,7 @@ /* These callbacks are implemented in assembly to use crash_console_helpers.S */ int uniphier_console_putc(int character, struct console *console); int uniphier_console_getc(struct console *console); -int uniphier_console_flush(struct console *console); +void uniphier_console_flush(struct console *console); static console_t uniphier_console = { .flags = CONSOLE_FLAG_BOOT | diff --git a/plat/st/common/include/stm32mp_dt.h b/plat/st/common/include/stm32mp_dt.h index 44ad820dc..e3b4e597e 100644 --- a/plat/st/common/include/stm32mp_dt.h +++ b/plat/st/common/include/stm32mp_dt.h @@ -34,11 +34,7 @@ void dt_fill_device_info(struct dt_node_info *info, int node); int dt_get_node(struct dt_node_info *info, int offset, const char *compat); int dt_get_stdout_uart_info(struct dt_node_info *info); uint32_t dt_get_ddr_size(void); -uintptr_t dt_get_ddrctrl_base(void); -uintptr_t dt_get_ddrphyc_base(void); -uintptr_t dt_get_pwr_base(void); uint32_t dt_get_pwr_vdd_voltage(void); -uintptr_t dt_get_syscfg_base(void); const char *dt_get_board_model(void); int fdt_get_gpio_bank_pin_count(unsigned int bank); diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c index 48a747c7c..89d807838 100644 --- a/plat/st/common/stm32mp_common.c +++ b/plat/st/common/stm32mp_common.c @@ -39,54 +39,22 @@ uintptr_t stm32mp_get_boot_ctx_address(void) uintptr_t stm32mp_ddrctrl_base(void) { - static uintptr_t ddrctrl_base; - - if (ddrctrl_base == 0) { - ddrctrl_base = dt_get_ddrctrl_base(); - - assert(ddrctrl_base == DDRCTRL_BASE); - } - - return ddrctrl_base; + return DDRCTRL_BASE; } uintptr_t stm32mp_ddrphyc_base(void) { - static uintptr_t ddrphyc_base; - - if (ddrphyc_base == 0) { - ddrphyc_base = dt_get_ddrphyc_base(); - - assert(ddrphyc_base == DDRPHYC_BASE); - } - - return ddrphyc_base; + return DDRPHYC_BASE; } uintptr_t stm32mp_pwr_base(void) { - static uintptr_t pwr_base; - - if (pwr_base == 0) { - pwr_base = dt_get_pwr_base(); - - assert(pwr_base == PWR_BASE); - } - - return pwr_base; + return PWR_BASE; } uintptr_t stm32mp_rcc_base(void) { - static uintptr_t rcc_base; - - if (rcc_base == 0) { - rcc_base = fdt_rcc_read_addr(); - - assert(rcc_base == RCC_BASE); - } - - return rcc_base; + return RCC_BASE; } bool stm32mp_lock_available(void) diff --git a/plat/st/common/stm32mp_dt.c b/plat/st/common/stm32mp_dt.c index 4b8b2db90..391e5f054 100644 --- a/plat/st/common/stm32mp_dt.c +++ b/plat/st/common/stm32mp_dt.c @@ -113,26 +113,6 @@ static int fdt_get_node_parent_address_cells(int node) return fdt_address_cells(fdt, parent); } - -/******************************************************************************* - * This function returns the size cells from the node parent. - * Returns: - * - #size-cells value if success. - * - invalid value if error. - * - a default value if undefined #size-cells property as per libfdt - * implementation. - ******************************************************************************/ -static int fdt_get_node_parent_size_cells(int node) -{ - int parent; - - parent = fdt_parent_offset(fdt, node); - if (parent < 0) { - return -FDT_ERR_NOTFOUND; - } - - return fdt_size_cells(fdt, parent); -} #endif /******************************************************************************* @@ -241,81 +221,6 @@ uint32_t dt_get_ddr_size(void) } /******************************************************************************* - * This function gets DDRCTRL base address information from the DT. - * Returns value on success, and 0 on failure. - ******************************************************************************/ -uintptr_t dt_get_ddrctrl_base(void) -{ - int node; - uint32_t array[4]; - - node = fdt_node_offset_by_compatible(fdt, -1, DT_DDR_COMPAT); - if (node < 0) { - INFO("%s: Cannot read DDR node in DT\n", __func__); - return 0; - } - - assert((fdt_get_node_parent_address_cells(node) == 1) && - (fdt_get_node_parent_size_cells(node) == 1)); - - if (fdt_read_uint32_array(fdt, node, "reg", 4, array) < 0) { - return 0; - } - - return array[0]; -} - -/******************************************************************************* - * This function gets DDRPHYC base address information from the DT. - * Returns value on success, and 0 on failure. - ******************************************************************************/ -uintptr_t dt_get_ddrphyc_base(void) -{ - int node; - uint32_t array[4]; - - node = fdt_node_offset_by_compatible(fdt, -1, DT_DDR_COMPAT); - if (node < 0) { - INFO("%s: Cannot read DDR node in DT\n", __func__); - return 0; - } - - assert((fdt_get_node_parent_address_cells(node) == 1) && - (fdt_get_node_parent_size_cells(node) == 1)); - - if (fdt_read_uint32_array(fdt, node, "reg", 4, array) < 0) { - return 0; - } - - return array[2]; -} - -/******************************************************************************* - * This function gets PWR base address information from the DT. - * Returns value on success, and 0 on failure. - ******************************************************************************/ -uintptr_t dt_get_pwr_base(void) -{ - int node; - const fdt32_t *cuint; - - node = fdt_node_offset_by_compatible(fdt, -1, DT_PWR_COMPAT); - if (node < 0) { - INFO("%s: Cannot read PWR node in DT\n", __func__); - return 0; - } - - assert(fdt_get_node_parent_address_cells(node) == 1); - - cuint = fdt_getprop(fdt, node, "reg", NULL); - if (cuint == NULL) { - return 0; - } - - return fdt32_to_cpu(*cuint); -} - -/******************************************************************************* * This function gets PWR VDD regulator voltage information from the DT. * Returns value in microvolts on success, and 0 on failure. ******************************************************************************/ @@ -355,31 +260,6 @@ uint32_t dt_get_pwr_vdd_voltage(void) } /******************************************************************************* - * This function gets SYSCFG base address information from the DT. - * Returns value on success, and 0 on failure. - ******************************************************************************/ -uintptr_t dt_get_syscfg_base(void) -{ - int node; - const fdt32_t *cuint; - - node = fdt_node_offset_by_compatible(fdt, -1, DT_SYSCFG_COMPAT); - if (node < 0) { - INFO("%s: Cannot read SYSCFG node in DT\n", __func__); - return 0; - } - - assert(fdt_get_node_parent_address_cells(node) == 1); - - cuint = fdt_getprop(fdt, node, "reg", NULL); - if (cuint == NULL) { - return 0; - } - - return fdt32_to_cpu(*cuint); -} - -/******************************************************************************* * This function retrieves board model from DT * Returns string taken from model node, NULL otherwise ******************************************************************************/ diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 369ba6921..ee04a23fd 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -37,8 +37,15 @@ #define STM32MP153A_PART_NB U(0x05000025) #define STM32MP151C_PART_NB U(0x0500002E) #define STM32MP151A_PART_NB U(0x0500002F) +#define STM32MP157F_PART_NB U(0x05000080) +#define STM32MP157D_PART_NB U(0x05000081) +#define STM32MP153F_PART_NB U(0x050000A4) +#define STM32MP153D_PART_NB U(0x050000A5) +#define STM32MP151F_PART_NB U(0x050000AE) +#define STM32MP151D_PART_NB U(0x050000AF) #define STM32MP1_REV_B U(0x2000) +#define STM32MP1_REV_Z U(0x2001) /******************************************************************************* * PACKAGE ID @@ -499,6 +506,7 @@ static inline uint32_t tamp_bkpr(uint32_t idx) /******************************************************************************* * Miscellaneous STM32MP1 peripherals base address ******************************************************************************/ +#define BSEC_BASE U(0x5C005000) #define CRYP1_BASE U(0x54001000) #define DBGMCU_BASE U(0x50081000) #define HASH1_BASE U(0x54002000) @@ -507,6 +515,8 @@ static inline uint32_t tamp_bkpr(uint32_t idx) #define RNG1_BASE U(0x54003000) #define RTC_BASE U(0x5c004000) #define SPI6_BASE U(0x5c001000) +#define STGEN_BASE U(0x5c008000) +#define SYSCFG_BASE U(0x50020000) /******************************************************************************* * Device Tree defines @@ -515,6 +525,5 @@ static inline uint32_t tamp_bkpr(uint32_t idx) #define DT_IWDG_COMPAT "st,stm32mp1-iwdg" #define DT_PWR_COMPAT "st,stm32mp1,pwr-reg" #define DT_RCC_CLK_COMPAT "st,stm32mp1-rcc" -#define DT_SYSCFG_COMPAT "st,stm32mp157-syscfg" #endif /* STM32MP1_DEF_H */ diff --git a/plat/st/stm32mp1/stm32mp1_helper.S b/plat/st/stm32mp1/stm32mp1_helper.S index 407eb3979..302136236 100644 --- a/plat/st/stm32mp1/stm32mp1_helper.S +++ b/plat/st/stm32mp1/stm32mp1_helper.S @@ -198,7 +198,7 @@ func plat_crash_console_init endfunc plat_crash_console_init /* --------------------------------------------- - * int plat_crash_console_flush(void) + * void plat_crash_console_flush(void) * * Flush the crash console without a C Runtime stack. * --------------------------------------------- diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c index fd60db282..bc77ee334 100644 --- a/plat/st/stm32mp1/stm32mp1_private.c +++ b/plat/st/stm32mp1/stm32mp1_private.c @@ -16,18 +16,22 @@ /* Internal layout of the 32bit OTP word board_id */ #define BOARD_ID_BOARD_NB_MASK GENMASK(31, 16) #define BOARD_ID_BOARD_NB_SHIFT 16 -#define BOARD_ID_VARIANT_MASK GENMASK(15, 12) -#define BOARD_ID_VARIANT_SHIFT 12 +#define BOARD_ID_VARCPN_MASK GENMASK(15, 12) +#define BOARD_ID_VARCPN_SHIFT 12 #define BOARD_ID_REVISION_MASK GENMASK(11, 8) #define BOARD_ID_REVISION_SHIFT 8 +#define BOARD_ID_VARFG_MASK GENMASK(7, 4) +#define BOARD_ID_VARFG_SHIFT 4 #define BOARD_ID_BOM_MASK GENMASK(3, 0) #define BOARD_ID2NB(_id) (((_id) & BOARD_ID_BOARD_NB_MASK) >> \ BOARD_ID_BOARD_NB_SHIFT) -#define BOARD_ID2VAR(_id) (((_id) & BOARD_ID_VARIANT_MASK) >> \ - BOARD_ID_VARIANT_SHIFT) +#define BOARD_ID2VARCPN(_id) (((_id) & BOARD_ID_VARCPN_MASK) >> \ + BOARD_ID_VARCPN_SHIFT) #define BOARD_ID2REV(_id) (((_id) & BOARD_ID_REVISION_MASK) >> \ BOARD_ID_REVISION_SHIFT) +#define BOARD_ID2VARFG(_id) (((_id) & BOARD_ID_VARFG_MASK) >> \ + BOARD_ID_VARFG_SHIFT) #define BOARD_ID2BOM(_id) ((_id) & BOARD_ID_BOM_MASK) #if defined(IMAGE_BL2) @@ -154,6 +158,8 @@ static int get_part_number(uint32_t *part_nb) uint32_t part_number; uint32_t dev_id; + assert(part_nb != NULL); + if (stm32mp1_dbgmcu_get_chip_dev_id(&dev_id) < 0) { return -1; } @@ -175,6 +181,8 @@ static int get_cpu_package(uint32_t *cpu_package) { uint32_t package; + assert(cpu_package != NULL); + if (bsec_shadow_read_otp(&package, PACKAGE_OTP) != BSEC_OK) { ERROR("BSEC: PACKAGE_OTP Error\n"); return -1; @@ -220,6 +228,24 @@ void stm32mp_print_cpuinfo(void) case STM32MP151A_PART_NB: cpu_s = "151A"; break; + case STM32MP157F_PART_NB: + cpu_s = "157F"; + break; + case STM32MP157D_PART_NB: + cpu_s = "157D"; + break; + case STM32MP153F_PART_NB: + cpu_s = "153F"; + break; + case STM32MP153D_PART_NB: + cpu_s = "153D"; + break; + case STM32MP151F_PART_NB: + cpu_s = "151F"; + break; + case STM32MP151D_PART_NB: + cpu_s = "151D"; + break; default: cpu_s = "????"; break; @@ -261,6 +287,9 @@ void stm32mp_print_cpuinfo(void) case STM32MP1_REV_B: cpu_r = "B"; break; + case STM32MP1_REV_Z: + cpu_r = "Z"; + break; default: cpu_r = "?"; break; @@ -308,9 +337,10 @@ void stm32mp_print_boardinfo(void) rev[0] = BOARD_ID2REV(board_id) - 1 + 'A'; rev[1] = '\0'; - NOTICE("Board: MB%04x Var%d Rev.%s-%02d\n", + NOTICE("Board: MB%04x Var%u.%u Rev.%s-%02u\n", BOARD_ID2NB(board_id), - BOARD_ID2VAR(board_id), + BOARD_ID2VARCPN(board_id), + BOARD_ID2VARFG(board_id), rev, BOARD_ID2BOM(board_id)); } @@ -320,7 +350,6 @@ void stm32mp_print_boardinfo(void) bool stm32mp_is_single_core(void) { uint32_t part_number; - bool ret = false; if (get_part_number(&part_number) < 0) { ERROR("Invalid part number, assume single core chip"); @@ -330,14 +359,13 @@ bool stm32mp_is_single_core(void) switch (part_number) { case STM32MP151A_PART_NB: case STM32MP151C_PART_NB: - ret = true; - break; + case STM32MP151D_PART_NB: + case STM32MP151F_PART_NB: + return true; default: - break; + return false; } - - return ret; } /* Return true when device is in closed state */ diff --git a/plat/st/stm32mp1/stm32mp1_syscfg.c b/plat/st/stm32mp1/stm32mp1_syscfg.c index 2fd06f38a..109725c8a 100644 --- a/plat/st/stm32mp1/stm32mp1_syscfg.c +++ b/plat/st/stm32mp1/stm32mp1_syscfg.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, STMicroelectronics - All Rights Reserved + * Copyright (c) 2019-2020, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -63,18 +63,17 @@ void stm32mp1_syscfg_init(void) uint32_t bootr; uint32_t otp = 0; uint32_t vdd_voltage; - uintptr_t syscfg_base = dt_get_syscfg_base(); /* * Interconnect update : select master using the port 1. * LTDC = AXI_M9. */ - mmio_write_32(syscfg_base + SYSCFG_ICNR, SYSCFG_ICNR_AXI_M9); + mmio_write_32(SYSCFG_BASE + SYSCFG_ICNR, SYSCFG_ICNR_AXI_M9); /* Disable Pull-Down for boot pin connected to VDD */ - bootr = mmio_read_32(syscfg_base + SYSCFG_BOOTR) & + bootr = mmio_read_32(SYSCFG_BASE + SYSCFG_BOOTR) & SYSCFG_BOOTR_BOOT_MASK; - mmio_clrsetbits_32(syscfg_base + SYSCFG_BOOTR, SYSCFG_BOOTR_BOOTPD_MASK, + mmio_clrsetbits_32(SYSCFG_BASE + SYSCFG_BOOTR, SYSCFG_BOOTR_BOOTPD_MASK, bootr << SYSCFG_BOOTR_BOOTPD_SHIFT); /* @@ -105,7 +104,7 @@ void stm32mp1_syscfg_init(void) if (vdd_voltage == 0U) { WARN("VDD unknown"); } else if (vdd_voltage < 2700000U) { - mmio_write_32(syscfg_base + SYSCFG_IOCTRLSETR, + mmio_write_32(SYSCFG_BASE + SYSCFG_IOCTRLSETR, SYSCFG_IOCTRLSETR_HSLVEN_TRACE | SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI | SYSCFG_IOCTRLSETR_HSLVEN_ETH | @@ -129,8 +128,6 @@ void stm32mp1_syscfg_init(void) void stm32mp1_syscfg_enable_io_compensation(void) { - uintptr_t syscfg_base = dt_get_syscfg_base(); - /* * Activate automatic I/O compensation. * Warning: need to ensure CSI enabled and ready in clock driver. @@ -138,20 +135,19 @@ void stm32mp1_syscfg_enable_io_compensation(void) */ stm32mp1_clk_enable_non_secure(SYSCFG); - mmio_setbits_32(syscfg_base + SYSCFG_CMPENSETR, + mmio_setbits_32(SYSCFG_BASE + SYSCFG_CMPENSETR, SYSCFG_CMPENSETR_MPU_EN); - while ((mmio_read_32(syscfg_base + SYSCFG_CMPCR) & + while ((mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY) == 0U) { ; } - mmio_clrbits_32(syscfg_base + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); + mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); } void stm32mp1_syscfg_disable_io_compensation(void) { - uintptr_t syscfg_base = dt_get_syscfg_base(); uint32_t value; /* @@ -160,20 +156,18 @@ void stm32mp1_syscfg_disable_io_compensation(void) * requested for other usages and always OFF in STANDBY. * Disable non-secure SYSCFG clock, we assume non-secure is suspended. */ - value = mmio_read_32(syscfg_base + SYSCFG_CMPCR) >> + value = mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) >> SYSCFG_CMPCR_ANSRC_SHIFT; - mmio_clrbits_32(syscfg_base + SYSCFG_CMPCR, + mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_RANSRC | SYSCFG_CMPCR_RAPSRC); - value = mmio_read_32(syscfg_base + SYSCFG_CMPCR) | + value = mmio_read_32(SYSCFG_BASE + SYSCFG_CMPCR) | (value << SYSCFG_CMPCR_RANSRC_SHIFT); - mmio_write_32(syscfg_base + SYSCFG_CMPCR, value); - - mmio_setbits_32(syscfg_base + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); + mmio_write_32(SYSCFG_BASE + SYSCFG_CMPCR, value | SYSCFG_CMPCR_SW_CTRL); - mmio_clrbits_32(syscfg_base + SYSCFG_CMPENSETR, + mmio_clrbits_32(SYSCFG_BASE + SYSCFG_CMPENSETR, SYSCFG_CMPENSETR_MPU_EN); stm32mp1_clk_disable_non_secure(SYSCFG); diff --git a/plat/ti/k3/common/k3_helpers.S b/plat/ti/k3/common/k3_helpers.S index 3afca591e..f4f7d18ea 100644 --- a/plat/ti/k3/common/k3_helpers.S +++ b/plat/ti/k3/common/k3_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -141,10 +141,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : x0, x1 * --------------------------------------------- */ diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S b/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S index beba66405..7eab337e9 100644 --- a/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S +++ b/plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -106,10 +106,10 @@ func plat_crash_console_putc endfunc plat_crash_console_putc /* --------------------------------------------- - * int plat_crash_console_flush() + * void plat_crash_console_flush() * Function to force a write of all buffered * data that hasn't been output. - * Out : return -1 on error else return 0. + * Out : void. * Clobber list : r0 * --------------------------------------------- */ |