diff options
49 files changed, 631 insertions, 379 deletions
diff --git a/.checkpatch.conf b/.checkpatch.conf index e92b96f32..63bdf7b47 100644 --- a/.checkpatch.conf +++ b/.checkpatch.conf @@ -36,6 +36,10 @@ # This is not Linux so don't expect a Linux tree! --no-tree +# The Linux kernel expects the SPDX license tag in the first line of each file. +# We don't follow this in the Trusted Firmware. +--ignore SPDX_LICENSE_TAG + # This clarifes the lines indications in the report. # # E.g.: @@ -90,7 +90,6 @@ ifneq (${DEBUG}, 0) LOG_LEVEL := 40 else BUILD_TYPE := release - $(eval $(call add_define,NDEBUG)) # Use LOG_LEVEL_NOTICE by default for release builds LOG_LEVEL := 20 endif @@ -378,6 +377,16 @@ ifeq ($(BL2_AT_EL3)-$(BL2_IN_XIP_MEM),0-1) $(error "BL2_IN_XIP_MEM is only supported when BL2_AT_EL3 is enabled") endif +# SMC Calling Convention checks +ifneq (${SMCCC_MAJOR_VERSION},1) + ifneq (${SPD},none) + $(error "SMC Calling Convention 1.X must be used with SPDs") + endif + ifeq (${ARCH},aarch32) + $(error "Only SMCCC 1.X is supported in AArch32 mode.") + endif +endif + ################################################################################ # Process platform overrideable behaviour ################################################################################ @@ -527,6 +536,7 @@ $(eval $(call assert_boolean,BL2_IN_XIP_MEM)) $(eval $(call assert_numeric,ARM_ARCH_MAJOR)) $(eval $(call assert_numeric,ARM_ARCH_MINOR)) +$(eval $(call assert_numeric,SMCCC_MAJOR_VERSION)) ################################################################################ # Add definitions to the cpp preprocessor based on the current build options. @@ -563,6 +573,7 @@ $(eval $(call add_define,PROGRAMMABLE_RESET_ADDRESS)) $(eval $(call add_define,PSCI_EXTENDED_STATE_ID)) $(eval $(call add_define,RESET_TO_BL31)) $(eval $(call add_define,SEPARATE_CODE_AND_RODATA)) +$(eval $(call add_define,SMCCC_MAJOR_VERSION)) $(eval $(call add_define,SPD_${SPD})) $(eval $(call add_define,SPIN_ON_BL1_EXIT)) $(eval $(call add_define,TRUSTED_BOARD_BOOT)) diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c index 41d174557..101eb33d0 100644 --- a/bl2/bl2_main.c +++ b/bl2/bl2_main.c @@ -46,6 +46,7 @@ void bl2_main(void) /* Load the subsequent bootloader images. */ next_bl_ep_info = bl2_load_images(); +#if !BL2_AT_EL3 #ifdef AARCH32 /* * For AArch32 state BL1 and BL2 share the MMU setup. @@ -55,8 +56,6 @@ void bl2_main(void) disable_mmu_icache_secure(); #endif /* AARCH32 */ - -#if !BL2_AT_EL3 console_flush(); /* diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S index 60be93274..1c3ed3f33 100644 --- a/bl31/aarch64/runtime_exceptions.S +++ b/bl31/aarch64/runtime_exceptions.S @@ -11,6 +11,7 @@ #include <interrupt_mgmt.h> #include <platform_def.h> #include <runtime_svc.h> +#include <smccc.h> .globl runtime_exceptions @@ -289,6 +290,37 @@ vector_entry serror_aarch32 /* --------------------------------------------------------------------- + * This macro takes an argument in x16 that is the index in the + * 'rt_svc_descs_indices' array, checks that the value in the array is + * valid, and loads in x15 the pointer to the handler of that service. + * --------------------------------------------------------------------- + */ + .macro load_rt_svc_desc_pointer + /* Load descriptor index from array of indices */ + adr x14, rt_svc_descs_indices + ldrb w15, [x14, x16] + +#if SMCCC_MAJOR_VERSION == 1 + /* Any index greater than 127 is invalid. Check bit 7. */ + tbnz w15, 7, smc_unknown +#elif SMCCC_MAJOR_VERSION == 2 + /* Verify that the top 3 bits of the loaded index are 0 (w15 <= 31) */ + cmp w15, #31 + b.hi smc_unknown +#endif /* SMCCC_MAJOR_VERSION */ + + /* + * Get the descriptor using the index + * x11 = (base + off), w15 = index + * + * handler = (base + off) + (index << log2(size)) + */ + adr x11, (__RT_SVC_DESCS_START__ + RT_SVC_DESC_HANDLE) + lsl w10, w15, #RT_SVC_SIZE_LOG2 + ldr x15, [x11, w10, uxtw] + .endm + + /* --------------------------------------------------------------------- * The following code handles secure monitor calls. * Depending upon the execution state from where the SMC has been * invoked, it frees some general purpose registers to perform the @@ -311,48 +343,63 @@ smc_handler64: * now). x6 will point to the context structure (SP_EL3) and x7 will * contain flags we need to pass to the handler. * - * Save x4-x29 and sp_el0. Refer to SMCCC v1.1. + * Save x4-x29 and sp_el0. */ save_x4_to_x29_sp_el0 mov x5, xzr mov x6, sp +#if SMCCC_MAJOR_VERSION == 1 + /* Get the unique owning entity number */ ubfx x16, x0, #FUNCID_OEN_SHIFT, #FUNCID_OEN_WIDTH ubfx x15, x0, #FUNCID_TYPE_SHIFT, #FUNCID_TYPE_WIDTH orr x16, x16, x15, lsl #FUNCID_OEN_WIDTH - adr x11, (__RT_SVC_DESCS_START__ + RT_SVC_DESC_HANDLE) + load_rt_svc_desc_pointer - /* Load descriptor index from array of indices */ - adr x14, rt_svc_descs_indices - ldrb w15, [x14, x16] +#elif SMCCC_MAJOR_VERSION == 2 + + /* Bit 31 must be set */ + tbz x0, #FUNCID_TYPE_SHIFT, smc_unknown /* - * Restore the saved C runtime stack value which will become the new - * SP_EL0 i.e. EL3 runtime stack. It was saved in the 'cpu_context' - * structure prior to the last ERET from EL3. + * Check MSB of namespace to decide between compatibility/vendor and + * SPCI/SPRT */ - ldr x12, [x6, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] + tbz x0, #(FUNCID_NAMESPACE_SHIFT + 1), compat_or_vendor + + /* Namespaces SPRT and SPCI currently unimplemented */ + b smc_unknown + +compat_or_vendor: + + /* Namespace is b'00 (compatibility) or b'01 (vendor) */ /* - * Any index greater than 127 is invalid. Check bit 7 for - * a valid index + * Add the LSB of the namespace (bit [28]) to the OEN [27:24] to create + * a 5-bit index into the rt_svc_descs_indices array. + * + * The low 16 entries of the rt_svc_descs_indices array correspond to + * OENs of the compatibility namespace and the top 16 entries of the + * array are assigned to the vendor namespace descriptor. */ - tbnz w15, 7, smc_unknown + ubfx x16, x0, #FUNCID_OEN_SHIFT, #(FUNCID_OEN_WIDTH + 1) - /* Switch to SP_EL0 */ - msr spsel, #0 + load_rt_svc_desc_pointer + +#endif /* SMCCC_MAJOR_VERSION */ /* - * Get the descriptor using the index - * x11 = (base + off), x15 = index - * - * handler = (base + off) + (index << log2(size)) + * Restore the saved C runtime stack value which will become the new + * SP_EL0 i.e. EL3 runtime stack. It was saved in the 'cpu_context' + * structure prior to the last ERET from EL3. */ - lsl w10, w15, #RT_SVC_SIZE_LOG2 - ldr x15, [x11, w10, uxtw] + ldr x12, [x6, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] + + /* Switch to SP_EL0 */ + msr spsel, #0 /* * Save the SPSR_EL3, ELR_EL3, & SCR_EL3 in case there is a world diff --git a/bl32/tsp/tsp_interrupt.c b/bl32/tsp/tsp_interrupt.c index cbfc15259..f50133814 100644 --- a/bl32/tsp/tsp_interrupt.c +++ b/bl32/tsp/tsp_interrupt.c @@ -33,7 +33,7 @@ void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3) #if LOG_LEVEL >= LOG_LEVEL_VERBOSE spin_lock(&console_lock); - VERBOSE("TSP: cpu 0x%lx sync s-el1 interrupt request from 0x%lx\n", + VERBOSE("TSP: cpu 0x%lx sync s-el1 interrupt request from 0x%llx\n", read_mpidr(), elr_el3); VERBOSE("TSP: cpu 0x%lx: %d sync s-el1 interrupt requests," " %d sync s-el1 interrupt returns\n", diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c index 0de0ca856..e41b51ebc 100644 --- a/bl32/tsp/tsp_main.c +++ b/bl32/tsp/tsp_main.c @@ -247,7 +247,7 @@ tsp_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl, #if LOG_LEVEL >= LOG_LEVEL_INFO spin_lock(&console_lock); - INFO("TSP: cpu 0x%lx resumed. maximum off power level %ld\n", + INFO("TSP: cpu 0x%lx resumed. maximum off power level %lld\n", read_mpidr(), max_off_pwrlvl); INFO("TSP: cpu 0x%lx: %d smcs, %d erets %d cpu suspend requests\n", read_mpidr(), @@ -347,7 +347,7 @@ tsp_args_t *tsp_smc_handler(uint64_t func, tsp_stats[linear_id].smc_count++; tsp_stats[linear_id].eret_count++; - INFO("TSP: cpu 0x%lx received %s smc 0x%lx\n", read_mpidr(), + INFO("TSP: cpu 0x%lx received %s smc 0x%llx\n", read_mpidr(), ((func >> 31) & 1) == 1 ? "fast" : "yielding", func); INFO("TSP: cpu 0x%lx: %d smcs, %d erets\n", read_mpidr(), diff --git a/common/runtime_svc.c b/common/runtime_svc.c index de80f30c2..f997c74a0 100644 --- a/common/runtime_svc.c +++ b/common/runtime_svc.c @@ -26,8 +26,10 @@ static rt_svc_desc_t *rt_svc_descs; / sizeof(rt_svc_desc_t)) /******************************************************************************* - * Function to invoke the registered `handle` corresponding to the smc_fid. + * Function to invoke the registered `handle` corresponding to the smc_fid in + * AArch32 mode. ******************************************************************************/ +#if SMCCC_MAJOR_VERSION == 1 uintptr_t handle_runtime_svc(uint32_t smc_fid, void *cookie, void *handle, @@ -53,6 +55,7 @@ uintptr_t handle_runtime_svc(uint32_t smc_fid, return rt_svc_descs[index].handle(smc_fid, x1, x2, x3, x4, cookie, handle, flags); } +#endif /* SMCCC_MAJOR_VERSION */ /******************************************************************************* * Simple routine to sanity check a runtime service descriptor before using it @@ -68,12 +71,17 @@ static int32_t validate_rt_svc_desc(const rt_svc_desc_t *desc) if (desc->end_oen >= OEN_LIMIT) return -EINVAL; - if (desc->call_type != SMC_TYPE_FAST && - desc->call_type != SMC_TYPE_YIELD) +#if SMCCC_MAJOR_VERSION == 1 + if ((desc->call_type != SMC_TYPE_FAST) && + (desc->call_type != SMC_TYPE_YIELD)) return -EINVAL; +#elif SMCCC_MAJOR_VERSION == 2 + if (desc->is_vendor > 1U) + return -EINVAL; +#endif /* SMCCC_MAJOR_VERSION */ /* A runtime service having no init or handle function doesn't make sense */ - if (desc->init == NULL && desc->handle == NULL) + if ((desc->init == NULL) && (desc->handle == NULL)) return -EINVAL; return 0; @@ -96,7 +104,7 @@ void runtime_svc_init(void) (RT_SVC_DECS_NUM < MAX_RT_SVCS)); /* If no runtime services are implemented then simply bail out */ - if (RT_SVC_DECS_NUM == 0) + if (RT_SVC_DECS_NUM == 0U) return; /* Initialise internal variables to invalid state */ @@ -140,11 +148,18 @@ void runtime_svc_init(void) * descriptor which will handle the SMCs for this owning * entity range. */ - start_idx = get_unique_oen(rt_svc_descs[index].start_oen, - service->call_type); - assert(start_idx < MAX_RT_SVCS); - end_idx = get_unique_oen(rt_svc_descs[index].end_oen, - service->call_type); +#if SMCCC_MAJOR_VERSION == 1 + start_idx = get_unique_oen(service->start_oen, + service->call_type); + end_idx = get_unique_oen(service->end_oen, + service->call_type); +#elif SMCCC_MAJOR_VERSION == 2 + start_idx = get_rt_desc_idx(service->start_oen, + service->is_vendor); + end_idx = get_rt_desc_idx(service->end_oen, + service->is_vendor); +#endif + assert(start_idx <= end_idx); assert(end_idx < MAX_RT_SVCS); for (; start_idx <= end_idx; start_idx++) rt_svc_descs_indices[start_idx] = index; diff --git a/docs/user-guide.rst b/docs/user-guide.rst index f8bc4be50..aed54a631 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -573,6 +573,11 @@ Common build options pages" section in `Firmware Design`_. This flag is disabled by default and affects all BL images. +- ``SMCCC_MAJOR_VERSION``: Numeric value that indicates the major version of + the SMC Calling Convention that the Trusted Firmware supports. The only two + allowed values are 1 and 2, and it defaults to 1. The minor version is + determined using this value. + - ``SPD``: Choose a Secure Payload Dispatcher component to be built into TF-A. This build option is only valid if ``ARCH=aarch64``. The value should be the path to the directory containing the SPD source, relative to diff --git a/drivers/arm/gic/gic_v3.c b/drivers/arm/gic/gic_v3.c index 3e802fddb..548681791 100644 --- a/drivers/arm/gic/gic_v3.c +++ b/drivers/arm/gic/gic_v3.c @@ -8,7 +8,7 @@ #include <debug.h> #include <gic_v3.h> -uintptr_t gicv3_get_rdist(uintptr_t gicr_base, uint64_t mpidr) +uintptr_t gicv3_get_rdist(uintptr_t gicr_base, u_register_t mpidr) { uint32_t cpu_aff, gicr_aff; uint64_t gicr_typer; diff --git a/fdts/fvp-base-gicv3-psci-common.dtsi b/fdts/fvp-base-gicv3-psci-common.dtsi index 2ef2df8dd..631c4e345 100644 --- a/fdts/fvp-base-gicv3-psci-common.dtsi +++ b/fdts/fvp-base-gicv3-psci-common.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -228,7 +228,7 @@ <0 63 4>; }; - smb { + smb@0,0 { compatible = "simple-bus"; #address-cells = <2>; @@ -244,7 +244,7 @@ }; panels { - panel@0 { + panel { compatible = "panel"; mode = "XVGA"; refresh = <60>; diff --git a/fdts/fvp-foundation-motherboard.dtsi b/fdts/fvp-foundation-motherboard.dtsi index ae7237b71..9ee5b6459 100644 --- a/fdts/fvp-foundation-motherboard.dtsi +++ b/fdts/fvp-foundation-motherboard.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -44,14 +44,14 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg@010000 { + v2m_sysreg: sysreg@10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; gpio-controller; #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { + v2m_sysctl: sysctl@20000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; @@ -60,7 +60,7 @@ clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; - v2m_serial0: uart@090000 { + v2m_serial0: uart@90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <0 5 4>; @@ -68,7 +68,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial1: uart@0a0000 { + v2m_serial1: uart@a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <0 6 4>; @@ -76,7 +76,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial2: uart@0b0000 { + v2m_serial2: uart@b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <0 7 4>; @@ -84,7 +84,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial3: uart@0c0000 { + v2m_serial3: uart@c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <0 8 4>; @@ -92,7 +92,7 @@ clock-names = "uartclk", "apb_pclk"; }; - wdt@0f0000 { + wdt@f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0 0 4>; @@ -124,7 +124,7 @@ clock-names = "apb_pclk"; }; - virtio_block@0130000 { + virtio_block@130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; interrupts = <0 0x2a 4>; diff --git a/fdts/rtsm_ve-motherboard-aarch32.dtsi b/fdts/rtsm_ve-motherboard-aarch32.dtsi index 5afbc1ee5..7a8af8e74 100644 --- a/fdts/rtsm_ve-motherboard-aarch32.dtsi +++ b/fdts/rtsm_ve-motherboard-aarch32.dtsi @@ -57,14 +57,14 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg@010000 { + v2m_sysreg: sysreg@10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; gpio-controller; #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { + v2m_sysctl: sysctl@20000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; @@ -73,7 +73,7 @@ clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; - aaci@040000 { + aaci@40000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <11>; @@ -81,7 +81,7 @@ clock-names = "apb_pclk"; }; - mmci@050000 { + mmci@50000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <9 10>; @@ -93,7 +93,7 @@ clock-names = "mclk", "apb_pclk"; }; - kmi@060000 { + kmi@60000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <12>; @@ -101,7 +101,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - kmi@070000 { + kmi@70000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <13>; @@ -109,7 +109,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - v2m_serial0: uart@090000 { + v2m_serial0: uart@90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>; @@ -117,7 +117,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial1: uart@0a0000 { + v2m_serial1: uart@a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>; @@ -125,7 +125,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial2: uart@0b0000 { + v2m_serial2: uart@b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>; @@ -133,7 +133,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial3: uart@0c0000 { + v2m_serial3: uart@c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>; @@ -141,7 +141,7 @@ clock-names = "uartclk", "apb_pclk"; }; - wdt@0f0000 { + wdt@f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0>; @@ -184,7 +184,7 @@ framebuffer = <0x18000000 0x00180000>; }; - virtio_block@0130000 { + virtio_block@130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; interrupts = <0x2a>; diff --git a/fdts/rtsm_ve-motherboard.dtsi b/fdts/rtsm_ve-motherboard.dtsi index 8baa829aa..486f8a985 100644 --- a/fdts/rtsm_ve-motherboard.dtsi +++ b/fdts/rtsm_ve-motherboard.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -56,14 +56,14 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg@010000 { + v2m_sysreg: sysreg@10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; gpio-controller; #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { + v2m_sysctl: sysctl@20000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; @@ -72,7 +72,7 @@ clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; }; - aaci@040000 { + aaci@40000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <0 11 4>; @@ -80,7 +80,7 @@ clock-names = "apb_pclk"; }; - mmci@050000 { + mmci@50000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <0 9 4 0 10 4>; @@ -92,7 +92,7 @@ clock-names = "mclk", "apb_pclk"; }; - kmi@060000 { + kmi@60000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <0 12 4>; @@ -100,7 +100,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - kmi@070000 { + kmi@70000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <0 13 4>; @@ -108,7 +108,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - v2m_serial0: uart@090000 { + v2m_serial0: uart@90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <0 5 4>; @@ -116,7 +116,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial1: uart@0a0000 { + v2m_serial1: uart@a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <0 6 4>; @@ -124,7 +124,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial2: uart@0b0000 { + v2m_serial2: uart@b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <0 7 4>; @@ -132,7 +132,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial3: uart@0c0000 { + v2m_serial3: uart@c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <0 8 4>; @@ -140,7 +140,7 @@ clock-names = "uartclk", "apb_pclk"; }; - wdt@0f0000 { + wdt@f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0 0 4>; @@ -183,14 +183,14 @@ framebuffer = <0x18000000 0x00180000>; }; - virtio_block@0130000 { + virtio_block@130000 { compatible = "virtio,mmio"; reg = <0x130000 0x1000>; interrupts = <0 0x2a 4>; }; }; - v2m_fixed_3v3: fixedregulator@0 { + v2m_fixed_3v3: fixedregulator { compatible = "regulator-fixed"; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; @@ -202,7 +202,7 @@ compatible = "arm,vexpress,config-bus", "simple-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - v2m_oscclk1: osc@1 { + v2m_oscclk1: osc { /* CLCD clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 1>; @@ -220,7 +220,7 @@ * }; */ - muxfpga@0 { + muxfpga { compatible = "arm,vexpress-muxfpga"; arm,vexpress-sysreg,func = <7 0>; }; @@ -243,7 +243,7 @@ * }; */ - dvimode@0 { + dvimode { compatible = "arm,vexpress-dvimode"; arm,vexpress-sysreg,func = <11 0>; }; diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h index 706c2118d..b8cf8ded3 100644 --- a/include/common/runtime_svc.h +++ b/include/common/runtime_svc.h @@ -8,8 +8,9 @@ #define __RUNTIME_SVC_H__ #include <bl_common.h> /* to include exception types */ +#include <cassert.h> #include <smccc_helpers.h> /* to include SMCCC definitions */ - +#include <utils_def.h> /******************************************************************************* * Structure definition, typedefs & constants for the runtime service framework @@ -32,11 +33,20 @@ /* - * The function identifier has 6 bits for the owning entity number and - * single bit for the type of smc call. When taken together these - * values limit the maximum number of runtime services to 128. + * In SMCCC 1.X, the function identifier has 6 bits for the owning entity number + * and a single bit for the type of smc call. When taken together, those values + * limit the maximum number of runtime services to 128. + * + * In SMCCC 2.X the type bit is always 1 and there are only 4 OEN bits in the + * compatibility namespace, so the total number of services is 16. The LSB of + * namespace is also added to these 4 bits to make space for the vendor service + * handler and so the total number of runtime services is 32. */ +#if SMCCC_MAJOR_VERSION == 1 #define MAX_RT_SVCS 128 +#elif SMCCC_MAJOR_VERSION == 2 +#define MAX_RT_SVCS 32 +#endif #ifndef __ASSEMBLY__ @@ -60,24 +70,62 @@ typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid, typedef struct rt_svc_desc { uint8_t start_oen; uint8_t end_oen; +#if SMCCC_MAJOR_VERSION == 1 uint8_t call_type; +#elif SMCCC_MAJOR_VERSION == 2 + uint8_t is_vendor; +#endif const char *name; rt_svc_init_t init; rt_svc_handle_t handle; } rt_svc_desc_t; /* - * Convenience macro to declare a service descriptor + * Convenience macros to declare a service descriptor + */ +#if SMCCC_MAJOR_VERSION == 1 + +#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \ + static const rt_svc_desc_t __svc_desc_ ## _name \ + __section("rt_svc_descs") __used = { \ + .start_oen = _start, \ + .end_oen = _end, \ + .call_type = _type, \ + .name = #_name, \ + .init = _setup, \ + .handle = _smch \ + } + +#elif SMCCC_MAJOR_VERSION == 2 + +#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \ + static const rt_svc_desc_t __svc_desc_ ## _name \ + __section("rt_svc_descs") __used = { \ + .start_oen = _start, \ + .end_oen = _end, \ + .is_vendor = 0, \ + .name = #_name, \ + .init = _setup, \ + .handle = _smch, \ + }; \ + CASSERT((_type) == SMC_TYPE_FAST, rt_svc_type_check_ ## _name) + +/* + * The higher 16 entries of the runtime services are used for the vendor + * specific descriptor. */ -#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \ - static const rt_svc_desc_t __svc_desc_ ## _name \ - __section("rt_svc_descs") __used = { \ - .start_oen = _start, \ - .end_oen = _end, \ - .call_type = _type, \ - .name = #_name, \ - .init = _setup, \ - .handle = _smch } +#define DECLARE_RT_SVC_VENDOR(_setup, _smch) \ + static const rt_svc_desc_t __svc_desc_vendor \ + __section("rt_svc_descs") __used = { \ + .start_oen = 0, \ + .end_oen = 15, \ + .is_vendor = 1, \ + .name = "vendor_rt_svc", \ + .init = _setup, \ + .handle = _smch, \ + } + +#endif /* SMCCC_MAJOR_VERSION */ /* * Compile time assertions related to the 'rt_svc_desc' structure to: @@ -96,6 +144,7 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \ assert_rt_svc_desc_handle_offset_mismatch); +#if SMCCC_MAJOR_VERSION == 1 /* * This macro combines the call type and the owning entity number corresponding * to a runtime service to generate a unique owning entity number. This unique @@ -112,9 +161,22 @@ CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), \ * array to invoke the corresponding runtime service handler during SMC * handling. */ -#define get_unique_oen_from_smc_fid(fid) \ - get_unique_oen(((fid) >> FUNCID_OEN_SHIFT), \ - ((fid) >> FUNCID_TYPE_SHIFT)) +#define get_unique_oen_from_smc_fid(fid) \ + get_unique_oen(GET_SMC_OEN(fid), GET_SMC_TYPE(fid)) + +#elif SMCCC_MAJOR_VERSION == 2 + +/* + * This macro combines the owning entity number corresponding to a runtime + * service with one extra bit for the vendor namespace to generate an index into + * the 'rt_svc_descs_indices' array. The entry contains the index of the service + * descriptor in the 'rt_svc_descs' array. + */ +#define get_rt_desc_idx(oen, is_vendor) \ + (((uint32_t)(oen) & FUNCID_OEN_MASK) | \ + (((uint32_t)(is_vendor) & 1U) << FUNCID_OEN_WIDTH)) + +#endif /******************************************************************************* * Function & variable prototypes diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 485ed4325..c346f7961 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -18,15 +18,15 @@ *********************************************************************/ #define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \ -static inline uint64_t read_ ## _name(void) \ +static inline u_register_t read_ ## _name(void) \ { \ - uint64_t v; \ + u_register_t v; \ __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \ return v; \ } #define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \ -static inline void write_ ## _name(uint64_t v) \ +static inline void write_ ## _name(u_register_t v) \ { \ __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \ } diff --git a/include/lib/smccc.h b/include/lib/smccc.h index b1d4dea86..660c1dbd2 100644 --- a/include/lib/smccc.h +++ b/include/lib/smccc.h @@ -9,83 +9,43 @@ #include <utils_def.h> -/******************************************************************************* - * Bit definitions inside the function id as per the SMC calling convention - ******************************************************************************/ -#define FUNCID_TYPE_SHIFT U(31) -#define FUNCID_CC_SHIFT U(30) -#define FUNCID_OEN_SHIFT U(24) -#define FUNCID_NUM_SHIFT U(0) - -#define FUNCID_TYPE_MASK U(0x1) -#define FUNCID_CC_MASK U(0x1) -#define FUNCID_OEN_MASK U(0x3f) -#define FUNCID_NUM_MASK U(0xffff) - -#define FUNCID_TYPE_WIDTH U(1) -#define FUNCID_CC_WIDTH U(1) -#define FUNCID_OEN_WIDTH U(6) -#define FUNCID_NUM_WIDTH U(16) - -#define GET_SMC_CC(id) ((id >> FUNCID_CC_SHIFT) & \ - FUNCID_CC_MASK) -#define GET_SMC_TYPE(id) ((id >> FUNCID_TYPE_SHIFT) & \ - FUNCID_TYPE_MASK) - -#define SMC_64 U(1) -#define SMC_32 U(0) -#define SMC_OK U(0) -#define SMC_UNK -1 -#define SMC_TYPE_FAST ULL(1) -#if !ERROR_DEPRECATED -#define SMC_TYPE_STD ULL(0) +#define SMCCC_VERSION_MAJOR_SHIFT U(16) +#define SMCCC_VERSION_MAJOR_MASK U(0x7FFF) +#define SMCCC_VERSION_MINOR_SHIFT U(0) +#define SMCCC_VERSION_MINOR_MASK U(0xFFFF) +#define MAKE_SMCCC_VERSION(_major, _minor) \ + ((((uint32_t)(_major) & SMCCC_VERSION_MAJOR_MASK) << \ + SMCCC_VERSION_MAJOR_SHIFT) \ + | (((uint32_t)(_minor) & SMCCC_VERSION_MINOR_MASK) << \ + SMCCC_VERSION_MINOR_SHIFT)) + +#if SMCCC_MAJOR_VERSION == 1 +# define SMCCC_MINOR_VERSION U(1) +# include <smccc_v1.h> +#elif SMCCC_MAJOR_VERSION == 2 +# define SMCCC_MINOR_VERSION U(0) +# include <smccc_v2.h> +#else +# error "Unsupported version of SMCCC." #endif -#define SMC_TYPE_YIELD U(0) -#define SMC_PREEMPTED -2 -/******************************************************************************* - * Owning entity number definitions inside the function id as per the SMC - * calling convention - ******************************************************************************/ -#define OEN_ARM_START U(0) -#define OEN_ARM_END U(0) -#define OEN_CPU_START U(1) -#define OEN_CPU_END U(1) -#define OEN_SIP_START U(2) -#define OEN_SIP_END U(2) -#define OEN_OEM_START U(3) -#define OEN_OEM_END U(3) -#define OEN_STD_START U(4) /* Standard Service Calls */ -#define OEN_STD_END U(4) -#define OEN_TAP_START U(48) /* Trusted Applications */ -#define OEN_TAP_END U(49) -#define OEN_TOS_START U(50) /* Trusted OS */ -#define OEN_TOS_END U(63) -#define OEN_LIMIT U(64) + +/* Various flags passed to SMC handlers */ +#define SMC_FROM_SECURE (U(0) << 0) +#define SMC_FROM_NON_SECURE (U(1) << 0) #ifndef __ASSEMBLY__ #include <cassert.h> #include <stdint.h> -#define SMCCC_MAJOR_VERSION U(1) -#define SMCCC_MINOR_VERSION U(1) - -#define MAKE_SMCCC_VERSION(_major, _minor) (((_major) << 16) | (_minor)) - -/* Various flags passed to SMC handlers */ -#define SMC_FROM_SECURE (U(0) << 0) -#define SMC_FROM_NON_SECURE (U(1) << 0) - #define is_caller_non_secure(_f) (((_f) & SMC_FROM_NON_SECURE) != U(0)) #define is_caller_secure(_f) (!is_caller_non_secure(_f)) /* The macro below is used to identify a Standard Service SMC call */ -#define is_std_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \ - FUNCID_OEN_MASK) == OEN_STD_START) +#define is_std_svc_call(_fid) (GET_SMC_OEN(_fid) == OEN_STD_START) /* The macro below is used to identify a Arm Architectural Service SMC call */ -#define is_arm_arch_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \ - FUNCID_OEN_MASK) == OEN_ARM_START) +#define is_arm_arch_svc_call(_fid) (GET_SMC_OEN(_fid) == OEN_ARM_START) /* The macro below is used to identify a valid Fast SMC call */ #define is_valid_fast_smc(_fid) ((!(((_fid) >> 16) & U(0xff))) && \ diff --git a/include/lib/smccc_v1.h b/include/lib/smccc_v1.h new file mode 100644 index 000000000..8718d1586 --- /dev/null +++ b/include/lib/smccc_v1.h @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef SMCCC_V1_H +#define SMCCC_V1_H + +#ifndef __SMCCC_H__ +#error "This file must only be included from smccc.h" +#endif + +/******************************************************************************* + * Bit definitions inside the function id as per the SMC calling convention + ******************************************************************************/ +#define FUNCID_TYPE_SHIFT U(31) +#define FUNCID_TYPE_MASK U(0x1) +#define FUNCID_TYPE_WIDTH U(1) + +#define FUNCID_CC_SHIFT U(30) +#define FUNCID_CC_MASK U(0x1) +#define FUNCID_CC_WIDTH U(1) + +#define FUNCID_OEN_SHIFT U(24) +#define FUNCID_OEN_MASK U(0x3f) +#define FUNCID_OEN_WIDTH U(6) + +#define FUNCID_NUM_SHIFT U(0) +#define FUNCID_NUM_MASK U(0xffff) +#define FUNCID_NUM_WIDTH U(16) + +#define GET_SMC_TYPE(id) (((id) >> FUNCID_TYPE_SHIFT) & \ + FUNCID_TYPE_MASK) +#define GET_SMC_CC(id) (((id) >> FUNCID_CC_SHIFT) & \ + FUNCID_CC_MASK) +#define GET_SMC_OEN(id) (((id) >> FUNCID_OEN_SHIFT) & \ + FUNCID_OEN_MASK) + +/******************************************************************************* + * Owning entity number definitions inside the function id as per the SMC + * calling convention + ******************************************************************************/ +#define OEN_ARM_START U(0) +#define OEN_ARM_END U(0) +#define OEN_CPU_START U(1) +#define OEN_CPU_END U(1) +#define OEN_SIP_START U(2) +#define OEN_SIP_END U(2) +#define OEN_OEM_START U(3) +#define OEN_OEM_END U(3) +#define OEN_STD_START U(4) /* Standard Service Calls */ +#define OEN_STD_END U(4) +#define OEN_STD_HYP_START U(5) /* Standard Hypervisor Service calls */ +#define OEN_STD_HYP_END U(5) +#define OEN_VEN_HYP_START U(6) /* Vendor Hypervisor Service calls */ +#define OEN_VEN_HYP_END U(6) +#define OEN_TAP_START U(48) /* Trusted Applications */ +#define OEN_TAP_END U(49) +#define OEN_TOS_START U(50) /* Trusted OS */ +#define OEN_TOS_END U(63) +#define OEN_LIMIT U(64) + +/* Flags and error codes */ +#define SMC_64 U(1) +#define SMC_32 U(0) + +#define SMC_TYPE_FAST ULL(1) +#if !ERROR_DEPRECATED +#define SMC_TYPE_STD ULL(0) +#endif +#define SMC_TYPE_YIELD ULL(0) + +#define SMC_OK ULL(0) +#define SMC_UNK -1 +#define SMC_PREEMPTED -2 /* Not defined by the SMCCC */ + +#endif /* SMCCC_V1_H */ diff --git a/include/lib/smccc_v2.h b/include/lib/smccc_v2.h new file mode 100644 index 000000000..628c160fd --- /dev/null +++ b/include/lib/smccc_v2.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef SMCCC_V2_H +#define SMCCC_V2_H + +#ifndef __SMCCC_H__ +#error "This file must only be included from smccc.h" +#endif + +/******************************************************************************* + * Bit definitions inside the function id as per the SMC calling convention + ******************************************************************************/ +#define FUNCID_TYPE_SHIFT U(31) +#define FUNCID_TYPE_MASK U(0x1) +#define FUNCID_TYPE_WIDTH U(1) + +#define FUNCID_CC_SHIFT U(30) +#define FUNCID_CC_MASK U(0x1) +#define FUNCID_CC_WIDTH U(1) + +#define FUNCID_NAMESPACE_SHIFT U(28) +#define FUNCID_NAMESPACE_MASK U(0x3) +#define FUNCID_NAMESPACE_WIDTH U(2) + +#define FUNCID_OEN_SHIFT U(24) +#define FUNCID_OEN_MASK U(0xf) +#define FUNCID_OEN_WIDTH U(4) + +#define FUNCID_NUM_SHIFT U(0) +#define FUNCID_NUM_MASK U(0xffff) +#define FUNCID_NUM_WIDTH U(16) + +#define GET_SMC_TYPE(id) (((id) >> FUNCID_TYPE_SHIFT) & \ + FUNCID_TYPE_MASK) +#define GET_SMC_CC(id) (((id) >> FUNCID_CC_SHIFT) & \ + FUNCID_CC_MASK) +#define GET_SMC_NAMESPACE(id) (((id) >> FUNCID_NAMESPACE_SHIFT) & \ + FUNCID_NAMESPACE_MASK) +#define GET_SMC_OEN(id) (((id) >> FUNCID_OEN_SHIFT) & \ + FUNCID_OEN_MASK) + +/******************************************************************************* + * Owning entity number definitions inside the function id as per the SMC + * calling convention + ******************************************************************************/ +#define OEN_ARM_START U(0) +#define OEN_ARM_END U(0) +#define OEN_CPU_START U(1) +#define OEN_CPU_END U(1) +#define OEN_SIP_START U(2) +#define OEN_SIP_END U(2) +#define OEN_OEM_START U(3) +#define OEN_OEM_END U(3) +#define OEN_STD_START U(4) /* Standard Service Calls */ +#define OEN_STD_END U(4) +#define OEN_STD_HYP_START U(5) /* Standard Hypervisor Service calls */ +#define OEN_STD_HYP_END U(5) +#define OEN_VEN_HYP_START U(6) /* Vendor Hypervisor Service calls */ +#define OEN_VEN_HYP_END U(6) +#define OEN_LIMIT U(16) + +/******************************************************************************* + * Service namespaces as per the SMC Calling Convention v2.X + ******************************************************************************/ +#define FUNCID_NAMESPACE_START U(0) +#define FUNCID_NAMESPACE_COMPAT U(0) +#define FUNCID_NAMESPACE_VENDOR U(1) +#define FUNCID_NAMESPACE_SPRT U(2) +#define FUNCID_NAMESPACE_SPCI U(3) +#define FUNCID_NAMESPACE_LIMIT U(4) + +/* Flags and error codes */ +#define SMC_64 U(1) +#define SMC_32 U(0) + +#define SMC_TYPE_FAST ULL(1) + +#define SMC_OK ULL(0) +#define SMC_UNK -1 + +#endif /* SMCCC_V2_H */ diff --git a/include/lib/stdlib/machine/_types.h b/include/lib/stdlib/machine/_types.h index fb1083b74..037fdf2f3 100644 --- a/include/lib/stdlib/machine/_types.h +++ b/include/lib/stdlib/machine/_types.h @@ -52,56 +52,19 @@ typedef short __int16_t; typedef unsigned short __uint16_t; typedef int __int32_t; typedef unsigned int __uint32_t; - - -/* - * Standard type definitions which are different in AArch64 and AArch32 - */ -#ifdef AARCH32 typedef long long __int64_t; typedef unsigned long long __uint64_t; -typedef __int32_t __critical_t; -typedef __int32_t __intfptr_t; -typedef __int32_t __intptr_t; -typedef __int32_t __ptrdiff_t; /* ptr1 - ptr2 */ -typedef __int32_t __register_t; -typedef __int32_t __segsz_t; /* segment size (in pages) */ -typedef __uint32_t __size_t; /* sizeof() */ -typedef __int32_t __ssize_t; /* byte count or error */ -typedef __uint32_t __uintfptr_t; -typedef __uint32_t __uintptr_t; -typedef __uint32_t __u_register_t; -typedef __uint32_t __vm_offset_t; -typedef __uint32_t __vm_paddr_t; -typedef __uint32_t __vm_size_t; -#elif defined AARCH64 -typedef long __int64_t; -typedef unsigned long __uint64_t; -typedef __int64_t __critical_t; -typedef __int64_t __intfptr_t; -typedef __int64_t __intptr_t; -typedef __int64_t __ptrdiff_t; /* ptr1 - ptr2 */ -typedef __int64_t __register_t; -typedef __int64_t __segsz_t; /* segment size (in pages) */ -typedef __uint64_t __size_t; /* sizeof() */ -typedef __int64_t __ssize_t; /* byte count or error */ -typedef __uint64_t __uintfptr_t; -typedef __uint64_t __uintptr_t; -typedef __uint64_t __u_register_t; -typedef __uint64_t __vm_offset_t; -typedef __uint64_t __vm_paddr_t; -typedef __uint64_t __vm_size_t; -#else -#error "Only AArch32 or AArch64 supported" -#endif /* AARCH32 */ /* * Standard type definitions. */ typedef __int32_t __clock_t; /* clock()... */ +typedef long __critical_t; typedef double __double_t; typedef float __float_t; +typedef long __intfptr_t; typedef __int64_t __intmax_t; +typedef long __intptr_t; typedef __int32_t __int_fast8_t; typedef __int32_t __int_fast16_t; typedef __int32_t __int_fast32_t; @@ -110,8 +73,22 @@ typedef __int8_t __int_least8_t; typedef __int16_t __int_least16_t; typedef __int32_t __int_least32_t; typedef __int64_t __int_least64_t; +typedef long __ptrdiff_t; /* ptr1 - ptr2 */ +typedef long __register_t; +typedef long __segsz_t; /* segment size (in pages) */ +#ifdef AARCH32 +typedef unsigned int __size_t; /* sizeof() */ +typedef int __ssize_t; /* byte count or error */ +#elif defined AARCH64 +typedef unsigned long __size_t; /* sizeof() */ +typedef long __ssize_t; /* byte count or error */ +#else +#error "Only AArch32 or AArch64 supported" +#endif /* AARCH32 */ typedef __int64_t __time_t; /* time()... */ +typedef unsigned long __uintfptr_t; typedef __uint64_t __uintmax_t; +typedef unsigned long __uintptr_t; typedef __uint32_t __uint_fast8_t; typedef __uint32_t __uint_fast16_t; typedef __uint32_t __uint_fast32_t; @@ -120,8 +97,12 @@ typedef __uint8_t __uint_least8_t; typedef __uint16_t __uint_least16_t; typedef __uint32_t __uint_least32_t; typedef __uint64_t __uint_least64_t; +typedef unsigned long __u_register_t; +typedef unsigned long __vm_offset_t; typedef __int64_t __vm_ooffset_t; +typedef unsigned long __vm_paddr_t; typedef __uint64_t __vm_pindex_t; +typedef unsigned long __vm_size_t; /* * Unusual type definitions. diff --git a/include/lib/xlat_tables/xlat_tables_defs.h b/include/lib/xlat_tables/xlat_tables_defs.h index 1c84fe07e..5eb1d309d 100644 --- a/include/lib/xlat_tables/xlat_tables_defs.h +++ b/include/lib/xlat_tables/xlat_tables_defs.h @@ -107,10 +107,8 @@ * Permissions bits, and does not define an AP[0] bit. * * AP[1] is valid only for a stage 1 translation that supports two VA ranges - * (i.e. in the ARMv8A.0 architecture, that is the S-EL1&0 regime). - * - * AP[1] is RES0 for stage 1 translations that support only one VA range - * (e.g. EL3). + * (i.e. in the ARMv8A.0 architecture, that is the S-EL1&0 regime). It is RES1 + * when stage 1 translations can only support one VA range. */ #define AP2_SHIFT U(0x7) #define AP2_RO U(0x1) @@ -119,6 +117,7 @@ #define AP1_SHIFT U(0x6) #define AP1_ACCESS_UNPRIVILEGED U(0x1) #define AP1_NO_ACCESS_UNPRIVILEGED U(0x0) +#define AP1_RES1 U(0x1) /* * The following definitions must all be passed to the LOWER_ATTRS() macro to @@ -128,6 +127,7 @@ #define AP_RW (AP2_RW << 5) #define AP_ACCESS_UNPRIVILEGED (AP1_ACCESS_UNPRIVILEGED << 4) #define AP_NO_ACCESS_UNPRIVILEGED (AP1_NO_ACCESS_UNPRIVILEGED << 4) +#define AP_ONE_VA_RANGE_RES1 (AP1_RES1 << 4) #define NS (U(0x1) << 3) #define ATTR_NON_CACHEABLE_INDEX U(0x2) #define ATTR_DEVICE_INDEX U(0x1) diff --git a/lib/xlat_tables/aarch64/xlat_tables.c b/lib/xlat_tables/aarch64/xlat_tables.c index eabc3df9a..a72c6454c 100644 --- a/lib/xlat_tables/aarch64/xlat_tables.c +++ b/lib/xlat_tables/aarch64/xlat_tables.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -57,13 +57,13 @@ static unsigned long long calc_physical_addr_size_bits( } #if ENABLE_ASSERTIONS -/* Physical Address ranges supported in the AArch64 Memory Model */ +/* + * Physical Address ranges supported in the AArch64 Memory Model. Value 0b110 is + * supported in ARMv8.2 onwards. + */ static const unsigned int pa_range_bits_arr[] = { PARANGE_0000, PARANGE_0001, PARANGE_0010, PARANGE_0011, PARANGE_0100, - PARANGE_0101, -#if ARM_ARCH_AT_LEAST(8, 2) - PARANGE_0110, -#endif + PARANGE_0101, PARANGE_0110 }; static unsigned long long get_max_supported_pa(void) diff --git a/lib/xlat_tables/xlat_tables_common.c b/lib/xlat_tables/xlat_tables_common.c index 130993628..21bf48973 100644 --- a/lib/xlat_tables/xlat_tables_common.c +++ b/lib/xlat_tables/xlat_tables_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -41,6 +41,7 @@ static unsigned long long xlat_max_pa; static uintptr_t xlat_max_va; static uint64_t execute_never_mask; +static uint64_t ap1_mask; /* * Array of all memory regions stored in order of ascending base address. @@ -195,6 +196,7 @@ static uint64_t mmap_desc(mmap_attr_t attr, unsigned long long addr_pa, desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0; desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO); desc |= LOWER_ATTRS(ACCESS_FLAG); + desc |= ap1_mask; /* * Deduce shareability domain and executability of the memory region @@ -381,7 +383,17 @@ void init_xlation_table(uintptr_t base_va, uint64_t *table, unsigned int level, uintptr_t *max_va, unsigned long long *max_pa) { - execute_never_mask = xlat_arch_get_xn_desc(xlat_arch_current_el()); + int el = xlat_arch_current_el(); + + execute_never_mask = xlat_arch_get_xn_desc(el); + + if (el == 3) { + ap1_mask = LOWER_ATTRS(AP_ONE_VA_RANGE_RES1); + } else { + assert(el == 1); + ap1_mask = 0; + } + init_xlation_table_inner(mmap, base_va, table, level); *max_va = xlat_max_va; *max_pa = xlat_max_pa; diff --git a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c index ffbc665fd..b3504e1e2 100644 --- a/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c +++ b/lib/xlat_tables_v2/aarch64/xlat_tables_arch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -45,13 +45,13 @@ unsigned long long tcr_physical_addr_size_bits(unsigned long long max_addr) } #if ENABLE_ASSERTIONS -/* Physical Address ranges supported in the AArch64 Memory Model */ +/* + * Physical Address ranges supported in the AArch64 Memory Model. Value 0b110 is + * supported in ARMv8.2 onwards. + */ static const unsigned int pa_range_bits_arr[] = { PARANGE_0000, PARANGE_0001, PARANGE_0010, PARANGE_0011, PARANGE_0100, - PARANGE_0101, -#if ARM_ARCH_AT_LEAST(8, 2) - PARANGE_0110, -#endif + PARANGE_0101, PARANGE_0110 }; unsigned long long xlat_arch_get_max_supported_pa(void) diff --git a/lib/xlat_tables_v2/xlat_tables_internal.c b/lib/xlat_tables_v2/xlat_tables_internal.c index aa130646c..584d7c475 100644 --- a/lib/xlat_tables_v2/xlat_tables_internal.c +++ b/lib/xlat_tables_v2/xlat_tables_internal.c @@ -155,7 +155,7 @@ static uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr, } } else { assert(ctx->xlat_regime == EL3_REGIME); - desc |= LOWER_ATTRS(AP_NO_ACCESS_UNPRIVILEGED); + desc |= LOWER_ATTRS(AP_ONE_VA_RANGE_RES1); } /* diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index 77eb157c6..9e95cd5ac 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -133,6 +133,9 @@ SDEI_SUPPORT := 0 # platform Makefile is free to override this value. SEPARATE_CODE_AND_RODATA := 0 +# Default to SMCCC Version 1.X +SMCCC_MAJOR_VERSION := 1 + # SPD choice SPD := none diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c index ddd29f29b..7a2f38cb0 100644 --- a/plat/common/aarch64/plat_common.c +++ b/plat/common/aarch64/plat_common.c @@ -93,7 +93,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, */ void plat_sdei_handle_masked_trigger(uint64_t mpidr, unsigned int intr) { - WARN("Spurious SDEI interrupt %u on masked PE %lx\n", intr, mpidr); + WARN("Spurious SDEI interrupt %u on masked PE %llx\n", intr, mpidr); } /* diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c index 28ad9df22..da6f6a519 100644 --- a/plat/hisilicon/hikey/hikey_bl1_setup.c +++ b/plat/hisilicon/hikey/hikey_bl1_setup.c @@ -172,7 +172,7 @@ void bl1_plat_set_ep_info(unsigned int image_id, __asm__ volatile ("msr cpacr_el1, %0" : : "r"(data)); __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data)); } while ((data & (3 << 20)) != (3 << 20)); - INFO("cpacr_el1:0x%lx\n", data); + INFO("cpacr_el1:0x%llx\n", data); ep_info->args.arg0 = 0xffff & read_mpidr(); ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, diff --git a/plat/hisilicon/poplar/platform.mk b/plat/hisilicon/poplar/platform.mk index 7c8027ead..14ffa99ea 100644 --- a/plat/hisilicon/poplar/platform.mk +++ b/plat/hisilicon/poplar/platform.mk @@ -34,10 +34,10 @@ $(eval $(call add_define,POPLAR_RECOVERY)) # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images # in the FIP if the platform requires. ifneq ($(BL32_EXTRA1),) -$(eval $(call FIP_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) +$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) endif ifneq ($(BL32_EXTRA2),) -$(eval $(call FIP_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) +$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) endif NEED_BL33 := yes diff --git a/plat/mediatek/common/custom/oem_svc.c b/plat/mediatek/common/custom/oem_svc.c index 49e7571de..c396e2d99 100644 --- a/plat/mediatek/common/custom/oem_svc.c +++ b/plat/mediatek/common/custom/oem_svc.c @@ -32,14 +32,14 @@ static int32_t oem_svc_setup(void) /******************************************************************************* * OEM top level handler for servicing SMCs. ******************************************************************************/ -uint64_t oem_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t oem_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { WARN("Unimplemented OEM Call: 0x%x\n", smc_fid); SMC_RET1(handle, SMC_UNK); @@ -49,14 +49,14 @@ uint64_t oem_smc_handler(uint32_t smc_fid, * Top-level OEM Service SMC handler. This handler will in turn dispatch * calls to related SMC handler */ -uint64_t oem_svc_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t oem_svc_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { /* * Dispatch OEM calls to OEM Common handler and return its return value diff --git a/plat/mediatek/common/mtk_plat_common.c b/plat/mediatek/common/mtk_plat_common.c index 6a13192c6..a15131da2 100644 --- a/plat/mediatek/common/mtk_plat_common.c +++ b/plat/mediatek/common/mtk_plat_common.c @@ -19,10 +19,10 @@ struct atf_arg_t gteearg; void clean_top_32b_of_param(uint32_t smc_fid, - uint64_t *px1, - uint64_t *px2, - uint64_t *px3, - uint64_t *px4) + u_register_t *px1, + u_register_t *px2, + u_register_t *px3, + u_register_t *px4) { /* if parameters from SMC32. Clean top 32 bits */ if (0 == (smc_fid & SMC_AARCH64_BIT)) { diff --git a/plat/mediatek/common/mtk_plat_common.h b/plat/mediatek/common/mtk_plat_common.h index 7513bc78e..501c339ba 100644 --- a/plat/mediatek/common/mtk_plat_common.h +++ b/plat/mediatek/common/mtk_plat_common.h @@ -48,10 +48,10 @@ struct mtk_bl_param_t { /* Declarations for mtk_plat_common.c */ uint32_t plat_get_spsr_for_bl32_entry(void); uint32_t plat_get_spsr_for_bl33_entry(void); -void clean_top_32b_of_param(uint32_t smc_fid, uint64_t *x1, - uint64_t *x2, - uint64_t *x3, - uint64_t *x4); +void clean_top_32b_of_param(uint32_t smc_fid, u_register_t *x1, + u_register_t *x2, + u_register_t *x3, + u_register_t *x4); void bl31_prepare_kernel_entry(uint64_t k32_64); void enable_ns_access_to_cpuectlr(void); void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4); diff --git a/plat/mediatek/common/mtk_sip_svc.c b/plat/mediatek/common/mtk_sip_svc.c index 869a95904..ea8cea007 100644 --- a/plat/mediatek/common/mtk_sip_svc.c +++ b/plat/mediatek/common/mtk_sip_svc.c @@ -19,14 +19,14 @@ DEFINE_SVC_UUID(mtk_sip_svc_uid, 0x8f, 0x95, 0x05, 0x00, 0x0f, 0x3d); #pragma weak mediatek_plat_sip_handler -uint64_t mediatek_plat_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); SMC_RET1(handle, SMC_UNK); @@ -34,14 +34,14 @@ uint64_t mediatek_plat_sip_handler(uint32_t smc_fid, /* * This function handles Mediatek defined SiP Calls */ -uint64_t mediatek_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t mediatek_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { uint32_t ns; @@ -85,14 +85,14 @@ uint64_t mediatek_sip_handler(uint32_t smc_fid, /* * This function is responsible for handling all SiP calls from the NS world */ -uint64_t sip_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t sip_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { switch (smc_fid) { case SIP_SVC_CALL_COUNT: diff --git a/plat/nvidia/tegra/common/tegra_sip_calls.c b/plat/nvidia/tegra/common/tegra_sip_calls.c index d96ce7a07..a8184531f 100644 --- a/plat/nvidia/tegra/common/tegra_sip_calls.c +++ b/plat/nvidia/tegra/common/tegra_sip_calls.c @@ -49,14 +49,14 @@ int plat_sip_handler(uint32_t smc_fid, /******************************************************************************* * This function is responsible for handling all SiP calls ******************************************************************************/ -uint64_t tegra_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags) +uintptr_t tegra_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) { uint32_t regval; int err; diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c index 5435ce6e9..1353b6ab5 100644 --- a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c +++ b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c @@ -382,7 +382,7 @@ int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, break; default: - ERROR("unknown MCE command (%lu)\n", cmd); + ERROR("unknown MCE command (%llu)\n", cmd); ret = EINVAL; break; } diff --git a/plat/rockchip/common/params_setup.c b/plat/rockchip/common/params_setup.c index 65afe8769..3dac01328 100644 --- a/plat/rockchip/common/params_setup.c +++ b/plat/rockchip/common/params_setup.c @@ -92,7 +92,7 @@ void params_early_setup(void *plat_param_from_bl2) break; #endif default: - ERROR("not expected type found %ld\n", + ERROR("not expected type found %lld\n", bl2_param->type); break; } diff --git a/plat/rockchip/common/rockchip_sip_svc.c b/plat/rockchip/common/rockchip_sip_svc.c index eca4f99ac..24805994b 100644 --- a/plat/rockchip/common/rockchip_sip_svc.c +++ b/plat/rockchip/common/rockchip_sip_svc.c @@ -18,14 +18,14 @@ DEFINE_SVC_UUID(rk_sip_svc_uid, 0x8f, 0x88, 0xee, 0x74, 0x7b, 0x72); #pragma weak rockchip_plat_sip_handler -uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags) +uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) { ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); SMC_RET1(handle, SMC_UNK); @@ -34,14 +34,14 @@ uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, /* * This function is responsible for handling all SiP calls from the NS world */ -uint64_t sip_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags) +uintptr_t sip_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) { uint32_t ns; diff --git a/plat/rockchip/rk3368/plat_sip_calls.c b/plat/rockchip/rk3368/plat_sip_calls.c index 03fee88cb..c0f43dbfc 100644 --- a/plat/rockchip/rk3368/plat_sip_calls.c +++ b/plat/rockchip/rk3368/plat_sip_calls.c @@ -10,14 +10,14 @@ #include <rockchip_sip_svc.h> #include <runtime_svc.h> -uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); SMC_RET1(handle, SMC_UNK); diff --git a/plat/rockchip/rk3399/plat_sip_calls.c b/plat/rockchip/rk3399/plat_sip_calls.c index 2fbda6730..ae74c9c40 100644 --- a/plat/rockchip/rk3399/plat_sip_calls.c +++ b/plat/rockchip/rk3399/plat_sip_calls.c @@ -47,14 +47,14 @@ uint32_t ddr_smc_handler(uint64_t arg0, uint64_t arg1, return 0; } -uint64_t rockchip_plat_sip_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags) +uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) { uint64_t x5, x6; diff --git a/plat/xilinx/zynqmp/plat_startup.c b/plat/xilinx/zynqmp/plat_startup.c index 3ec492e7a..18d150c91 100644 --- a/plat/xilinx/zynqmp/plat_startup.c +++ b/plat/xilinx/zynqmp/plat_startup.c @@ -166,12 +166,12 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33) (ATFHandoffParams->magic[1] != 'L') || (ATFHandoffParams->magic[2] != 'N') || (ATFHandoffParams->magic[3] != 'X')) { - ERROR("BL31: invalid ATF handoff structure at %lx\n", + ERROR("BL31: invalid ATF handoff structure at %llx\n", atf_handoff_addr); panic(); } - VERBOSE("BL31: ATF handoff params at:0x%lx, entries:%u\n", + VERBOSE("BL31: ATF handoff params at:0x%llx, entries:%u\n", atf_handoff_addr, ATFHandoffParams->num_entries); if (ATFHandoffParams->num_entries > FSBL_MAX_PARTITIONS) { ERROR("BL31: ATF handoff params: too many partitions (%u/%u)\n", @@ -189,7 +189,7 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33) int target_estate, target_secure; int target_cpu, target_endianness, target_el; - VERBOSE("BL31: %zd: entry:0x%lx, flags:0x%lx\n", i, + VERBOSE("BL31: %zd: entry:0x%llx, flags:0x%llx\n", i, ATFHandoffParams->partition[i].entry_point, ATFHandoffParams->partition[i].flags); @@ -250,7 +250,7 @@ void fsbl_atf_handover(entry_point_info_t *bl32, entry_point_info_t *bl33) } } - VERBOSE("Setting up %s entry point to:%lx, el:%x\n", + VERBOSE("Setting up %s entry point to:%llx, el:%x\n", target_secure == FSBL_FLAGS_SECURE ? "BL32" : "BL33", ATFHandoffParams->partition[i].entry_point, target_el); diff --git a/plat/xilinx/zynqmp/sip_svc_setup.c b/plat/xilinx/zynqmp/sip_svc_setup.c index 8b44eaa8d..c7996ce7e 100644 --- a/plat/xilinx/zynqmp/sip_svc_setup.c +++ b/plat/xilinx/zynqmp/sip_svc_setup.c @@ -52,14 +52,14 @@ static int32_t sip_svc_setup(void) * Handler for all SiP SMC calls. Handles standard SIP requests * and calls PM SMC handler if the call is for a PM-API function. */ -uint64_t sip_svc_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags) +uintptr_t sip_svc_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) { /* Let PM SMC handler deal with PM-related requests */ if (is_pm_fid(smc_fid)) { diff --git a/services/spd/opteed/opteed_main.c b/services/spd/opteed/opteed_main.c index 3d679806c..ac58e047c 100644 --- a/services/spd/opteed/opteed_main.c +++ b/services/spd/opteed/opteed_main.c @@ -90,7 +90,7 @@ static uint64_t opteed_sel1_interrupt_handler(uint32_t id, * (aarch32/aarch64) if not already known and initialises the context for entry * into OPTEE for its initialization. ******************************************************************************/ -int32_t opteed_setup(void) +static int32_t opteed_setup(void) { entry_point_info_t *optee_ep_info; uint32_t linear_id; @@ -187,14 +187,14 @@ static int32_t opteed_init(void) * state. Lastly it will also return any information that OPTEE needs to do * the work assigned to it. ******************************************************************************/ -uint64_t opteed_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +static uintptr_t opteed_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { cpu_context_t *ns_cpu_context; uint32_t linear_id = plat_my_core_pos(); diff --git a/services/spd/opteed/opteed_pm.c b/services/spd/opteed/opteed_pm.c index 2420b1e8f..7efc234b2 100644 --- a/services/spd/opteed/opteed_pm.c +++ b/services/spd/opteed/opteed_pm.c @@ -16,7 +16,7 @@ * The target cpu is being turned on. Allow the OPTEED/OPTEE to perform any * actions needed. Nothing at the moment. ******************************************************************************/ -static void opteed_cpu_on_handler(uint64_t target_cpu) +static void opteed_cpu_on_handler(u_register_t target_cpu) { } @@ -24,7 +24,7 @@ static void opteed_cpu_on_handler(uint64_t target_cpu) * This cpu is being turned off. Allow the OPTEED/OPTEE to perform any actions * needed ******************************************************************************/ -static int32_t opteed_cpu_off_handler(uint64_t unused) +static int32_t opteed_cpu_off_handler(u_register_t unused) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -57,7 +57,7 @@ static int32_t opteed_cpu_off_handler(uint64_t unused) * This cpu is being suspended. S-EL1 state must have been saved in the * resident cpu (mpidr format) if it is a UP/UP migratable OPTEE. ******************************************************************************/ -static void opteed_cpu_suspend_handler(uint64_t max_off_pwrlvl) +static void opteed_cpu_suspend_handler(u_register_t max_off_pwrlvl) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -87,7 +87,7 @@ static void opteed_cpu_suspend_handler(uint64_t max_off_pwrlvl) * after initialising minimal architectural state that guarantees safe * execution. ******************************************************************************/ -static void opteed_cpu_on_finish_handler(uint64_t unused) +static void opteed_cpu_on_finish_handler(u_register_t unused) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -123,7 +123,7 @@ static void opteed_cpu_on_finish_handler(uint64_t unused) * completed the preceding suspend call. Use that context to program an entry * into OPTEE to allow it to do any remaining book keeping ******************************************************************************/ -static void opteed_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl) +static void opteed_cpu_suspend_finish_handler(u_register_t max_off_pwrlvl) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -154,7 +154,7 @@ static void opteed_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl) * Return the type of OPTEE the OPTEED is dealing with. Report the current * resident cpu (mpidr format) if it is a UP/UP migratable OPTEE. ******************************************************************************/ -static int32_t opteed_cpu_migrate_info(uint64_t *resident_cpu) +static int32_t opteed_cpu_migrate_info(u_register_t *resident_cpu) { return OPTEE_MIGRATE_INFO; } diff --git a/services/spd/tlkd/tlkd_main.c b/services/spd/tlkd/tlkd_main.c index da3b732e5..5090f063f 100644 --- a/services/spd/tlkd/tlkd_main.c +++ b/services/spd/tlkd/tlkd_main.c @@ -44,14 +44,14 @@ DEFINE_SVC_UUID(tlk_uuid, 0xbd11e9c9, 0x2bba, 0x52ee, 0xb1, 0x72, 0x46, 0x1f, 0xba, 0x97, 0x7f, 0x63); -int32_t tlkd_init(void); +static int32_t tlkd_init(void); /******************************************************************************* * Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type * (aarch32/aarch64) if not already known and initialises the context for entry * into the SP for its initialisation. ******************************************************************************/ -int32_t tlkd_setup(void) +static int32_t tlkd_setup(void) { entry_point_info_t *tlk_ep_info; @@ -100,7 +100,7 @@ int32_t tlkd_setup(void) * used. This function performs a synchronous entry into the Secure payload. * The SP passes control back to this routine through a SMC. ******************************************************************************/ -int32_t tlkd_init(void) +static int32_t tlkd_init(void) { entry_point_info_t *tlk_entry_point; @@ -133,14 +133,14 @@ int32_t tlkd_init(void) * will also return any information that the secure payload needs to do the * work assigned to it. ******************************************************************************/ -uint64_t tlkd_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +static uintptr_t tlkd_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { cpu_context_t *ns_cpu_context; gp_regs_t *gp_regs; diff --git a/services/spd/tlkd/tlkd_pm.c b/services/spd/tlkd/tlkd_pm.c index 8b4c45774..2cd2fbbe7 100644 --- a/services/spd/tlkd/tlkd_pm.c +++ b/services/spd/tlkd/tlkd_pm.c @@ -22,7 +22,7 @@ extern tlk_context_t tlk_ctx; * Return the type of payload TLKD is dealing with. Report the current * resident cpu (mpidr format) if it is a UP/UP migratable payload. ******************************************************************************/ -static int32_t cpu_migrate_info(uint64_t *resident_cpu) +static int32_t cpu_migrate_info(u_register_t *resident_cpu) { /* the payload runs only on CPU0 */ *resident_cpu = MPIDR_CPU0; @@ -35,7 +35,7 @@ static int32_t cpu_migrate_info(uint64_t *resident_cpu) * This cpu is being suspended. Inform TLK of the SYSTEM_SUSPEND event, so * that it can pass this information to its Trusted Apps. ******************************************************************************/ -static void cpu_suspend_handler(uint64_t suspend_level) +static void cpu_suspend_handler(u_register_t suspend_level) { gp_regs_t *gp_regs; int cpu = read_mpidr() & MPIDR_CPU_MASK; @@ -67,7 +67,7 @@ static void cpu_suspend_handler(uint64_t suspend_level) * This cpu is being resumed. Inform TLK of the SYSTEM_SUSPEND exit, so * that it can pass this information to its Trusted Apps. ******************************************************************************/ -static void cpu_resume_handler(uint64_t suspend_level) +static void cpu_resume_handler(u_register_t suspend_level) { gp_regs_t *gp_regs; int cpu = read_mpidr() & MPIDR_CPU_MASK; diff --git a/services/spd/trusty/trusty.c b/services/spd/trusty/trusty.c index 97f202cba..cc808e2b0 100644 --- a/services/spd/trusty/trusty.c +++ b/services/spd/trusty/trusty.c @@ -53,7 +53,7 @@ struct args { uint64_t r7; }; -struct trusty_cpu_ctx trusty_cpu_ctx[PLATFORM_CORE_COUNT]; +static struct trusty_cpu_ctx trusty_cpu_ctx[PLATFORM_CORE_COUNT]; struct args trusty_init_context_stack(void **sp, void *new_stack); struct args trusty_context_switch_helper(void **sp, void *smc_params); @@ -159,7 +159,7 @@ static uint64_t trusty_set_fiq_handler(void *handle, uint64_t cpu, struct trusty_cpu_ctx *ctx; if (cpu >= PLATFORM_CORE_COUNT) { - ERROR("%s: cpu %ld >= %d\n", __func__, cpu, PLATFORM_CORE_COUNT); + ERROR("%s: cpu %lld >= %d\n", __func__, cpu, PLATFORM_CORE_COUNT); return SM_ERR_INVALID_PARAMETERS; } @@ -191,7 +191,7 @@ static uint64_t trusty_fiq_exit(void *handle, uint64_t x1, uint64_t x2, uint64_t ret = trusty_context_switch(NON_SECURE, SMC_FC_FIQ_EXIT, 0, 0, 0); if (ret.r0 != 1) { - INFO("%s(%p) SMC_FC_FIQ_EXIT returned unexpected value, %ld\n", + INFO("%s(%p) SMC_FC_FIQ_EXIT returned unexpected value, %lld\n", __func__, handle, ret.r0); } @@ -212,14 +212,14 @@ static uint64_t trusty_fiq_exit(void *handle, uint64_t x1, uint64_t x2, uint64_t SMC_RET0(handle); } -static uint64_t trusty_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +static uintptr_t trusty_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { struct args ret; uint32_t vmid = 0; @@ -331,7 +331,7 @@ static void trusty_cpu_suspend(uint32_t off) ret = trusty_context_switch(NON_SECURE, SMC_FC_CPU_SUSPEND, off, 0, 0); if (ret.r0 != 0) { - INFO("%s: cpu %d, SMC_FC_CPU_SUSPEND returned unexpected value, %ld\n", + INFO("%s: cpu %d, SMC_FC_CPU_SUSPEND returned unexpected value, %lld\n", __func__, plat_my_core_pos(), ret.r0); } } @@ -342,19 +342,19 @@ static void trusty_cpu_resume(uint32_t on) ret = trusty_context_switch(NON_SECURE, SMC_FC_CPU_RESUME, on, 0, 0); if (ret.r0 != 0) { - INFO("%s: cpu %d, SMC_FC_CPU_RESUME returned unexpected value, %ld\n", + INFO("%s: cpu %d, SMC_FC_CPU_RESUME returned unexpected value, %lld\n", __func__, plat_my_core_pos(), ret.r0); } } -static int32_t trusty_cpu_off_handler(uint64_t unused) +static int32_t trusty_cpu_off_handler(u_register_t unused) { trusty_cpu_suspend(1); return 0; } -static void trusty_cpu_on_finish_handler(uint64_t unused) +static void trusty_cpu_on_finish_handler(u_register_t unused) { struct trusty_cpu_ctx *ctx = get_trusty_ctx(); @@ -365,12 +365,12 @@ static void trusty_cpu_on_finish_handler(uint64_t unused) } } -static void trusty_cpu_suspend_handler(uint64_t unused) +static void trusty_cpu_suspend_handler(u_register_t unused) { trusty_cpu_suspend(0); } -static void trusty_cpu_suspend_finish_handler(uint64_t unused) +static void trusty_cpu_suspend_finish_handler(u_register_t unused) { trusty_cpu_resume(0); } diff --git a/services/spd/tspd/tspd_main.c b/services/spd/tspd/tspd_main.c index 2312205c8..8cb23b966 100644 --- a/services/spd/tspd/tspd_main.c +++ b/services/spd/tspd/tspd_main.c @@ -179,7 +179,7 @@ static uint64_t tspd_ns_interrupt_handler(uint32_t id, * (aarch32/aarch64) if not already known and initialises the context for entry * into the SP for its initialisation. ******************************************************************************/ -int32_t tspd_setup(void) +static int32_t tspd_setup(void) { entry_point_info_t *tsp_ep_info; uint32_t linear_id; @@ -273,14 +273,14 @@ int32_t tspd_init(void) * will also return any information that the secure payload needs to do the * work assigned to it. ******************************************************************************/ -uint64_t tspd_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, +static uintptr_t tspd_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, void *cookie, void *handle, - uint64_t flags) + u_register_t flags) { cpu_context_t *ns_cpu_context; uint32_t linear_id = plat_my_core_pos(), ns; diff --git a/services/spd/tspd/tspd_pm.c b/services/spd/tspd/tspd_pm.c index 5fdd3dc1c..9414c154e 100644 --- a/services/spd/tspd/tspd_pm.c +++ b/services/spd/tspd/tspd_pm.c @@ -17,7 +17,7 @@ * The target cpu is being turned on. Allow the TSPD/TSP to perform any actions * needed. Nothing at the moment. ******************************************************************************/ -static void tspd_cpu_on_handler(uint64_t target_cpu) +static void tspd_cpu_on_handler(u_register_t target_cpu) { } @@ -25,7 +25,7 @@ static void tspd_cpu_on_handler(uint64_t target_cpu) * This cpu is being turned off. Allow the TSPD/TSP to perform any actions * needed ******************************************************************************/ -static int32_t tspd_cpu_off_handler(uint64_t unused) +static int32_t tspd_cpu_off_handler(u_register_t unused) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -64,7 +64,7 @@ static int32_t tspd_cpu_off_handler(uint64_t unused) * This cpu is being suspended. S-EL1 state must have been saved in the * resident cpu (mpidr format) if it is a UP/UP migratable TSP. ******************************************************************************/ -static void tspd_cpu_suspend_handler(uint64_t max_off_pwrlvl) +static void tspd_cpu_suspend_handler(u_register_t max_off_pwrlvl) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -100,7 +100,7 @@ static void tspd_cpu_suspend_handler(uint64_t max_off_pwrlvl) * after initialising minimal architectural state that guarantees safe * execution. ******************************************************************************/ -static void tspd_cpu_on_finish_handler(uint64_t unused) +static void tspd_cpu_on_finish_handler(u_register_t unused) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -145,7 +145,7 @@ static void tspd_cpu_on_finish_handler(uint64_t unused) * completed the preceding suspend call. Use that context to program an entry * into the TSP to allow it to do any remaining book keeping ******************************************************************************/ -static void tspd_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl) +static void tspd_cpu_suspend_finish_handler(u_register_t max_off_pwrlvl) { int32_t rc = 0; uint32_t linear_id = plat_my_core_pos(); @@ -176,7 +176,7 @@ static void tspd_cpu_suspend_finish_handler(uint64_t max_off_pwrlvl) * Return the type of TSP the TSPD is dealing with. Report the current resident * cpu (mpidr format) if it is a UP/UP migratable TSP. ******************************************************************************/ -static int32_t tspd_cpu_migrate_info(uint64_t *resident_cpu) +static int32_t tspd_cpu_migrate_info(u_register_t *resident_cpu) { return TSP_MIGRATE_INFO; } diff --git a/services/spd/tspd/tspd_private.h b/services/spd/tspd/tspd_private.h index a63daff10..692a967e3 100644 --- a/services/spd/tspd/tspd_private.h +++ b/services/spd/tspd/tspd_private.h @@ -221,16 +221,6 @@ void tspd_init_tsp_ep_state(struct entry_point_info *tsp_entry_point, tsp_context_t *tsp_ctx); int tspd_abort_preempted_smc(tsp_context_t *tsp_ctx); -uint64_t tspd_smc_handler(uint32_t smc_fid, - uint64_t x1, - uint64_t x2, - uint64_t x3, - uint64_t x4, - void *cookie, - void *handle, - uint64_t flags); - -int32_t tspd_setup(void); uint64_t tspd_handle_sp_preemption(void *handle); extern tsp_context_t tspd_sp_context[TSPD_CORE_COUNT]; diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile index b0994b8ca..8a1958ffa 100644 --- a/tools/cert_create/Makefile +++ b/tools/cert_create/Makefile @@ -86,5 +86,5 @@ clean: $(call SHELL_DELETE_ALL, src/build_msg.o ${OBJECTS}) realclean: clean - $(call SHELL_DELETE, ${BINARY}) + $(call SHELL_DELETE,${BINARY}) |