diff options
| -rw-r--r-- | plat/nvidia/tegra/include/t194/tegra_mc_def.h | 5 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_memctrl.c | 9 |
2 files changed, 13 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/include/t194/tegra_mc_def.h b/plat/nvidia/tegra/include/t194/tegra_mc_def.h index 09dcce3c0..5da770f2e 100644 --- a/plat/nvidia/tegra/include/t194/tegra_mc_def.h +++ b/plat/nvidia/tegra/include/t194/tegra_mc_def.h @@ -531,7 +531,10 @@ #define MC_CLIENT_HOTRESET_STATUS2 0x1898U #define MC_COALESCE_CTRL 0x2930U -#define MC_COALESCE_CTRL_COALESCER_ENABLE (1U << 31) +#define MC_COALESCE_CTRL_COALESCER_ENABLE (1U << 31) +#define MC_COALESCE_CONFIG_6_0 0x294cU +#define MC_COALESCE_CONFIG_6_0_PVA0RDC_COALESCER_ENABLED (1U << 8) +#define MC_COALESCE_CONFIG_6_0_PVA1RDC_COALESCER_ENABLED (1U << 14) /******************************************************************************* * Tegra TSA Controller constants diff --git a/plat/nvidia/tegra/soc/t194/plat_memctrl.c b/plat/nvidia/tegra/soc/t194/plat_memctrl.c index 07c05c8b1..0f8092224 100644 --- a/plat/nvidia/tegra/soc/t194/plat_memctrl.c +++ b/plat/nvidia/tegra/soc/t194/plat_memctrl.c @@ -618,6 +618,15 @@ static void tegra194_memctrl_reconfig_mss_clients(void) reg_val = MC_COALESCE_CTRL_COALESCER_ENABLE; tegra_mc_write_32(MC_COALESCE_CTRL, reg_val); + + /* + * WAR to hardware bug 1953865: Coalescer must be disabled + * for PVA0RDC and PVA1RDC interfaces. + */ + reg_val = tegra_mc_read_32(MC_COALESCE_CONFIG_6_0); + reg_val &= ~(MC_COALESCE_CONFIG_6_0_PVA0RDC_COALESCER_ENABLED | + MC_COALESCE_CONFIG_6_0_PVA1RDC_COALESCER_ENABLED); + tegra_mc_write_32(MC_COALESCE_CONFIG_6_0, reg_val); } /******************************************************************************* |