From 073831adf9442c019e8d34b18b0c04b1d780a19b Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Mon, 24 Jan 2011 17:37:40 +0100 Subject: First public release of the ARM/Neon tests. --- ref_vext.c | 100 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100644 ref_vext.c (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c new file mode 100644 index 0000000..a14a5ac --- /dev/null +++ b/ref_vext.c @@ -0,0 +1,100 @@ +/* + +Copyright (c) 2009, 2010, 2011 STMicroelectronics +Written by Christophe Lyon + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +*/ + +#ifdef __arm__ +#include +#else +#error Target not supported +#endif + +#include "stm-arm-neon-ref.h" + +#define TEST_MSG "VEXT/VEXTQ" +void exec_vext (void) +{ + /* vector_res = vext(vector1,vector2,offset), then store the result. */ +#define TEST_VEXT(Q, T1, T2, W, N, V) \ + VECT_VAR(vector_res, T1, W, N) = \ + vext##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \ + VECT_VAR(vector2, T1, W, N), \ + V); \ + vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N)) + + /* With ARM RVCT, we need to declare variables before any executable + statement */ + DECL_VARIABLE_ALL_VARIANTS(vector1); + DECL_VARIABLE_ALL_VARIANTS(vector2); + DECL_VARIABLE_ALL_VARIANTS(vector_res); + + clean_results (); + + TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLOAD, vector1, buffer); + TEST_VLOAD(vector1, buffer, , float, f, 32, 2); + TEST_VLOAD(vector1, buffer, q, float, f, 32, 4); + + /* Choose arbitrary initialization values */ + TEST_VDUP(vector2, , int, s, 8, 8, 0x11); + TEST_VDUP(vector2, , int, s, 16, 4, 0x22); + TEST_VDUP(vector2, , int, s, 32, 2, 0x33); + TEST_VDUP(vector2, , int, s, 64, 1, 0x44); + TEST_VDUP(vector2, , uint, u, 8, 8, 0x55); + TEST_VDUP(vector2, , uint, u, 16, 4, 0x66); + TEST_VDUP(vector2, , uint, u, 32, 2, 0x77); + TEST_VDUP(vector2, , uint, u, 64, 1, 0x88); + TEST_VDUP(vector2, , float, f, 32, 2, 33.6); + + TEST_VDUP(vector2, q, int, s, 8, 16, 0x11); + TEST_VDUP(vector2, q, int, s, 16, 8, 0x22); + TEST_VDUP(vector2, q, int, s, 32, 4, 0x33); + TEST_VDUP(vector2, q, int, s, 64, 2, 0x44); + TEST_VDUP(vector2, q, uint, u, 8, 16, 0x55); + TEST_VDUP(vector2, q, uint, u, 16, 8, 0x66); + TEST_VDUP(vector2, q, uint, u, 32, 4, 0x77); + TEST_VDUP(vector2, q, uint, u, 64, 2, 0x88); + TEST_VDUP(vector2, q, float, f, 32, 4, 33.2); + + /* Choose arbitrary extract offsets */ + TEST_VEXT(, int, s, 8, 8, 7); + TEST_VEXT(, int, s, 16, 4, 3); + TEST_VEXT(, int, s, 32, 2, 1); + TEST_VEXT(, int, s, 64, 1, 0); + TEST_VEXT(, uint, u, 8, 8, 6); + TEST_VEXT(, uint, u, 16, 4, 2); + TEST_VEXT(, uint, u, 32, 2, 1); + TEST_VEXT(, uint, u, 64, 1, 0); + TEST_VEXT(, float, f, 32, 2, 1); + + TEST_VEXT(q, int, s, 8, 16, 14); + TEST_VEXT(q, int, s, 16, 8, 7); + TEST_VEXT(q, int, s, 32, 4, 3); + TEST_VEXT(q, int, s, 64, 2, 1); + TEST_VEXT(q, uint, u, 8, 16, 12); + TEST_VEXT(q, uint, u, 16, 8, 6); + TEST_VEXT(q, uint, u, 32, 4, 3); + TEST_VEXT(q, uint, u, 64, 2, 1); + TEST_VEXT(q, float, f, 32, 4, 3); + + dump_results_hex (TEST_MSG); +} -- cgit v1.2.3 From bd9ecf4db9bba1231667eac1468d9155d46a5e4f Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Tue, 19 Jul 2011 16:30:50 +0200 Subject: Merge from SVN #531 [CL] add 'f' suffix to 'float' constants --- ref_vext.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c index a14a5ac..aa00d81 100644 --- a/ref_vext.c +++ b/ref_vext.c @@ -63,7 +63,7 @@ void exec_vext (void) TEST_VDUP(vector2, , uint, u, 16, 4, 0x66); TEST_VDUP(vector2, , uint, u, 32, 2, 0x77); TEST_VDUP(vector2, , uint, u, 64, 1, 0x88); - TEST_VDUP(vector2, , float, f, 32, 2, 33.6); + TEST_VDUP(vector2, , float, f, 32, 2, 33.6f); TEST_VDUP(vector2, q, int, s, 8, 16, 0x11); TEST_VDUP(vector2, q, int, s, 16, 8, 0x22); @@ -73,7 +73,7 @@ void exec_vext (void) TEST_VDUP(vector2, q, uint, u, 16, 8, 0x66); TEST_VDUP(vector2, q, uint, u, 32, 4, 0x77); TEST_VDUP(vector2, q, uint, u, 64, 2, 0x88); - TEST_VDUP(vector2, q, float, f, 32, 4, 33.2); + TEST_VDUP(vector2, q, float, f, 32, 4, 33.2f); /* Choose arbitrary extract offsets */ TEST_VEXT(, int, s, 8, 8, 7); -- cgit v1.2.3 From 0dab5f72da4b2434882b51b44ac377af9e3160fe Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Tue, 19 Jul 2011 17:14:09 +0200 Subject: [CL] re-insert support for non-ARM compiler, through STM wrappers --- ref_vext.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c index aa00d81..ff2aaf7 100644 --- a/ref_vext.c +++ b/ref_vext.c @@ -26,7 +26,7 @@ THE SOFTWARE. #ifdef __arm__ #include #else -#error Target not supported +#include "stm-arm-neon.h" #endif #include "stm-arm-neon-ref.h" -- cgit v1.2.3 From 80902f6bfb82ca1a0b17604602a47baf314b7876 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Fri, 29 Mar 2013 16:26:42 +0100 Subject: Add support for polynomial variants (*_p8, *_p16). --- ref_vext.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c index ff2aaf7..500d3e0 100644 --- a/ref_vext.c +++ b/ref_vext.c @@ -1,6 +1,6 @@ /* -Copyright (c) 2009, 2010, 2011 STMicroelectronics +Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics Written by Christophe Lyon Permission is hereby granted, free of charge, to any person obtaining a copy @@ -63,6 +63,8 @@ void exec_vext (void) TEST_VDUP(vector2, , uint, u, 16, 4, 0x66); TEST_VDUP(vector2, , uint, u, 32, 2, 0x77); TEST_VDUP(vector2, , uint, u, 64, 1, 0x88); + TEST_VDUP(vector2, , poly, p, 8, 8, 0x55); + TEST_VDUP(vector2, , poly, p, 16, 4, 0x66); TEST_VDUP(vector2, , float, f, 32, 2, 33.6f); TEST_VDUP(vector2, q, int, s, 8, 16, 0x11); @@ -73,6 +75,8 @@ void exec_vext (void) TEST_VDUP(vector2, q, uint, u, 16, 8, 0x66); TEST_VDUP(vector2, q, uint, u, 32, 4, 0x77); TEST_VDUP(vector2, q, uint, u, 64, 2, 0x88); + TEST_VDUP(vector2, q, poly, p, 8, 16, 0x55); + TEST_VDUP(vector2, q, poly, p, 16, 8, 0x66); TEST_VDUP(vector2, q, float, f, 32, 4, 33.2f); /* Choose arbitrary extract offsets */ @@ -84,6 +88,8 @@ void exec_vext (void) TEST_VEXT(, uint, u, 16, 4, 2); TEST_VEXT(, uint, u, 32, 2, 1); TEST_VEXT(, uint, u, 64, 1, 0); + TEST_VEXT(, poly, p, 8, 8, 6); + TEST_VEXT(, poly, p, 16, 4, 2); TEST_VEXT(, float, f, 32, 2, 1); TEST_VEXT(q, int, s, 8, 16, 14); @@ -94,6 +100,8 @@ void exec_vext (void) TEST_VEXT(q, uint, u, 16, 8, 6); TEST_VEXT(q, uint, u, 32, 4, 3); TEST_VEXT(q, uint, u, 64, 2, 1); + TEST_VEXT(q, poly, p, 8, 16, 12); + TEST_VEXT(q, poly, p, 16, 8, 6); TEST_VEXT(q, float, f, 32, 4, 3); dump_results_hex (TEST_MSG); -- cgit v1.2.3 From 1775be0bcaa673c19bb1f60f0c1bce1b91cdb414 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Thu, 10 Jul 2014 13:46:54 +0200 Subject: Enable build for aarch64. --- ref_vext.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c index 500d3e0..bc0a480 100644 --- a/ref_vext.c +++ b/ref_vext.c @@ -23,7 +23,7 @@ THE SOFTWARE. */ -#ifdef __arm__ +#if defined(__arm__) || defined(__aarch64__) #include #else #include "stm-arm-neon.h" -- cgit v1.2.3 From f20536724d4cc8432d5b804082415c8391f88f9b Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Tue, 16 Dec 2014 10:26:00 +0100 Subject: Rename helper macros: TEST_VLOAD into VLOAD TEST_VDUP into VDUP --- ref_vext.c | 52 ++++++++++++++++++++++++++-------------------------- 1 file changed, 26 insertions(+), 26 deletions(-) (limited to 'ref_vext.c') diff --git a/ref_vext.c b/ref_vext.c index bc0a480..32e84ec 100644 --- a/ref_vext.c +++ b/ref_vext.c @@ -50,34 +50,34 @@ void exec_vext (void) clean_results (); - TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLOAD, vector1, buffer); - TEST_VLOAD(vector1, buffer, , float, f, 32, 2); - TEST_VLOAD(vector1, buffer, q, float, f, 32, 4); + TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector1, buffer); + VLOAD(vector1, buffer, , float, f, 32, 2); + VLOAD(vector1, buffer, q, float, f, 32, 4); /* Choose arbitrary initialization values */ - TEST_VDUP(vector2, , int, s, 8, 8, 0x11); - TEST_VDUP(vector2, , int, s, 16, 4, 0x22); - TEST_VDUP(vector2, , int, s, 32, 2, 0x33); - TEST_VDUP(vector2, , int, s, 64, 1, 0x44); - TEST_VDUP(vector2, , uint, u, 8, 8, 0x55); - TEST_VDUP(vector2, , uint, u, 16, 4, 0x66); - TEST_VDUP(vector2, , uint, u, 32, 2, 0x77); - TEST_VDUP(vector2, , uint, u, 64, 1, 0x88); - TEST_VDUP(vector2, , poly, p, 8, 8, 0x55); - TEST_VDUP(vector2, , poly, p, 16, 4, 0x66); - TEST_VDUP(vector2, , float, f, 32, 2, 33.6f); - - TEST_VDUP(vector2, q, int, s, 8, 16, 0x11); - TEST_VDUP(vector2, q, int, s, 16, 8, 0x22); - TEST_VDUP(vector2, q, int, s, 32, 4, 0x33); - TEST_VDUP(vector2, q, int, s, 64, 2, 0x44); - TEST_VDUP(vector2, q, uint, u, 8, 16, 0x55); - TEST_VDUP(vector2, q, uint, u, 16, 8, 0x66); - TEST_VDUP(vector2, q, uint, u, 32, 4, 0x77); - TEST_VDUP(vector2, q, uint, u, 64, 2, 0x88); - TEST_VDUP(vector2, q, poly, p, 8, 16, 0x55); - TEST_VDUP(vector2, q, poly, p, 16, 8, 0x66); - TEST_VDUP(vector2, q, float, f, 32, 4, 33.2f); + VDUP(vector2, , int, s, 8, 8, 0x11); + VDUP(vector2, , int, s, 16, 4, 0x22); + VDUP(vector2, , int, s, 32, 2, 0x33); + VDUP(vector2, , int, s, 64, 1, 0x44); + VDUP(vector2, , uint, u, 8, 8, 0x55); + VDUP(vector2, , uint, u, 16, 4, 0x66); + VDUP(vector2, , uint, u, 32, 2, 0x77); + VDUP(vector2, , uint, u, 64, 1, 0x88); + VDUP(vector2, , poly, p, 8, 8, 0x55); + VDUP(vector2, , poly, p, 16, 4, 0x66); + VDUP(vector2, , float, f, 32, 2, 33.6f); + + VDUP(vector2, q, int, s, 8, 16, 0x11); + VDUP(vector2, q, int, s, 16, 8, 0x22); + VDUP(vector2, q, int, s, 32, 4, 0x33); + VDUP(vector2, q, int, s, 64, 2, 0x44); + VDUP(vector2, q, uint, u, 8, 16, 0x55); + VDUP(vector2, q, uint, u, 16, 8, 0x66); + VDUP(vector2, q, uint, u, 32, 4, 0x77); + VDUP(vector2, q, uint, u, 64, 2, 0x88); + VDUP(vector2, q, poly, p, 8, 16, 0x55); + VDUP(vector2, q, poly, p, 16, 8, 0x66); + VDUP(vector2, q, float, f, 32, 4, 33.2f); /* Choose arbitrary extract offsets */ TEST_VEXT(, int, s, 8, 8, 7); -- cgit v1.2.3